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path: root/target-mips/translate.c
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2008-05-30Fix for 32-bit MIPS.ths1-9/+10
2008-05-29Avoid qemu SIGFPE for MIPS DIV, by Richard Sandiford.ths1-14/+10
2008-05-29Fix truncate/extend reversal in MIPS DIV{, U} handling, by Richard Sandiford.ths1-8/+8
2008-05-29Fix modulus result from MIPS DDIV & avoid overflowing division,ths1-9/+14
2008-05-28Honour current_tc for MIPS M{T,F}{HI,LO}, by Richard Sandiford.ths1-45/+44
2008-05-24Fix mov[tf].ps handling for MIPS, by Richard Sandiford.ths1-2/+4
2008-05-24Un-break MIPS conditional moves, by Richard Sandiford.ths1-15/+17
2008-05-24Fix ARM conditional branch bug.pbrook1-24/+24
2008-05-23Swithc some MIPS CP0 accesses to TCG.ths1-97/+194
2008-05-23Switch MIPS movf/movt to TCG.ths1-8/+22
2008-05-22Switch MIPS branch handling to TCG, and clean out pointless wrapperths1-394/+286
2008-05-21Switch MIPS clo/clz and the condition tests to TCG.ths1-6/+65
2008-05-21Switch MIPS movn/movz to TCG.ths1-2/+14
2008-05-18Switch most MIPS logical and arithmetic instructions to TCG.ths1-85/+424
2008-05-18Fix local register cache handling.ths1-4/+13
2008-05-07Be more economical with local temporaries.ths1-2/+44
2008-05-06Convert some MIPS load/store instructions to TCG.ths1-51/+175
2008-05-06Use TCG for MIPS GPR moves.ths1-40/+78
2008-05-06Fix MIPS64 branches. Funny how this survived testing.ths1-1/+1
2008-05-05Really really revert commit r4343aurel321-0/+4
2008-05-05Really revert commit r4343aurel321-2/+0
2008-05-05Don't stop translation for mtc0 compareaurel321-2/+0
2008-05-04Simplify mips branch handling. Retire T2 from use. Use TCG for branches.ths1-29/+48
2008-04-28Factorize code in translate.caurel321-0/+8
2008-04-11Remove osdep.c/qemu-img code duplicationaurel321-0/+1
2008-02-12Make MIPS MT implementation more cache friendly.ths1-8/+8
2008-02-01use the TCG code generatorbellard1-37/+6
2007-12-30MIPS COP1X (and related) instructions, by Richard Sandiford.ths1-9/+47
2007-12-25Support for VR5432, and some of its special instructions. Original patchths1-1/+100
2007-12-24Update debug code to match new accumulator register layout.ths1-4/+4
2007-12-09Handle cpu_model in copy_cpu(), by Kirill A. Shutemov.ths1-0/+1
2007-11-26Micro-optimize back-to-back store-load sequences.ths1-103/+135
2007-11-22Optimize the conventional move operation.ths1-0/+6
2007-11-18Fix MIPS64 R2 instructions.ths1-6/+13
2007-11-10added cpu_model parameter to cpu_init()bellard1-3/+10
2007-11-08Clean out the N32 macros from target-mips, and introduce MIPS ABI specificths1-27/+27
2007-11-08Formatting fix.ths1-1/+1
2007-10-28Implement missing MIPS supervisor mode bits.ths1-5/+7
2007-10-24Remove bogus instruction decode.ths1-1/+0
2007-10-23Use the standard ASE check for MIPS-3D and MT.ths1-92/+77
2007-10-23Switch bc1any* instructions off if no MIPS-3D is implemented.ths1-1/+9
2007-10-09Use always_inline in the MIPS support where applicable.ths1-17/+17
2007-10-09Fix [ls][wd][lr] instructions, by Aurelien Jarno.ths1-4/+4
2007-09-30Code provision for n32/n64 mips userland emulation. Not functional yet.ths1-27/+27
2007-09-26Wrap a few often used tests with unlikely(), by Aurelien Jarno.ths1-6/+6
2007-09-25Optimise instructions accessing CP0, by Aurelien Jarno.ths1-4/+16
2007-09-24Per-CPU instruction decoding implementation, by Aurelien Jarno.ths1-86/+171
2007-09-20Extend TB flags to 64 bits (Alexander Graf).j_mayer1-1/+1
2007-09-17find -type f | xargs sed -i 's/[\t ]*$//g' # Yes, again. Note the star in the...ths1-2/+2
2007-09-16find -type f | xargs sed -i 's/[\t ]$//g' # on most filesths1-6/+6