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authorths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2007-10-28 19:45:05 +0000
committerths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2007-10-28 19:45:05 +0000
commit623a930ec30a75e6d6482ca8208d7bf1ca8d359b (patch)
tree6953605abd679c357ffba546fd43907a4ce9ea0e /target-mips/translate.c
parent8e129e0748f866d730f1e39bff296219fedac244 (diff)
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Implement missing MIPS supervisor mode bits.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3472 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/translate.c')
-rw-r--r--target-mips/translate.c12
1 files changed, 7 insertions, 5 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 89fe5fe231..ce0b4dcfe8 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -790,13 +790,15 @@ static always_inline void check_mips_64(DisasContext *ctx)
#define op_ldst(name) (*gen_op_##name[ctx->mem_idx])()
#define OP_LD_TABLE(width) \
static GenOpFunc *gen_op_l##width[] = { \
- &gen_op_l##width##_user, \
&gen_op_l##width##_kernel, \
+ &gen_op_l##width##_super, \
+ &gen_op_l##width##_user, \
}
#define OP_ST_TABLE(width) \
static GenOpFunc *gen_op_s##width[] = { \
- &gen_op_s##width##_user, \
&gen_op_s##width##_kernel, \
+ &gen_op_s##width##_super, \
+ &gen_op_s##width##_user, \
}
#endif
@@ -6494,9 +6496,9 @@ gen_intermediate_code_internal (CPUState *env, TranslationBlock *tb,
ctx.hflags = (uint32_t)tb->flags; /* FIXME: maybe use 64 bits here? */
restore_cpu_state(env, &ctx);
#if defined(CONFIG_USER_ONLY)
- ctx.mem_idx = 0;
+ ctx.mem_idx = MIPS_HFLAG_UM;
#else
- ctx.mem_idx = !((ctx.hflags & MIPS_HFLAG_MODE) == MIPS_HFLAG_UM);
+ ctx.mem_idx = ctx.hflags & MIPS_HFLAG_KSU;
#endif
#ifdef DEBUG_DISAS
if (loglevel & CPU_LOG_TB_CPU) {
@@ -6507,7 +6509,7 @@ gen_intermediate_code_internal (CPUState *env, TranslationBlock *tb,
#endif
#ifdef MIPS_DEBUG_DISAS
if (loglevel & CPU_LOG_TB_IN_ASM)
- fprintf(logfile, "\ntb %p super %d cond %04x\n",
+ fprintf(logfile, "\ntb %p idx %d hflags %04x\n",
tb, ctx.mem_idx, ctx.hflags);
#endif
while (ctx.bstate == BS_NONE && gen_opc_ptr < gen_opc_end) {