| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2018-12-14 | Simplifying the emitter handling of 4-byte encoded SSE instructions (#21528) | Tanner Gooding | 1 | -11/+1 |
| 2018-09-06 | Clean CodeGen::genEmitCall (#19804) | Sergey Andreenko | 1 | -18/+1 |
| 2018-09-05 | Implement AVX2 Gather intrinsic in JIT | Fei Peng | 1 | -0/+9 |
| 2018-08-09 | Implementing the Avx.MaskStore intrinsics | Tanner Gooding | 1 | -0/+2 |
| 2018-06-06 | Adding containment support for more x86 hardware intrinsics (#18297) | Tanner Gooding | 1 | -1/+33 |
| 2018-06-04 | Adding function headers to the 'emitIns_SIMD_*' methods and clarifying commen... | Tanner Gooding | 1 | -6/+15 |
| 2018-06-04 | Updating the x86 HWIntrinsics to support containment for most one-operand int... | Tanner Gooding | 1 | -2/+2 |
| 2018-06-04 | Fixing the name of the paramters in the emitIns_SIMD_* methods. | Tanner Gooding | 1 | -19/+22 |
| 2018-05-25 | Updating the JIT to handle the FMA hardware intrinsics. | Tanner Gooding | 1 | -0/+13 |
| 2018-05-22 | Remove JIT LEGACY_BACKEND code (#18064) | Bruce Forstall | 1 | -83/+1 |
| 2018-03-22 | Add emitIns_AR_R_I for vextracti/f128 | Fei Peng | 1 | -0/+1 |
| 2018-02-26 | Update the table-driven framework to support x86 imm-intrinsics. | Fei Peng | 1 | -0/+1 |
| 2018-02-09 | Updating the emitter to more generally handle 4-Byte SSE4 instructions. | Tanner Gooding | 1 | -5/+1 |
| 2018-02-06 | Disable prefetch instructions for LEGACY_BACKEND | Carol Eidt | 1 | -0/+9 |
| 2018-02-05 | Adding support for the StoreFence/Prefetch* APIs and the new Sse scalar overl... | Tanner Gooding | 1 | -0/+2 |
| 2018-02-03 | Updating the HWIntrinsic codegen to support marking LoadVector128 and LoadAli... | Tanner Gooding | 1 | -0/+5 |
| 2018-01-31 | Delete GenTreePtr. (#16027) | Sergey Andreenko | 1 | -1/+1 |
| 2018-01-19 | Fix desktop build | Bruce Forstall | 1 | -2/+20 |
| 2018-01-19 | Merge SSE intrinsics into the table-driven framework | Fei Peng | 1 | -13/+6 |
| 2018-01-18 | table drive Intel hardware intrinsic | Fei Peng | 1 | -6/+9 |
| 2018-01-17 | Updating emitIns_R_R_A_I to not be defined for the legacy backend. | Tanner Gooding | 1 | -0/+2 |
| 2018-01-16 | Adding support for the SSE Load, LoadAligned, LoadHigh, LoadLow, and LoadScal... | Tanner Gooding | 1 | -0/+3 |
| 2018-01-16 | Updating most of the SSE Compare intrinsics to support containment | Tanner Gooding | 1 | -0/+19 |
| 2018-01-16 | Adding support for the SSE Reciprocal, ReciprocalSqrt, and Sqrt intrinsics | Tanner Gooding | 1 | -0/+1 |
| 2018-01-16 | Adding support for the SSE compare eq, gt, ge, lt, le, ne, ord, and unord int... | Tanner Gooding | 1 | -0/+1 |
| 2018-01-16 | Merge pull request #14736 from tannergooding/roundsx | Tanner Gooding | 1 | -0/+6 |
| 2018-01-16 | Mark emitIns_R_A and emitIns_R_R_A to be not defined for legacy backend | Tanner Gooding | 1 | -0/+2 |
| 2018-01-14 | Adding SSE4.1 intrinsic support for Round, Ceiling, and Floor. | Tanner Gooding | 1 | -0/+6 |
| 2018-01-12 | Fixing the hwintrin codgen containment checks | Tanner Gooding | 1 | -19/+4 |
| 2018-01-12 | Adding basic containment support to the x86 HWIntrinsics | Tanner Gooding | 1 | -0/+28 |
| 2017-12-12 | Enable Vector128/256<T> and Add intrinsics | Fei Peng | 1 | -0/+4 |
| 2017-11-14 | Change VEX-encoding selection to avoid AVX-SSE transition penalties | Fei Peng | 1 | -7/+7 |
| 2017-10-30 | Rename and simplify SSE3_4 to SSE4 | Fei Peng | 1 | -5/+5 |
| 2017-10-24 | Cleanup unused emitter arguments | Brian Sullivan | 1 | -16/+3 |
| 2017-10-03 | remove FEATURE_AVX_SUPPORT flag | Fei Peng | 1 | -7/+12 |
| 2017-09-27 | fix bad VEX.vvvv to avoid false register dependency | Fei Peng | 1 | -5/+5 |
| 2017-05-10 | add jit intrinsic support for vector conversion/narrow/widen on AMD64 and x86... | helloguo | 1 | -0/+2 |
| 2017-04-07 | Remove RELOC_SUPPORT define | Bruce Forstall | 1 | -3/+1 |
| 2017-03-06 | Un-clang-format-horrible-ify emitIns_Call() and genEmitCall() | Bruce Forstall | 1 | -21/+27 |
| 2017-02-23 | Rewrite Is4ByteAVXInstruction() and Is4ByteSSE4Instruction() | Fei Peng | 1 | -0/+1 |
| 2017-02-05 | Enable SIMD for RyuJIT/x86 | Bruce Forstall | 1 | -1/+11 |
| 2017-01-10 | fix comments, assertion failure in crossgen mscorlib | Li Tian | 1 | -2/+2 |
| 2017-01-08 | Remove AVX/SSE transition penalties | Li Tian | 1 | -0/+28 |
| 2016-11-30 | Fix x86 encoder to use 64-bit type to accumulate opcode/prefix bits | Bruce Forstall | 1 | -36/+52 |
| 2016-11-29 | Merge pull request #8291 from sivarv/sse34 | Sivarv | 1 | -0/+18 |
| 2016-11-28 | Enable using SSE3_4 instruction set for SIMD codegen. | sivarv | 1 | -0/+18 |
| 2016-11-28 | Factor out common stack adjustment code | Bruce Forstall | 1 | -0/+12 |
| 2016-08-11 | Reformat jit sources with clang-tidy and format | Michelle McDaniel | 1 | -449/+349 |
| 2016-07-29 | Massage code for clang-format | Michelle McDaniel | 1 | -1/+1 |
| 2016-07-26 | Enable multireg returns on Arm64 | Brian Sullivan | 1 | -4/+4 |
