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author | Tanner Gooding <tagoo@outlook.com> | 2018-01-29 21:20:08 -0800 |
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committer | Tanner Gooding <tagoo@outlook.com> | 2018-02-03 07:48:26 -0800 |
commit | 41f8b17ae1741dbcb15eaf0e7456c82548672889 (patch) | |
tree | de39985a7714be82475ccd96df97592d03e4e5e0 /src/jit/emitxarch.h | |
parent | 67feb5e680e4e94756e0133744da2c7150565666 (diff) | |
download | coreclr-41f8b17ae1741dbcb15eaf0e7456c82548672889.tar.gz coreclr-41f8b17ae1741dbcb15eaf0e7456c82548672889.tar.bz2 coreclr-41f8b17ae1741dbcb15eaf0e7456c82548672889.zip |
Updating the HWIntrinsic codegen to support marking LoadVector128 and LoadAlignedVector128 as contained.
Diffstat (limited to 'src/jit/emitxarch.h')
-rw-r--r-- | src/jit/emitxarch.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/jit/emitxarch.h b/src/jit/emitxarch.h index cca099cc72..8542767438 100644 --- a/src/jit/emitxarch.h +++ b/src/jit/emitxarch.h @@ -386,6 +386,8 @@ void emitIns_R_A(instruction ins, emitAttr attr, regNumber reg1, GenTreeIndir* i void emitIns_R_A_I(instruction ins, emitAttr attr, regNumber reg1, GenTreeIndir* indir, int ival); +void emitIns_R_AR_I(instruction ins, emitAttr attr, regNumber reg1, regNumber base, int offs, int ival); + void emitIns_R_C_I(instruction ins, emitAttr attr, regNumber reg1, CORINFO_FIELD_HANDLE fldHnd, int offs, int ival); void emitIns_R_S_I(instruction ins, emitAttr attr, regNumber reg1, int varx, int offs, int ival); @@ -405,6 +407,8 @@ void emitIns_R_R_R(instruction ins, emitAttr attr, regNumber reg1, regNumber reg #ifndef LEGACY_BACKEND void emitIns_R_R_A_I( instruction ins, emitAttr attr, regNumber reg1, regNumber reg2, GenTreeIndir* indir, int ival, insFormat fmt); +void emitIns_R_R_AR_I( + instruction ins, emitAttr attr, regNumber reg1, regNumber reg2, regNumber base, int offs, int ival); #endif // !LEGACY_BACKEND void emitIns_R_R_C_I( @@ -475,6 +479,7 @@ void emitIns_AX_R(instruction ins, emitAttr attr, regNumber ireg, regNumber reg, #ifdef FEATURE_HW_INTRINSICS void emitIns_SIMD_R_R_AR(instruction ins, emitAttr attr, regNumber reg, regNumber reg1, regNumber base); void emitIns_SIMD_R_R_A_I(instruction ins, emitAttr attr, regNumber reg, regNumber reg1, GenTreeIndir* indir, int ival); +void emitIns_SIMD_R_R_AR_I(instruction ins, emitAttr attr, regNumber reg, regNumber reg1, regNumber base, int ival); void emitIns_SIMD_R_R_C_I( instruction ins, emitAttr attr, regNumber reg, regNumber reg1, CORINFO_FIELD_HANDLE fldHnd, int offs, int ival); void emitIns_SIMD_R_R_R_I(instruction ins, emitAttr attr, regNumber reg, regNumber reg1, regNumber reg2, int ival); |