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AgeCommit message (Expand)AuthorFilesLines
2010-07-25mips: more fixes to the MIPS interrupt glue logicAurelien Jarno4-15/+21
2010-07-24mips: Correct MIPS interrupt glue logic for icountEdgar E. Iglesias2-14/+0
2010-07-17target-mips: fix xtlb exception for loongsonAurelien Jarno1-2/+4
2010-07-11target-mips: add loongson 2E & 2F integer instructionsAurelien Jarno1-0/+271
2010-07-03remove exec-all.h inclusion from cpu.hPaolo Bonzini1-1/+0
2010-07-03move cpu_pc_from_tb to target-*/exec.hPaolo Bonzini2-7/+7
2010-07-03remove unused stuff from */exec.hPaolo Bonzini2-9/+6
2010-07-01target-mips: add Loongson support prefetchAurelien Jarno1-35/+43
2010-07-01target-mips: split load and storeAurelien Jarno1-155/+183
2010-06-30target-mips: fix DINSU instructionAurelien Jarno1-1/+1
2010-06-29target-mips: enable movn/movz on loongson 2E & 2FAurelien Jarno1-1/+2
2010-06-29MIPS: Initial support of fulong mini pc (CPU definition)Huacai Chen2-0/+39
2010-06-09target-mips: Fix compilationStefan Weil1-1/+1
2010-06-09target-mips: add microMIPS exception handler supportNathan Froyd2-6/+16
2010-06-09target-mips: microMIPS ASE supportNathan Froyd4-5/+2531
2010-06-09target-mips: mips16 cleanupsNathan Froyd1-7/+17
2010-06-09target-mips: refactor c{, abs}.cond.fmt insnsNathan Froyd1-83/+81
2010-06-09target-mips: move FP FMT comments closer to the definitionsAurelien Jarno1-14/+14
2010-06-09target-mips: define constants for magic numbersNathan Froyd1-142/+295
2010-06-08target-mips: break out [ls][wd]c1 and rdhwr insn generationNathan Froyd1-47/+59
2010-05-05target-mips: Remove duplicate CPU log.Richard Henderson1-6/+0
2010-04-09target-mips: Fix format specifiers for fpu_fprintfStefan Weil1-14/+20
2010-04-08target-mips: Fix one more format specifier for cpu_fprintfStefan Weil1-1/+3
2010-04-08remove TARGET_* defines from translate-all.cPaolo Bonzini1-0/+2
2010-03-17Large page TLB flushPaul Brook1-3/+4
2010-03-13target-mips: update address space definitionsAurelien Jarno1-4/+4
2010-03-12Target specific usermode cleanupPaul Brook2-2/+14
2010-03-12Remove cpu_get_phys_page_debug from userspace emulationPaul Brook1-4/+2
2010-03-12Move TARGET_PHYS_ADDR_SPACE_BITS to target-*/cpu.h.Richard Henderson1-0/+4
2010-03-04target-mips: use newer logical opsAurelien Jarno1-8/+4
2010-03-02target-mips: use setcond when possibleAurelien Jarno1-77/+20
2010-02-23target-mips: fix ROTR and DROTR by zeroNathan Froyd1-0/+4
2010-02-23target-mips: fix CpU exception for coprocessor 0Nathan Froyd1-1/+1
2010-02-23target-mips: remove useless sign extensionAurelien Jarno1-2/+0
2010-02-06target-mips: don't call cpu_loop_exit() from helper.cAurelien Jarno3-8/+22
2010-01-19kill regs_to_env and env_to_regsPaolo Bonzini1-8/+0
2009-12-17target-mips: No MIPS16 support for 4Kc, 4KEc coresStefan Weil1-3/+3
2009-12-16target-mips: 4Kc, 4KEc cores do not support MIPS16Stefan Weil1-3/+3
2009-12-13target-mips: fix user-mode emulation startupNathan Froyd2-8/+8
2009-12-13target-mips: set Config1.CA for MIPS16-aware CPUsNathan Froyd1-9/+18
2009-12-13target-mips: add copyright notice for mips16 workNathan Froyd2-1/+1
2009-12-13target-mips: add mips16 instruction decodingNathan Froyd1-9/+1063
2009-12-13target-mips: add enums for MIPS16 opcodesNathan Froyd1-0/+112
2009-12-13target-mips: split out delay slot handlingNathan Froyd1-55/+79
2009-12-13target-mips: add gen_base_offset_addrNathan Froyd1-24/+16
2009-12-13target-mips: make gen_compute_branch 16/32-bit-awareNathan Froyd1-7/+8
2009-12-13target-mips: move ROTR and ROTRV inside gen_shift_{imm, }Nathan Froyd1-139/+148
2009-12-13target-mips: change interrupt bits to be mips16-awareNathan Froyd2-24/+44
2009-12-13target-mips: add new HFLAGs for JALX and 16/32-bit delay slotsNathan Froyd1-19/+28
2009-11-30target-mips: use physical address in lladdrAurelien Jarno3-28/+61
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