sdk/emulator/qemu - Domain: SDK / Emulator;

Age	Commit message (Expand)	Author	Files	Lines
2016-06-07	ppc: Batch TLB flushes on 32-bit 6xx/7xx/7xxx in hash mode	Benjamin Herrenschmidt	1	-1/+1
2016-06-07	ppc: Properly tag the translation cache based on MMU mode	Benjamin Herrenschmidt	1	-1/+1
2016-06-07	ppc: Fix hreg_store_msr() so that non-HV mode cannot alter MSR:HV	Benjamin Herrenschmidt	1	-2/+2
2016-05-30	ppc: Do some batching of TCG tlb flushes	Benjamin Herrenschmidt	1	-0/+13
2016-05-30	ppc: Use split I/D mmu modes to avoid flushes on interrupts	Benjamin Herrenschmidt	1	-7/+47
2014-04-08	PPC: Only enter MSR_POW when no interrupts pending	Alexander Graf	1	-1/+1
2014-03-13	cputlb: Change tlb_flush() argument to CPUState	Andreas Färber	1	-1/+1
2013-12-20	PPC: Add VSX to hflags	Alexander Graf	1	-1/+1
2013-03-12	cpu: Move halted and interrupt_request fields to CPUState	Andreas Färber	1	-4/+7
2009-08-16	Replace always_inline with inline	Blue Swirl	1	-5/+5
2009-07-16	Update to a hopefully more future proof FSF address	Blue Swirl	1	-2/+1
2009-01-04	Update FSF address in GPL/LGPL boilerplate	aurel32	1	-1/+1
2008-10-21	target-ppc: Convert XER accesses to TCG	aurel32	1	-18/+0
2008-09-04	ppc: cleanup register types	aurel32	1	-1/+1
2007-11-17	PowerPC hypervisor mode is not fundamentally available only for PowerPC 64.	j_mayer	1	-8/+11
2007-11-17	Always make all PowerPC exception definitions visible.	j_mayer	1	-5/+2
2007-11-04	PowerPC 601 need specific callbacks for its BATs setup.	j_mayer	1	-5/+14
2007-10-25	Implement power-management for all defined PowerPC CPUs.	j_mayer	1	-23/+2
2007-10-25	Gprof prooved the PowerPC emulation spent too much time in MSR load and store	j_mayer	1	-0/+142