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authoraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2008-10-21 11:28:46 +0000
committeraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2008-10-21 11:28:46 +0000
commit3d7b417e13152587df587fe58789740c3ef7abb9 (patch)
tree824bf571e3bad076986e5144f6834ffd032d77f1 /target-ppc/helper_regs.h
parentd75a0b97e0e9bfcd73dd2ef081ba06e53932b42d (diff)
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target-ppc: Convert XER accesses to TCG
Define XER bits as a single register and access them individually to avoid defining 5 32-bit registers (TCG doesn't permit to map 8-bit registers). Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5500 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc/helper_regs.h')
-rw-r--r--target-ppc/helper_regs.h18
1 files changed, 0 insertions, 18 deletions
diff --git a/target-ppc/helper_regs.h b/target-ppc/helper_regs.h
index 34dfa02a5e..9666d4b6fa 100644
--- a/target-ppc/helper_regs.h
+++ b/target-ppc/helper_regs.h
@@ -21,24 +21,6 @@
#if !defined(__HELPER_REGS_H__)
#define __HELPER_REGS_H__
-static always_inline target_ulong hreg_load_xer (CPUPPCState *env)
-{
- return (xer_so << XER_SO) |
- (xer_ov << XER_OV) |
- (xer_ca << XER_CA) |
- (xer_bc << XER_BC) |
- (xer_cmp << XER_CMP);
-}
-
-static always_inline void hreg_store_xer (CPUPPCState *env, target_ulong value)
-{
- xer_so = (value >> XER_SO) & 0x01;
- xer_ov = (value >> XER_OV) & 0x01;
- xer_ca = (value >> XER_CA) & 0x01;
- xer_cmp = (value >> XER_CMP) & 0xFF;
- xer_bc = (value >> XER_BC) & 0x7F;
-}
-
/* Swap temporary saved registers with GPRs */
static always_inline void hreg_swap_gpr_tgpr (CPUPPCState *env)
{