summaryrefslogtreecommitdiff
path: root/target-mips
AgeCommit message (Expand)AuthorFilesLines
2008-05-18Add file left out from previous commit.ths1-0/+3
2008-05-18Switch most MIPS logical and arithmetic instructions to TCG.ths4-577/+436
2008-05-18Fix local register cache handling.ths1-4/+13
2008-05-10fixed do_restore_state()bellard1-5/+7
2008-05-07Be more economical with local temporaries.ths1-2/+44
2008-05-07Mention missing CPU save/restore.ths1-0/+1
2008-05-07Delete redundant prototype.ths1-2/+0
2008-05-07Delete more obsolete dyngen ops.ths1-115/+0
2008-05-07Delete obsolete MIPS dyngen ops.ths2-156/+0
2008-05-06Convert some MIPS load/store instructions to TCG.ths3-109/+175
2008-05-06Enable 64-bit FPU only for NewABI. Spotted by Vince Weaver.ths1-0/+2
2008-05-06Use TCG for MIPS GPR moves.ths4-42/+83
2008-05-06Fix MIPS64 branches. Funny how this survived testing.ths1-1/+1
2008-05-05Really really revert commit r4343aurel321-0/+4
2008-05-05Really revert commit r4343aurel321-2/+0
2008-05-05Don't stop translation for mtc0 compareaurel321-2/+0
2008-05-04remove target ifdefs from vl.caurel321-0/+22
2008-05-04Simplify mips branch handling. Retire T2 from use. Use TCG for branches.ths5-77/+55
2008-05-03Fix MIPS MT GPR accesses, thanks Stefan Weil.ths2-10/+10
2008-04-28Factorize code in translate.caurel321-0/+8
2008-04-11Remove osdep.c/qemu-img code duplicationaurel321-0/+1
2008-03-29Fix infinite loop when invalidating TLB, by Herve Poussineau.ths1-1/+1
2008-02-12Make MIPS MT implementation more cache friendly.ths5-59/+59
2008-02-01use the TCG code generatorbellard2-55/+6
2008-01-09Fix typo which broke MIPS32R2 64-bit FPU support.ths1-1/+1
2008-01-08Fix broken absoluteness check for cabs.d.*.ths1-2/+2
2008-01-04Handle some more exception types.ths1-29/+43
2008-01-03Fix exception debug output.ths1-39/+36
2007-12-30MIPS COP1X (and related) instructions, by Richard Sandiford.ths3-18/+74
2007-12-28Set FCR0.F64 for MIPS64R2-generic, by Richard Sandiford.ths1-3/+3
2007-12-26De-cruft exception definitions, and implement nicer debug output.ths2-26/+65
2007-12-25Support for VR5432, and some of its special instructions. Original patchths6-7/+405
2007-12-255K and 20K are Release 1 CPUs.ths1-3/+3
2007-12-25Avoid host FPE for overflowing division on MIPS, by Richard Sandiford.ths1-3/+10
2007-12-25Improved PABITS handling, and config register fixes.ths4-56/+106
2007-12-24Update debug code to match new accumulator register layout.ths1-4/+4
2007-12-24Fix CCRes value for 20Kc.ths1-1/+1
2007-12-17MIPS TODO: mention unimplemented system controllers.ths1-0/+2
2007-12-17Update MIPS TODO. The mipsnet failure is caused by a kernel bug.ths1-6/+0
2007-12-09Handle cpu_model in copy_cpu(), by Kirill A. Shutemov.ths1-0/+1
2007-12-02Larger physical address space for 32-bit MIPS.ths1-0/+3
2007-11-26Micro-optimize back-to-back store-load sequences.ths1-103/+135
2007-11-22Optimize the conventional move operation.ths1-0/+6
2007-11-22Fix off-by-one address checks in MIPS64 MMU, by Aurelien Jarno.ths1-4/+4
2007-11-19Add older 4Km variants.ths1-0/+34
2007-11-18Add strict checking mode for softfp code.pbrook1-4/+4
2007-11-18Fix MIPS64 R2 instructions.ths3-30/+34
2007-11-18Use a valid PRid.ths1-1/+1
2007-11-17Fix int/float inconsistencies.pbrook3-36/+34
2007-11-14Introduce 4KEm configuration with fixed MMU mapping. Delete bogus INSN_DSPths1-2/+19