index
:
sdk/emulator/qemu
1.0_post
2.0alpha
features/brillcodec_2i
features/camera
features/cnp
features/dr
features/qt_dr
features/smp
features/virtio-9p
features/vmodem
glesv3
master
opensrc_p2.3
opensrc_p2.3.1
opensrc_p2.3.2
opensrc_p2.4
opensrc_p3.0
opensrc_p4.0
sandbox/byungchul.so/tizen
sandbox/elebideau/tizen
sandbox/mmajewski2/maru-virgl-rendering-wip
sandbox/mmajewski2/standalone-virgl-wip
sandbox/pcoval/tizen
spin
tizen
tizen_2.0
tizen_2.1
tizen_2.2
tizen_3.0.m14.4_ivi
tizen_p2.3
tizen_p2.3.1
tizen_qemu_1.6
tizen_qemu_1.7
tizen_qemu_2.0
tizen_qemu_5.0.1
tizen_studio_1.2_p2.3
tizen_studio_1.2_p2.3.1
tizen_studio_1.2_p2.3.2
tizen_studio_1.2_p2.4
tizen_studio_1.2_p3.0
tizen_studio_1.3_p2.3
tizen_studio_1.3_p2.3.1
tizen_studio_1.3_p2.3.2
tizen_studio_1.3_p2.4
tizen_studio_1.3_p3.0
tizen_studio_2.0_p2.3
tizen_studio_2.0_p2.3.1
tizen_studio_2.0_p2.3.2
tizen_studio_2.0_p2.4
tizen_studio_2.0_p3.0
tizen_studio_2.0_p4.0
tizen_studio_2.0_p5.0
tizen_studio_3.0_p2.3
tizen_studio_3.0_p2.3.1
tizen_studio_3.0_p2.3.2
tizen_studio_3.0_p2.4
tizen_studio_3.0_p3.0
tizen_studio_3.0_p4.0
tizen_studio_3.0_p5.0
tizen_studio_3.5_p2.3
tizen_studio_3.5_p2.3.1
tizen_studio_3.5_p2.3.2
tizen_studio_3.5_p2.4
tizen_studio_3.5_p3.0
tizen_studio_3.5_p4.0
tizen_studio_3.5_p5.0
tizen_studio_3.5_p5.5
tizen_studio_4.0_p2.3
tizen_studio_4.0_p2.3.1
tizen_studio_4.0_p2.3.2
tizen_studio_4.0_p2.4
tizen_studio_4.0_p3.0
tizen_studio_4.0_p4.0
tizen_studio_4.0_p5.0
tizen_studio_4.0_p5.5
tizen_studio_4.0_p6.0
tizen_studio_4.5_p6.5
tizen_studio_5.0_p7.0
tizen_studio_5.5_p7.5
tizen_studio_5.5_p8.0
tizen_studio_6.0_p9.0
tizen_studio_p2.3
tizen_studio_p2.3.1
tizen_studio_p2.3.2
tizen_studio_p2.4
tizen_studio_p3.0
tizen_studio_p4.0
works/arg_renewal
Domain: SDK / Emulator;
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
target-mips
/
translate.c
Age
Commit message (
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Author
Files
Lines
2013-03-12
cpu: Move halted and interrupt_request fields to CPUState
Andreas Färber
1
-2
/
+2
2013-03-05
mips64-linux-user: Enable 64-bit address mode and fpu
Richard Henderson
1
-0
/
+12
2013-03-05
target-mips: Fix accumulator selection for MIPS16 and microMIPS
Richard Sandiford
1
-84
/
+64
2013-03-03
gen-icount.h: Rename gen_icount_start/end to gen_tb_start/end
Peter Maydell
1
-2
/
+2
2013-02-23
target-mips: Use mul[us]2 in [D]MULT[U] insns
Richard Henderson
1
-28
/
+20
2013-02-16
target-mips: Move TCG initialization to MIPSCPU initfn
Andreas Färber
1
-2
/
+1
2013-02-16
target-mips: Introduce QOM realizefn for MIPSCPU
Andreas Färber
1
-2
/
+3
2013-01-31
target-mips: enable access to DSP ASE if implemented
Petar Jovanovic
1
-4
/
+2
2013-01-31
target-mips: Sign-extend the result of LWR
Richard Sandiford
1
-0
/
+1
2013-01-31
target-mips: Fix signedness of loads in MIPS16 RESTOREs
Richard Sandiford
1
-1
/
+1
2013-01-31
target-mips: implement DSP (d)append sub-class with TCG
Aurelien Jarno
1
-46
/
+87
2013-01-31
target-mips: generate a reserved instruction exception on CPU without DSP
Aurelien Jarno
1
-2
/
+10
2013-01-31
target-mips: copy insn_flags in DisasContext
Aurelien Jarno
1
-381
/
+381
2013-01-31
target-mips: fix DSP loads with rd = 0
Aurelien Jarno
1
-5
/
+0
2013-01-15
cpu: Move cpu_index field to CPUState
Andreas Färber
1
-10
/
+7
2013-01-01
target-mips: Make repl_ph to sign extend to target-long
Jovanovic, Petar
1
-1
/
+2
2012-12-19
exec: move include files to include/exec/
Paolo Bonzini
1
-1
/
+1
2012-12-19
build: kill libdis, move disassemblers to disas/
Paolo Bonzini
1
-1
/
+1
2012-12-08
TCG: Use gen_opc_instr_start from context instead of global variable.
Evgeny Voevodin
1
-3
/
+3
2012-12-08
TCG: Use gen_opc_icount from context instead of global variable.
Evgeny Voevodin
1
-1
/
+1
2012-12-08
TCG: Use gen_opc_pc from context instead of global variable.
Evgeny Voevodin
1
-2
/
+2
2012-11-24
target-mips: remove POOL48A from the microMIPS decoding
Aurelien Jarno
1
-1
/
+0
2012-11-24
target-mips: Clean up microMIPS32 major opcode
陳韋任 (Wei-Ren Chen)
1
-7
/
+17
2012-11-24
target-mips: Add comments on POOL32Axf encoding
陳韋任 (Wei-Ren Chen)
1
-0
/
+17
2012-11-17
TCG: Use gen_opc_buf from context instead of global variable.
Evgeny Voevodin
1
-3
/
+3
2012-11-17
TCG: Use gen_opc_ptr from context instead of global variable.
Evgeny Voevodin
1
-4
/
+5
2012-11-15
target-mips: fix wrong microMIPS opcode encoding
陳韋任 (Wei-Ren Chen)
1
-1
/
+1
2012-11-11
target-mips: Fix seg fault for LUI when MIPS_DEBUG_DISAS==1.
Eric Johnson
1
-7
/
+11
2012-11-10
disas: avoid using cpu_single_env
Blue Swirl
1
-1
/
+1
2012-10-31
target-mips: use deposit instead of hardcoded version
Aurelien Jarno
1
-28
/
+4
2012-10-31
target-mips: optimize ddiv/ddivu/div/divu with movcond
Aurelien Jarno
1
-48
/
+37
2012-10-31
target-mips: implement movn/movz using movcond
Aurelien Jarno
1
-15
/
+12
2012-10-31
target-mips: don't use local temps for store conditional
Aurelien Jarno
1
-5
/
+6
2012-10-31
target-mips: implement unaligned loads using TCG
Aurelien Jarno
1
-13
/
+62
2012-10-31
target-mips: optimize load operations
Aurelien Jarno
1
-4
/
+12
2012-10-31
target-mips: cleanup load/store operations
Aurelien Jarno
1
-64
/
+35
2012-10-31
target-mips: use the softfloat floatXX_muladd functions
Aurelien Jarno
1
-12
/
+12
2012-10-31
target-mips: do not save CPU state when using retranslation
Aurelien Jarno
1
-20
/
+0
2012-10-31
target-mips: correctly restore btarget upon exception
Aurelien Jarno
1
-0
/
+11
2012-10-31
target-mips: remove #if defined(TARGET_MIPS64) in opcode enums
Aurelien Jarno
1
-36
/
+0
2012-10-31
target-mips: Add ASE DSP accumulator instructions
Jia Liu
1
-0
/
+351
2012-10-31
target-mips: Add ASE DSP compare-pick instructions
Jia Liu
1
-0
/
+350
2012-10-31
target-mips: Add ASE DSP bit/manipulation instructions
Jia Liu
1
-0
/
+249
2012-10-31
target-mips: Add ASE DSP multiply instructions
Jia Liu
1
-0
/
+485
2012-10-31
target-mips: Add ASE DSP GPR-based shift instructions
Jia Liu
1
-0
/
+324
2012-10-31
target-mips: Add ASE DSP arithmetic instructions
Jia Liu
1
-3
/
+792
2012-10-31
target-mips: Add ASE DSP load instructions
Jia Liu
1
-0
/
+88
2012-10-31
target-mips: Add ASE DSP branch instructions
Jia Liu
1
-0
/
+36
2012-10-31
Use correct acc value to index cpu_HI/cpu_LO rather than using a fix number
Jia Liu
1
-27
/
+95
2012-10-31
target-mips: Add ASE DSP resources access check
Jia Liu
1
-0
/
+23
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