index
:
sdk/emulator/qemu
1.0_post
2.0alpha
features/brillcodec_2i
features/camera
features/cnp
features/dr
features/qt_dr
features/smp
features/virtio-9p
features/vmodem
glesv3
master
opensrc_p2.3
opensrc_p2.3.1
opensrc_p2.3.2
opensrc_p2.4
opensrc_p3.0
opensrc_p4.0
sandbox/byungchul.so/tizen
sandbox/elebideau/tizen
sandbox/mmajewski2/maru-virgl-rendering-wip
sandbox/mmajewski2/standalone-virgl-wip
sandbox/pcoval/tizen
spin
tizen
tizen_2.0
tizen_2.1
tizen_2.2
tizen_3.0.m14.4_ivi
tizen_p2.3
tizen_p2.3.1
tizen_qemu_1.6
tizen_qemu_1.7
tizen_qemu_2.0
tizen_qemu_5.0.1
tizen_studio_1.2_p2.3
tizen_studio_1.2_p2.3.1
tizen_studio_1.2_p2.3.2
tizen_studio_1.2_p2.4
tizen_studio_1.2_p3.0
tizen_studio_1.3_p2.3
tizen_studio_1.3_p2.3.1
tizen_studio_1.3_p2.3.2
tizen_studio_1.3_p2.4
tizen_studio_1.3_p3.0
tizen_studio_2.0_p2.3
tizen_studio_2.0_p2.3.1
tizen_studio_2.0_p2.3.2
tizen_studio_2.0_p2.4
tizen_studio_2.0_p3.0
tizen_studio_2.0_p4.0
tizen_studio_2.0_p5.0
tizen_studio_3.0_p2.3
tizen_studio_3.0_p2.3.1
tizen_studio_3.0_p2.3.2
tizen_studio_3.0_p2.4
tizen_studio_3.0_p3.0
tizen_studio_3.0_p4.0
tizen_studio_3.0_p5.0
tizen_studio_3.5_p2.3
tizen_studio_3.5_p2.3.1
tizen_studio_3.5_p2.3.2
tizen_studio_3.5_p2.4
tizen_studio_3.5_p3.0
tizen_studio_3.5_p4.0
tizen_studio_3.5_p5.0
tizen_studio_3.5_p5.5
tizen_studio_4.0_p2.3
tizen_studio_4.0_p2.3.1
tizen_studio_4.0_p2.3.2
tizen_studio_4.0_p2.4
tizen_studio_4.0_p3.0
tizen_studio_4.0_p4.0
tizen_studio_4.0_p5.0
tizen_studio_4.0_p5.5
tizen_studio_4.0_p6.0
tizen_studio_4.5_p6.5
tizen_studio_5.0_p7.0
tizen_studio_5.5_p7.5
tizen_studio_5.5_p8.0
tizen_studio_6.0_p9.0
tizen_studio_p2.3
tizen_studio_p2.3.1
tizen_studio_p2.3.2
tizen_studio_p2.4
tizen_studio_p3.0
tizen_studio_p4.0
works/arg_renewal
Domain: SDK / Emulator;
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
target-mips
/
op_helper.c
Age
Commit message (
Expand
)
Author
Files
Lines
2010-02-06
target-mips: don't call cpu_loop_exit() from helper.c
Aurelien Jarno
1
-2
/
+16
2009-12-13
target-mips: change interrupt bits to be mips16-aware
Nathan Froyd
1
-3
/
+14
2009-11-30
target-mips: use physical address in lladdr
Aurelien Jarno
1
-0
/
+39
2009-11-30
target-mips: factorize load/store code in op_helper.c
Aurelien Jarno
1
-152
/
+100
2009-11-22
target-mips: make CP0_LLAddr register CPU dependent
Aurelien Jarno
1
-2
/
+9
2009-11-22
target-mips: rename CP0_LLAddr into lladdr
Aurelien Jarno
1
-7
/
+7
2009-11-14
target-mips: fix indentation
Aurelien Jarno
1
-1
/
+1
2009-10-01
Revert "Get rid of _t suffix"
Anthony Liguori
1
-4
/
+4
2009-10-01
Get rid of _t suffix
malc
1
-4
/
+4
2009-09-21
Add 'static' to please Sparse
Blue Swirl
1
-1
/
+1
2009-07-16
Update to a hopefully more future proof FSF address
Blue Swirl
1
-2
/
+1
2009-04-15
target-mips: variable names consistency
aurel32
1
-364
/
+364
2009-03-28
target-mips: implement FPU Flush-To-Zero mode
aurel32
1
-0
/
+5
2009-03-08
target-mips: remove dead code
aurel32
1
-34
/
+0
2009-03-08
target-mips: rename helpers from do_ to helper_
aurel32
1
-270
/
+261
2009-01-15
global s/loglevel & X/qemu_loglevel_mask(X)/ (Eduardo Habkost)
aliguori
1
-3
/
+3
2009-01-15
Convert references to logfile/loglevel to use qemu_log*() macros
aliguori
1
-33
/
+33
2009-01-14
target-mips: fix indentation
aurel32
1
-11
/
+11
2009-01-04
Update FSF address in GPL/LGPL boilerplate
aurel32
1
-1
/
+1
2008-12-20
Fix remaining compiler warnings for mips targets.
ths
1
-2
/
+4
2008-12-07
MIPS: remove a few warnings
aurel32
1
-4
/
+4
2008-11-17
TCG variable type checking.
pbrook
1
-0
/
+21
2008-11-11
target-mips: convert bit shuffle ops to TCG
aurel32
1
-19
/
+0
2008-11-11
target-mips: convert bitfield ops to TCG
aurel32
1
-25
/
+1
2008-11-11
target-mips: fix mft* helpers/call
aurel32
1
-5
/
+5
2008-10-06
Show size for unassigned accesses (Robert Reif)
blueswir1
1
-1
/
+1
2008-09-18
Move the active FPU registers into env again, and use more TCG registers
ths
1
-261
/
+261
2008-09-14
MIPS: Fix tlbwi/tlbwr
aurel32
1
-3
/
+9
2008-07-23
Use plain standard inline.
ths
1
-7
/
+7
2008-07-23
Less hardcoding of TARGET_USER_ONLY.
ths
1
-93
/
+2
2008-07-09
Use temporary registers for the MIPS FPU emulation.
ths
1
-368
/
+612
2008-06-29
Remove unnecessary helper arguments, and fix some typos.
ths
1
-5
/
+5
2008-06-27
Avoid unused input arguments which triggered tcg errors. Spotted by
ths
1
-16
/
+18
2008-06-27
More efficient target register / TC accesses.
ths
1
-80
/
+188
2008-06-24
Remove remaining uses of T0 in the MIPS target.
ths
1
-34
/
+35
2008-06-24
Use temporaries instead of fixed registers for some instructions.
ths
1
-6
/
+6
2008-06-23
Pass T0/T1 explicitly to helper functions, and clean up a few dyngen
ths
1
-549
/
+514
2008-06-20
Convert unaligned load/store to TCG.
ths
1
-0
/
+337
2008-06-20
Convert vr54xx multiply instructions to TCG.
ths
1
-3
/
+3
2008-06-19
Convert remaining MIPS FP instructions to TCG.
ths
1
-0
/
+87
2008-06-12
Switch the standard multiplication instructions to TCG.
ths
1
-10
/
+12
2008-06-12
Switch bitfield instructions and assorted special ops to TCG.
ths
1
-0
/
+123
2008-06-12
TCGify a few more instructions.
ths
1
-0
/
+6
2008-06-09
Switch remaining CP0 instructions to TCG or helper functions.
ths
1
-4
/
+788
2008-05-25
Fix off-by-one unwinding error.
pbrook
1
-6
/
+0
2008-05-23
Fix build failure for MIPS64 targets on 64-bit hosts.
ths
1
-1
/
+2
2008-05-21
Switch MIPS clo/clz and the condition tests to TCG.
ths
1
-0
/
+10
2008-05-18
Switch most MIPS logical and arithmetic instructions to TCG.
ths
1
-50
/
+12
2008-05-10
fixed do_restore_state()
bellard
1
-5
/
+7
2008-02-12
Make MIPS MT implementation more cache friendly.
ths
1
-20
/
+20
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