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author | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-11-11 11:47:06 +0000 |
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committer | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-11-11 11:47:06 +0000 |
commit | 49bcf33cc7c94655c0a48f8de9b3473d29bb6ed0 (patch) | |
tree | 94df6bd0899b13b0e9d5cbc00551bf7472ff1d49 /target-mips/op_helper.c | |
parent | 505ad7c2ffd1caf82a6789b610bff82b8b6ad472 (diff) | |
download | qemu-49bcf33cc7c94655c0a48f8de9b3473d29bb6ed0.tar.gz qemu-49bcf33cc7c94655c0a48f8de9b3473d29bb6ed0.tar.bz2 qemu-49bcf33cc7c94655c0a48f8de9b3473d29bb6ed0.zip |
target-mips: convert bit shuffle ops to TCG
Bit shuffle operations can be written with very few TCG instructions
(between 5 and 8), so it is worth converting them to TCG.
This code also move all bit shuffle generation code to a separate
function in order to have a cleaner exception code path, that is it
doesn't store back the TCG register to the target register after the
exception, as the TCG register doesn't exist anymore.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5679 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/op_helper.c')
-rw-r--r-- | target-mips/op_helper.c | 19 |
1 files changed, 0 insertions, 19 deletions
diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c index b6425938f8..3fe62fb25f 100644 --- a/target-mips/op_helper.c +++ b/target-mips/op_helper.c @@ -1781,25 +1781,6 @@ target_ulong do_rdhwr_ccres(void) return 0; } -/* Bit shuffle operations. */ -target_ulong do_wsbh(target_ulong t1) -{ - return (int32_t)(((t1 << 8) & ~0x00FF00FF) | ((t1 >> 8) & 0x00FF00FF)); -} - -#if defined(TARGET_MIPS64) -target_ulong do_dsbh(target_ulong t1) -{ - return ((t1 << 8) & ~0x00FF00FF00FF00FFULL) | ((t1 >> 8) & 0x00FF00FF00FF00FFULL); -} - -target_ulong do_dshd(target_ulong t1) -{ - t1 = ((t1 << 16) & ~0x0000FFFF0000FFFFULL) | ((t1 >> 16) & 0x0000FFFF0000FFFFULL); - return (t1 << 32) | (t1 >> 32); -} -#endif - void do_pmon (int function) { function /= 2; |