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AgeCommit message (Expand)AuthorFilesLines
2013-10-11Merge remote-tracking branch 'rth/tcg-pull' into stagingAnthony Liguori2-7/+4
2013-10-10Merge remote-tracking branch 'afaerber/tags/qom-cpu-for-anthony' into stagingAnthony Liguori1-3/+0
2013-10-10tcg: Remove stray semi-colons from target-*/helper.hRichard Henderson1-4/+4
2013-10-10tcg: Move helper registration into tcg_context_initRichard Henderson1-3/+0
2013-10-07cpu: Drop cpu_model_str from CPU_COMMONAndreas Färber1-3/+0
2013-09-25misc: Use new rotate functionsStefan Weil1-1/+1
2013-09-10target-arm: Add AArch64 gdbstub supportAlexander Graf4-1/+80
2013-09-10target-arm: Add AArch64 translation stubAlexander Graf6-4/+178
2013-09-10target-arm: Prepare translation for AArch64 codeAlexander Graf5-38/+151
2013-09-10target-arm: Disable 32 bit CPUs in 64 bit linux-user buildsPeter Maydell1-2/+7
2013-09-10target-arm: Add new AArch64CPUInfo base class and subclassesPeter Maydell3-0/+124
2013-09-10target-arm: Pass DisasContext* to gen_set_pc_im()Peter Maydell1-13/+13
2013-09-10target-arm: Fix target_ulong/uint32_t confusionsAlexander Graf2-6/+7
2013-09-10target-arm: Export cpu_envAlexander Graf2-1/+3
2013-09-10target-arm: Extract the disas struct to a header fileAlexander Graf2-23/+28
2013-09-10target-arm: Abstract out load/store from a vaddr in AArch32Peter Maydell1-124/+210
2013-09-10target-arm: Implement qmp query-cpu-definitionsCole Robinson1-0/+32
2013-09-10target-arm: fix ARMv7M stack alignment on resetSebastian Ottlik1-1/+1
2013-09-10target-arm: Avoid "1 << 31" undefined behaviourPeter Maydell2-18/+18
2013-09-10target-arm: Use sextract32() in branch decodePeter Maydell1-2/+3
2013-09-10target-arm: Make '-cpu any' available in linux-user mode onlyPeter Maydell1-0/+4
2013-09-03Merge remote-tracking branch 'mjt/trivial-patches' into stagingAnthony Liguori1-0/+4
2013-09-02tcg: Change tcg_gen_exit_tb argument to uintptr_tRichard Henderson1-1/+1
2013-09-01target-arm: Report unimplemented opcodes (LOG_UNIMP)Stefan Weil1-0/+4
2013-08-22aio / timers: Switch entire codebase to the new timer APIAlex Bligh2-7/+7
2013-08-20target-arm: Implement the generic timerPeter Maydell5-8/+290
2013-08-20target-arm: Support coprocessor registers which do I/OPeter Maydell2-4/+18
2013-08-20target-arm: Allow raw_read() and raw_write() to handle 64 bit regsPeter Maydell1-2/+10
2013-08-20target-arm: Make IRQ and FIQ gpio lines on the CPU objectPeter Maydell2-0/+63
2013-08-20target-arm: Implement 'int' loglevelPeter Maydell1-0/+42
2013-07-29cpu: Partially revert "cpu: Change qemu_init_vcpu() argument to CPUState"Andreas Färber1-1/+3
2013-07-27misc: Use g_assert_not_reached for code which is expected to be unreachableStefan Weil1-1/+1
2013-07-27cpu: Introduce CPUClass::gdb_core_xml_file for GDB_CORE_XMLAndreas Färber1-0/+1
2013-07-27cpu: Introduce CPUClass::gdb_{read,write}_register()Andreas Färber4-2/+16
2013-07-27gdbstub: Replace GET_REG*() macros with gdb_get_reg*() functionsAndreas Färber1-3/+3
2013-07-26target-arm: Move cpu_gdb_{read,write}_register()Andreas Färber1-0/+94
2013-07-26cpu: Introduce CPUState::gdb_num_regs and CPUClass::gdb_num_core_regsAndreas Färber1-0/+1
2013-07-23gdbstub: Change gdb_register_coprocessor() argument to CPUStateAndreas Färber1-3/+4
2013-07-23exec: Change cpu_memory_rw_debug() argument to CPUStateAndreas Färber1-1/+1
2013-07-23cpu: Turn cpu_get_phys_page_debug() into a CPUClass hookAndreas Färber3-4/+11
2013-07-23gdbstub: Change syscall callback argument to CPUStateAndreas Färber1-2/+6
2013-07-23cpu: Move singlestep_enabled field from CPU_COMMON to CPUStateAndreas Färber1-3/+4
2013-07-23cpu: Introduce CPUClass::synchronize_from_tb() for cpu_pc_from_tb()Andreas Färber1-5/+0
2013-07-23cpu: Introduce CPUClass::set_pc() for gdb_set_cpu_pc()Andreas Färber1-0/+8
2013-07-15target-arm: Avoid g_hash_table_get_keys()Peter Maydell1-2/+10
2013-07-15target-arm: avoid undefined behaviour when writing TTBCRPeter Maydell1-2/+4
2013-07-15target-arm/helper.c: Allow const opaques in arm CPPeter Crosthwaite1-1/+3
2013-07-15target-arm/helper.c: Implement MIDR aliasesPeter Crosthwaite1-5/+11
2013-07-15target-arm/helper.c: OMAP/StrongARM cp15 crn=0 cleanupPeter Crosthwaite1-9/+4
2013-07-15target-arm: explicitly decode SEVL instructionMans Rullgard1-1/+2
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