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path: root/src/intel/genxml
AgeCommit message (Expand)AuthorFilesLines
2018-08-01python: Explicitly use byte stringsMathieu Bridon1-2/+2
2018-08-01python: Open file in binary modeMathieu Bridon1-1/+1
2018-08-01python: Better get character ordinalsMathieu Bridon1-2/+2
2018-07-24python: Better iterate over dictionariesMathieu Bridon1-5/+5
2018-07-16intel/batch_decoder: decoding of 3DSTATE_CONSTANT_BODY.Sergii Romantsov1-24/+14
2018-06-18intel/genxml: Add bitmasks for CS_DEBUG_MODE2/INSTPM.Rafael Antognolli7-0/+32
2018-05-07intel/genxml: Assert that genxml field start and ends are sane.Kenneth Graunke1-0/+7
2018-05-07intel/genxml: Fix some more fake booleans in genxml.Kenneth Graunke5-11/+11
2018-05-07intel/genxml: Make assert in gen_pack_header print a message.Kenneth Graunke1-1/+1
2018-05-07intel/genxml: Fix a few invalid field widthsChris Wilson6-28/+28
2018-05-04intel/genxml: recognize 0x, 0o and 0b when setting default valueCaio Marcelo de Oliveira Filho1-1/+2
2018-04-05intel/genxml: Add Clear Color struct to gen10+.Rafael Antognolli2-0/+18
2018-04-05intel/genxml: Use a single field for clear color address on gen10.Rafael Antognolli2-8/+6
2018-04-05genxml: Preserve fields that share dword space with addresses.Rafael Antognolli1-2/+6
2018-04-03intel: genxml: decode variable length MI_LRILionel Landwerlin10-0/+40
2018-04-03intel: genxml: add preemption control instructionsLionel Landwerlin4-0/+26
2018-03-26intel/genxml: Add SAMPLER_INSTDONE register.Rafael Antognolli6-0/+139
2018-03-26intel/genxml: Add ROW_INSTDONE register.Rafael Antognolli6-0/+114
2018-03-26intel/genxml: Add SC_INSTDONE register.Rafael Antognolli6-0/+140
2018-03-20intel: genxml: add INSTPM/CS_DEBUG_MODE2 registersLionel Landwerlin7-0/+46
2018-03-05intel: Drop SURFACE_FORMAT enum from genxml.Kenneth Graunke10-2251/+17
2018-03-05intel: Split gen_device_info out into libintel_devJordan Justen1-1/+1
2018-03-02genxml: Silence unused parameter warnings in generated pack codeIan Romanick1-3/+11
2018-02-15intel/genxml/icl: Update genx_bits headerAnuj Phogat1-0/+1
2018-02-15intel/genxml/icl: Generate packing headersAnuj Phogat3-0/+6
2018-02-15intel/genxml/icl: Add gen11.xmlAnuj Phogat1-0/+3765
2018-01-11meson: don't use intermediate variables that are immediately discardedDylan Baker1-2/+1
2018-01-09genxml: Add missing INSTDONE_1 bits on Gen7.5+.Kenneth Graunke4-0/+8
2018-01-09intel: Apply Geminilake "Barrier Mode" workaround.Kenneth Graunke1-0/+8
2017-11-23genxml: fix assert guardsEric Engestrom1-5/+5
2017-11-21intel/genxml: Add helpers for determining field typeKristian H. Kristensen1-6/+17
2017-11-16genxml: Fix PIPELINE_SELECT on G45/Ironlake.Kenneth Graunke2-2/+2
2017-11-14intel/genxml: Add Cache Mode SubSlice Register to gen10.xmlAnuj Phogat1-0/+12
2017-11-13intel/genxml: Delete empty groupsJason Ekstrand4-8/+0
2017-10-03intel: Make Cube Face Enable fields consistent across generations.Kenneth Graunke6-6/+36
2017-09-27meson: Add build Intel "anv" vulkan driverDylan Baker1-0/+59
2017-09-26intel/genxml: Convert a not-present-or-"1" dict to a set.Eric Anholt1-2/+3
2017-09-02genxml: Make Border Color Pointer an address on Gen4-5, not an offset.Kenneth Graunke3-3/+3
2017-08-15intel/genxml: Fix gen10 BLEND_STATE variable length packingScott D Phillips1-2/+2
2017-07-02intel: genxml: make a couple of enums show up in aubinatorLionel Landwerlin6-45/+47
2017-06-28genxml: Silence about a billion unused parameter warningsIan Romanick1-2/+7
2017-06-22genxml: fix gen5 sampler border color state.Rafael Antognolli1-20/+20
2017-06-22intel/genxml: Add Gen10 CACHE_MODE_1 definitionsAnuj Phogat1-0/+18
2017-06-22intel/genxml: Rename StartInstanceLocation to StartingInstanceLocationAnuj Phogat1-1/+1
2017-06-22intel/genxml: Rename IndirectStatePointer to BorderColorPointerAnuj Phogat1-1/+1
2017-06-22intel/genxml: Combine DataDWord{0, 1} fields in to ImmediateData fieldAnuj Phogat1-2/+1
2017-06-22intel/genxml: Add INSTDONE registers in gen10Anuj Phogat1-0/+115
2017-06-22intel/genxml: Add better support for MI_MATH in gen10Anuj Phogat1-4/+65
2017-06-21intel/genxml: Use the same naming convention for Floating Point Mode.Rafael Antognolli1-2/+2
2017-06-21intel/genxml: Normalize URB Data field in WM_STATE.Rafael Antognolli3-3/+3