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path: root/src/jit/lsra.cpp
AgeCommit message (Expand)AuthorFilesLines
2017-03-08Do not set the last use bit on UVR ref positions.Pat Gavlin1-1/+1
2017-03-08Fix extend lifetimes stress.Pat Gavlin1-3/+25
2017-03-08Format code.Pat Gavlin1-1/+2
2017-03-07Calculate last uses during buildIntervals.Pat Gavlin1-65/+73
2017-03-03RyuJIT/ARM32: enable codegen for long nodes.Mikhail Skvortcov1-2/+0
2017-02-28Merge pull request #9609 from pgavlin/HandleContainedNodesEarlierPat Gavlin1-21/+33
2017-02-28Handle contained nodes earlier in buildRefPositionsForNode.Pat Gavlin1-21/+33
2017-03-01RyuJIT/ARM32: Enable P/Invoke lowering.Mikhail Skvortcov1-1/+3
2017-02-23RyuJIT/ARM32: Fix helper kill mask and call target consumingMikhail Skvortcov1-3/+0
2017-02-05Enable SIMD for RyuJIT/x86Bruce Forstall1-2/+2
2017-01-11Fix initialization of resolution setsCarol Eidt1-7/+23
2016-12-15Merge pull request #8207 from CarolEidt/StreamlineResolutionCarol Eidt1-61/+188
2016-12-12Merge pull request #8532 from sivarv/fixedRegFixSivarv1-43/+39
2016-12-09Fix to issue 8286.sivarv1-43/+39
2016-12-09Merge pull request #8544 from sivarv/moveRegFixSivarv1-7/+8
2016-12-08Fix to issue 8287.sivarv1-7/+8
2016-12-08Merge pull request #8537 from pgavlin/VSO299202Pat Gavlin1-1/+45
2016-12-08Correct an assertion in LSRA.Pat Gavlin1-3/+2
2016-12-08Disable special put args for LIMIT_CALLER on x86.Pat Gavlin1-1/+45
2016-12-06Streamline LSRA resolutionCarol Eidt1-61/+188
2016-12-06Fix to issue 8356.sivarv1-7/+24
2016-11-22x86: not all fields of promoted struct need regsCarol Eidt1-3/+14
2016-11-08If the very first ref position of an interval has a register assignment of RB...sivarv1-2/+2
2016-11-04While unassigning a phyReg, establish association with a previous intervalsivarv1-1/+2
2016-10-24Fix the condition to dump a basic block stats.sivarv1-1/+1
2016-10-19Enable Enter/Leave/Tailcall hooks for RyuJIT/x86Bruce Forstall1-3/+2
2016-10-11Dump LSRA stats.sivarv1-1/+155
2016-10-06Merge pull request #7504 from pgavlin/NormalizeSpillsPat Gavlin1-36/+28
2016-10-06Fix a typo and a formatting issue.Pat Gavlin1-2/+1
2016-10-06Always normalize stores when spilling lclVars.Pat Gavlin1-36/+29
2016-10-05Support double-aligned frames for RyuJIT/x86Carol Eidt1-23/+97
2016-09-29Optimize codegen when SIMD (in)Equality that produces bool result is compared...sivarv1-1/+1
2016-09-21Support Lower to reserve internal register(s) different from targetReg.sivarv1-8/+9
2016-09-21Merge pull request #7291 from adiaaida/formatMichelle McDaniel1-77/+47
2016-09-21Fix conflicts between nix and Windows formattingMichelle McDaniel1-0/+2
2016-09-21Reformat jit code on OSXMichelle McDaniel1-1/+1
2016-09-21Reformat jit code for Windows x64Michelle McDaniel1-76/+44
2016-09-21Merge pull request #7289 from CarolEidt/Fix7196Carol Eidt1-1/+1
2016-09-21Fix Issue 7196: No extra internal regs for block nodesCarol Eidt1-1/+1
2016-09-20Support GT_OBJ for x86Carol Eidt1-5/+7
2016-09-15Merge pull request #7194 from sivarv/jitstressregs1or8FixSivarv1-57/+203
2016-09-15Fix LSRA stress modes not to constrain candidates to below thesivarv1-57/+203
2016-09-14Merge pull request #7189 from pgavlin/x86-cmp-longPat Gavlin1-2/+2
2016-09-14Introduce GT_JCC.Pat Gavlin1-2/+2
2016-09-12Fix to #7091.sivarv1-4/+1
2016-09-09Merge pull request #7111 from sivarv/jitstressregs2FixSivarv1-1/+30
2016-09-08Fix to #7087sivarv1-1/+30
2016-09-07Enable long multiplyMichelle McDaniel1-0/+3
2016-09-011st Class Struct Block AssignmentsCarol Eidt1-57/+55
2016-08-31Fix #6893. (#6932)Pat Gavlin1-15/+13
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