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path: root/drivers/ddr
AgeCommit message (Expand)AuthorFilesLines
2023-08-09treewide: unify the linker symbol reference formatShiji Yang1-2/+2
2023-05-21ddr: imx9: update the rank setting for multi fsp supportJacky Bai1-62/+116
2023-05-21ddr: imx93: update the ddr init to support mult setpointsJacky Bai2-5/+113
2023-05-21ddr: imx93: Add 625M bypass clock supportJacky Bai1-0/+3
2023-05-21ddr: imx9: Change the saved ddr data base to 0x2051c000Jacky Bai1-1/+1
2023-05-21ddr: imx9: Add workaround for DDRPHY rank-to-rank errataYe Li1-0/+122
2023-05-06drivers: use devfdt_get_addr_index_ptr when cast to pointerJohan Jonker1-2/+2
2023-04-13ddr: marvell: a38x: Perform DDR training sequence again for 2nd bootTony Dinh1-7/+0
2023-03-29ddr: imx: Update the ddr init flow on imx8ulpJacky Bai1-12/+43
2023-03-29ddr: imx8ulp: Change DRAM timing save area to 0x20055000Ye Li1-1/+1
2023-03-24ddr: marvell: a38x: Remove unused file seq_exec.hPali Rohár2-65/+0
2023-01-30ddr: imx: Handle both 3733 and 3732 MTps ratesMarek Vasut1-0/+1
2023-01-26ddr: marvell: a38x: Add support for DDR4 from Marvell mv-ddr-marvell repositoryTony Dinh27-0/+5991
2023-01-20global: Finish CONFIG -> CFG migrationTom Rini2-8/+8
2022-12-23global: Migrate CONFIG_MAX_MEM_MAPPED to CFGTom Rini1-3/+3
2022-12-23global: Remove undef CONFIG_... for unused valuesTom Rini1-2/+0
2022-12-22ddr: fsl: Remove CONFIG_MEM_INIT_VALUETom Rini2-16/+3
2022-12-05Convert CONFIG_SPD_EEPROM to KconfigTom Rini1-0/+8
2022-12-05global: Move remaining CONFIG_SYS_* to CFG_SYS_*Tom Rini1-2/+2
2022-12-05global: Move remaining CONFIG_SYS_SDRAM_* to CFG_SYS_SDRAM_*Tom Rini5-6/+6
2022-11-10global: Migrate CONFIG_SYS_FSL* symbols to the CFG_SYS namespaceTom Rini9-39/+39
2022-11-10global: Migrate CONFIG_SYS_MPC8* symbols to the CFG_SYS namespaceTom Rini2-2/+2
2022-11-02treewide: Remove the unnecessary space before semicolonBin Meng1-1/+1
2022-10-24imx8m: fix reading of DDR4 MR registers [again]Rasmus Villemoes1-1/+7
2022-09-23ddr: fsl: Fix re-align of verbose DRAM information for non-SPL buildsPali Rohár1-0/+3
2022-09-23ddr: fsl: Allow to detect 4 GB DDR modules in 32-bit modePali Rohár1-4/+10
2022-09-23ddr: fsl: Fix fsl_ddr_sdram_size() for 4GB modules with 32-bit phys_size_tPali Rohár1-0/+4
2022-09-23ddr: fsl: Fix checking for maximal mappable memoryPali Rohár1-5/+14
2022-09-19Merge branch 'master' into nextTom Rini4-374/+5
2022-09-18imx8m: ddrphy_utils: Remove unused fileMarek Vasut1-369/+0
2022-09-18cyclic: Use schedule() instead of WATCHDOG_RESET()Stefan Roese3-5/+5
2022-09-06ddr: fsl: Make bank_addr_bits reflect actual bitsSean Anderson2-2/+2
2022-09-06ddr: fsl: Reduce the size of interactive optionsSean Anderson1-3/+3
2022-08-12Convert CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS et al to KconfigTom Rini1-0/+7
2022-08-10common: Drop display_options.h from common headerSimon Glass1-0/+1
2022-08-04Convert CONFIG_SYS_FSL_DDR_INTLV_256B to KconfigTom Rini1-0/+7
2022-07-26ddr: imx8m: helper: load ddr firmware according to binman symbolsPeng Fan1-6/+41
2022-07-26ddr: imx9: enable Performance monitor counterYe Li2-0/+10
2022-07-26ddr: imx: Add i.MX9 DDR controller driverYe Li13-23/+946
2022-07-05Convert CONFIG_SYS_DDR_RAW_TIMING to KconfigTom Rini1-0/+7
2022-07-05Convert CONFIG_SYS_SPD_BUS_NUM to KconfigTom Rini1-0/+5
2022-07-05nxp: Cleanup some emulator related options.Tom Rini1-0/+6
2022-06-20Merge branch 'master' into nextTom Rini4-7/+8
2022-06-17ddr: altera: soc64: Integer fix overflow that caused DDR size mismatchedDinesh Maniyam1-2/+3
2022-06-16ddr: altera: Stratix10: Use phys_size_t for memory sizeTien Fong Chee1-2/+2
2022-06-16ddr: altera: Ignore bit[7-4] for both seq2core & core2seq handshake in HPSTien Fong Chee1-1/+1
2022-06-15intel: n5x: ddr: update licenseTien Fong Chee1-2/+2
2022-06-06Convert CONFIG_SPL_COMMON_INIT_DDR to KconfigTom Rini1-0/+14
2022-05-20imx8m: fix reading of DDR4 MR registersRasmus Villemoes1-2/+7
2022-04-26ddr: fsl: Allow to compile it without env supportPali Rohár1-0/+4