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Diffstat (limited to 'arch/riscv/cpu/cpu.c')
-rw-r--r--arch/riscv/cpu/cpu.c9
1 files changed, 4 insertions, 5 deletions
diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c
index e9a8b437ed..5ca185745e 100644
--- a/arch/riscv/cpu/cpu.c
+++ b/arch/riscv/cpu/cpu.c
@@ -7,7 +7,6 @@
#include <cpu.h>
#include <dm.h>
#include <log.h>
-#include <asm/csr.h>
#include <asm/encoding.h>
#include <dm/uclass-internal.h>
@@ -48,7 +47,7 @@ static inline bool supports_extension(char ext)
return false;
#else /* !CONFIG_CPU */
#ifdef CONFIG_RISCV_MMODE
- return csr_read(misa) & (1 << (ext - 'a'));
+ return csr_read(CSR_MISA) & (1 << (ext - 'a'));
#else /* !CONFIG_RISCV_MMODE */
#warning "There is no way to determine the available extensions in S-mode."
#warning "Please convert your board to use the RISC-V CPU driver."
@@ -82,7 +81,7 @@ int arch_cpu_init_dm(void)
/* Enable FPU */
if (supports_extension('d') || supports_extension('f')) {
csr_set(MODE_PREFIX(status), MSTATUS_FS);
- csr_write(fcsr, 0);
+ csr_write(CSR_FCSR, 0);
}
if (CONFIG_IS_ENABLED(RISCV_MMODE)) {
@@ -90,11 +89,11 @@ int arch_cpu_init_dm(void)
* Enable perf counters for cycle, time,
* and instret counters only
*/
- csr_write(mcounteren, GENMASK(2, 0));
+ csr_write(CSR_MCOUNTEREN, GENMASK(2, 0));
/* Disable paging */
if (supports_extension('s'))
- csr_write(satp, 0);
+ csr_write(CSR_SATP, 0);
}
return 0;