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| author | Tom Rini <trini@konsulko.com> | 2023-11-20 09:19:50 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2023-11-20 09:19:50 -0500 |
| commit | dca7a8958f8d0dbd53072caa4353353e062d80ca (patch) | |
| tree | 2ba9b27f1799d23f5bd3355feaf6276646297b9d | |
| parent | 9e4b42267e1fb5805ecddbb92629f456d8cd4047 (diff) | |
| parent | 24ca49b33af98d54d6cd2e845f071f6565345ffd (diff) | |
| download | u-boot-dca7a8958f8d0dbd53072caa4353353e062d80ca.tar.gz u-boot-dca7a8958f8d0dbd53072caa4353353e062d80ca.tar.bz2 u-boot-dca7a8958f8d0dbd53072caa4353353e062d80ca.zip | |
Merge tag 'v2024.01-rc3' into next
Prepare v2024.01-rc3
595 files changed, 4655 insertions, 1415 deletions
diff --git a/.gitignore b/.gitignore index a1a79e92fe..3301481192 100644 --- a/.gitignore +++ b/.gitignore @@ -61,7 +61,6 @@ fit-dtb.blob* # Generated files # /spl/ -/tools/generated/ /tpl/ /defconfig @@ -327,7 +327,7 @@ config SPL_SYS_MALLOC_F_LEN malloc() region in SDRAM once it is inited. config TPL_SYS_MALLOC_F - bool "Enable malloc() pool in SPL" + bool "Enable malloc() pool in TPL" depends on SYS_MALLOC_F && TPL default y if SPL_SYS_MALLOC_F help diff --git a/MAINTAINERS b/MAINTAINERS index 091e6bb508..7c1cb2dc4d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -58,7 +58,7 @@ F: lib/acpi/ ANDROID AB M: Igor Opaniuk <igor.opaniuk@gmail.com> -R: Sam Protsenko <joe.skb7@gmail.com> +R: Sam Protsenko <semen.protsenko@linaro.org> S: Maintained F: cmd/ab_select.c F: common/android_ab.c @@ -950,6 +950,7 @@ F: include/cyclic.h DFU M: Lukasz Majewski <lukma@denx.de> +M: Mattijs Korpershoek <mkorpershoek@baylibre.com> S: Maintained T: git https://source.denx.de/u-boot/custodians/u-boot-dfu.git F: cmd/dfu.c @@ -1056,7 +1057,8 @@ F: test/common/event.c F: test/py/tests/test_event_dump.py FASTBOOT -S: Orphaned +M: Mattijs Korpershoek <mkorpershoek@baylibre.com> +S: Maintained F: cmd/fastboot.c F: doc/android/fastboot*.rst F: include/fastboot.h @@ -3,7 +3,7 @@ VERSION = 2024 PATCHLEVEL = 01 SUBLEVEL = -EXTRAVERSION = -rc2 +EXTRAVERSION = -rc3 NAME = # *DOCUMENTATION* diff --git a/arch/arm/cpu/armv7/mpu_v7r.c b/arch/arm/cpu/armv7/mpu_v7r.c index 57ab640e26..1d31c63e5f 100644 --- a/arch/arm/cpu/armv7/mpu_v7r.c +++ b/arch/arm/cpu/armv7/mpu_v7r.c @@ -2,7 +2,7 @@ /* * Cortex-R Memory Protection Unit specific code * - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ * Lokesh Vutla <lokeshvutla@ti.com> */ diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c index cb1131a048..697334086f 100644 --- a/arch/arm/cpu/armv8/cache_v8.c +++ b/arch/arm/cpu/armv8/cache_v8.c @@ -93,16 +93,10 @@ u64 get_tcr(u64 *pips, u64 *pva_bits) if (el == 1) { tcr = TCR_EL1_RSVD | (ips << 32) | TCR_EPD1_DISABLE; - if (gd->arch.has_hafdbs) - tcr |= TCR_EL1_HA | TCR_EL1_HD; } else if (el == 2) { tcr = TCR_EL2_RSVD | (ips << 16); - if (gd->arch.has_hafdbs) - tcr |= TCR_EL2_HA | TCR_EL2_HD; } else { tcr = TCR_EL3_RSVD | (ips << 16); - if (gd->arch.has_hafdbs) - tcr |= TCR_EL3_HA | TCR_EL3_HD; } /* PTWs cacheable, inner/outer WBWA and inner shareable */ @@ -206,9 +200,6 @@ static void __cmo_on_leaves(void (*cmo_fn)(unsigned long, unsigned long), attrs != PTE_BLOCK_MEMTYPE(MT_NORMAL_NC)) continue; - if (gd->arch.has_hafdbs && (pte & (PTE_RDONLY | PTE_DBM)) != PTE_DBM) - continue; - end = va + BIT(level2shift(level)) - 1; /* No intersection with RAM? */ @@ -318,7 +309,7 @@ static void map_range(u64 virt, u64 phys, u64 size, int level, for (i = idx; size; i++) { u64 next_size, *next_table; - if (level >= gd->arch.first_block_level && + if (level >= 1 && size >= map_size && !(virt & (map_size - 1))) { if (level == 3) table[i] = phys | attrs | PTE_TYPE_PAGE; @@ -357,12 +348,6 @@ static void add_map(struct mm_region *map) if (va_bits < 39) level = 1; - if (!gd->arch.first_block_level) - gd->arch.first_block_level = 1; - - if (gd->arch.has_hafdbs) - attrs |= PTE_DBM | PTE_RDONLY; - map_range(map->virt, map->phys, map->size, level, (u64 *)gd->arch.tlb_addr, attrs); } @@ -376,7 +361,7 @@ static void count_range(u64 virt, u64 size, int level, int *cntp) for (i = idx; size; i++) { u64 next_size; - if (level >= gd->arch.first_block_level && + if (level >= 1 && size >= map_size && !(virt & (map_size - 1))) { virt += map_size; size -= map_size; @@ -414,16 +399,7 @@ static int count_ranges(void) __weak u64 get_page_table_size(void) { u64 one_pt = MAX_PTE_ENTRIES * sizeof(u64); - u64 size, mmfr1; - - asm volatile("mrs %0, id_aa64mmfr1_el1" : "=r" (mmfr1)); - if ((mmfr1 & 0xf) == 2) { - gd->arch.has_hafdbs = true; - gd->arch.first_block_level = 2; - } else { - gd->arch.has_hafdbs = false; - gd->arch.first_block_level = 1; - } + u64 size; /* Account for all page tables we would need to cover our memory map */ size = one_pt * count_ranges(); diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index e0a0d430da..2076765937 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -194,6 +194,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3588) += \ rk3588-nanopc-t6.dtb \ rk3588s-orangepi-5.dtb \ rk3588-orangepi-5-plus.dtb \ + rk3588-quartzpro64.dtb \ rk3588s-rock-5a.dtb \ rk3588-rock-5b.dtb @@ -376,6 +377,12 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \ zynq-cse-nand.dtb \ zynq-cse-nor.dtb \ zynq-cse-qspi-single.dtb \ + zynq-cse-qspi-parallel.dtb \ + zynq-cse-qspi-stacked.dtb \ + zynq-cse-qspi-x1-single.dtb \ + zynq-cse-qspi-x1-stacked.dtb \ + zynq-cse-qspi-x2-single.dtb \ + zynq-cse-qspi-x2-stacked.dtb \ zynq-dlc20-rev1.0.dtb \ zynq-microzed.dtb \ zynq-minized.dtb \ @@ -417,6 +424,13 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += \ zynqmp-mini-emmc1.dtb \ zynqmp-mini-nand.dtb \ zynqmp-mini-qspi.dtb \ + zynqmp-mini-qspi-parallel.dtb \ + zynqmp-mini-qspi-single.dtb \ + zynqmp-mini-qspi-stacked.dtb \ + zynqmp-mini-qspi-x1-single.dtb \ + zynqmp-mini-qspi-x1-stacked.dtb \ + zynqmp-mini-qspi-x2-single.dtb \ + zynqmp-mini-qspi-x2-stacked.dtb \ zynqmp-sc-revB.dtb \ zynqmp-sc-revC.dtb \ zynqmp-sc-vek280-revA.dtbo \ @@ -467,13 +481,27 @@ dtb-$(CONFIG_ARCH_VERSAL) += \ versal-mini-emmc0.dtb \ versal-mini-emmc1.dtb \ versal-mini-ospi-single.dtb \ + versal-mini-ospi-stacked.dtb \ + versal-mini-qspi-parallel.dtb \ versal-mini-qspi-single.dtb \ + versal-mini-qspi-stacked.dtb \ + versal-mini-qspi-x1-single.dtb \ + versal-mini-qspi-x1-stacked.dtb \ + versal-mini-qspi-x2-single.dtb \ + versal-mini-qspi-x2-stacked.dtb \ xilinx-versal-virt.dtb dtb-$(CONFIG_ARCH_VERSAL_NET) += \ versal-net-mini.dtb \ versal-net-mini-emmc.dtb \ versal-net-mini-ospi-single.dtb \ + versal-net-mini-ospi-stacked.dtb \ versal-net-mini-qspi-single.dtb \ + versal-net-mini-qspi-parallel.dtb \ + versal-net-mini-qspi-stacked.dtb \ + versal-net-mini-qspi-x1-single.dtb \ + versal-net-mini-qspi-x1-stacked.dtb \ + versal-net-mini-qspi-x2-single.dtb \ + versal-net-mini-qspi-x2-stacked.dtb \ xilinx-versal-net-virt.dtb dtb-$(CONFIG_ARCH_ZYNQMP_R5) += \ zynqmp-r5.dtb @@ -693,6 +721,7 @@ dtb-$(CONFIG_MACH_SUN7I) += \ sun7i-a20-haoyu-marsboard.dtb \ sun7i-a20-hummingbird.dtb \ sun7i-a20-i12-tvbox.dtb \ + sun7i-a20-icnova-a20-adb4006.dtb \ sun7i-a20-icnova-swac.dtb \ sun7i-a20-itead-ibox.dtb \ sun7i-a20-lamobo-r1.dtb \ diff --git a/arch/arm/dts/am335x-baltos.dts b/arch/arm/dts/am335x-baltos.dts index b3c13c9a9d..34b87d47a7 100644 --- a/arch/arm/dts/am335x-baltos.dts +++ b/arch/arm/dts/am335x-baltos.dts @@ -1,5 +1,5 @@ /* - * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as diff --git a/arch/arm/dts/am335x-evm-u-boot.dtsi b/arch/arm/dts/am335x-evm-u-boot.dtsi index 82a483ae3e..72402c8292 100644 --- a/arch/arm/dts/am335x-evm-u-boot.dtsi +++ b/arch/arm/dts/am335x-evm-u-boot.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ */ #include "am33xx-u-boot.dtsi" diff --git a/arch/arm/dts/am335x-evmsk.dts b/arch/arm/dts/am335x-evmsk.dts index 5d962252b7..e0267657f9 100644 --- a/arch/arm/dts/am335x-evmsk.dts +++ b/arch/arm/dts/am335x-evmsk.dts @@ -5,7 +5,7 @@ /* * AM335x Starter Kit - * http://www.ti.com/tool/tmdssk3358 + * https://www.ti.com/tool/tmdssk3358 */ /dts-v1/; diff --git a/arch/arm/dts/am335x-icev2-u-boot.dtsi b/arch/arm/dts/am335x-icev2-u-boot.dtsi index 67bfac916e..ac1feaa9d9 100644 --- a/arch/arm/dts/am335x-icev2-u-boot.dtsi +++ b/arch/arm/dts/am335x-icev2-u-boot.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/ */ #include "am33xx-u-boot.dtsi" diff --git a/arch/arm/dts/am335x-icev2.dts b/arch/arm/dts/am335x-icev2.dts index a54272421c..bcfdbb772c 100644 --- a/arch/arm/dts/am335x-icev2.dts +++ b/arch/arm/dts/am335x-icev2.dts @@ -5,7 +5,7 @@ /* * AM335x ICE V2 board - * http://www.ti.com/tool/tmdsice3359 + * https://www.ti.com/tool/tmdsice3359 */ /dts-v1/; diff --git a/arch/arm/dts/am335x-pxm2.dtsi b/arch/arm/dts/am335x-pxm2.dtsi index a51d6aceb9..a49560924b 100644 --- a/arch/arm/dts/am335x-pxm2.dtsi +++ b/arch/arm/dts/am335x-pxm2.dtsi @@ -3,7 +3,7 @@ * Heiko Schocher <hs@denx.de> * * Based on: - * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as diff --git a/arch/arm/dts/am335x-pxm50.dts b/arch/arm/dts/am335x-pxm50.dts index f4e66d29d5..69ed32c44c 100644 --- a/arch/arm/dts/am335x-pxm50.dts +++ b/arch/arm/dts/am335x-pxm50.dts @@ -2,7 +2,7 @@ * Copyright (C) 2014 DENX Software Engineering GmbH * Heiko Schocher <hs@denx.de> * - * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as diff --git a/arch/arm/dts/am335x-rut.dts b/arch/arm/dts/am335x-rut.dts index 7760b9709a..0dcd561d99 100644 --- a/arch/arm/dts/am335x-rut.dts +++ b/arch/arm/dts/am335x-rut.dts @@ -3,7 +3,7 @@ * Heiko Schocher <hs@denx.de> * * Based on: - * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as diff --git a/arch/arm/dts/am335x-sancloud-bbe-extended-wifi.dts b/arch/arm/dts/am335x-sancloud-bbe-extended-wifi.dts index a2676d10c2..271d1ab356 100644 --- a/arch/arm/dts/am335x-sancloud-bbe-extended-wifi.dts +++ b/arch/arm/dts/am335x-sancloud-bbe-extended-wifi.dts @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (C) 2021 Sancloud Ltd - * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ */ /dts-v1/; diff --git a/arch/arm/dts/am335x-sancloud-bbe-lite-u-boot.dtsi b/arch/arm/dts/am335x-sancloud-bbe-lite-u-boot.dtsi index fd47bc23a2..db0288820d 100644 --- a/arch/arm/dts/am335x-sancloud-bbe-lite-u-boot.dtsi +++ b/arch/arm/dts/am335x-sancloud-bbe-lite-u-boot.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ * Copyright (C) 2021 SanCloud Ltd */ diff --git a/arch/arm/dts/am335x-sancloud-bbe-lite.dts b/arch/arm/dts/am335x-sancloud-bbe-lite.dts index 8ffbc72dc5..daa90f64a8 100644 --- a/arch/arm/dts/am335x-sancloud-bbe-lite.dts +++ b/arch/arm/dts/am335x-sancloud-bbe-lite.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ * Copyright (C) 2021 SanCloud Ltd */ /dts-v1/; diff --git a/arch/arm/dts/am4372-generic-u-boot.dtsi b/arch/arm/dts/am4372-generic-u-boot.dtsi index 1dd0a5dac1..40f3756eb3 100644 --- a/arch/arm/dts/am4372-generic-u-boot.dtsi +++ b/arch/arm/dts/am4372-generic-u-boot.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ */ #include "am4372-u-boot.dtsi" diff --git a/arch/arm/dts/am4372-generic.dts b/arch/arm/dts/am4372-generic.dts index b8a2bb82ef..2524e0405c 100644 --- a/arch/arm/dts/am4372-generic.dts +++ b/arch/arm/dts/am4372-generic.dts @@ -2,7 +2,7 @@ /* * Device Tree Source for Generic AM4372 EVM * - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ */ /dts-v1/; diff --git a/arch/arm/dts/am4372-u-boot.dtsi b/arch/arm/dts/am4372-u-boot.dtsi index 2fac2fcdf9..0c498bcf08 100644 --- a/arch/arm/dts/am4372-u-boot.dtsi +++ b/arch/arm/dts/am4372-u-boot.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ */ /{ diff --git a/arch/arm/dts/am437x-gp-evm-u-boot.dtsi b/arch/arm/dts/am437x-gp-evm-u-boot.dtsi index da0b1365ff..6393170ad2 100644 --- a/arch/arm/dts/am437x-gp-evm-u-boot.dtsi +++ b/arch/arm/dts/am437x-gp-evm-u-boot.dtsi @@ -1,5 +1,5 @@ /* - * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as diff --git a/arch/arm/dts/am437x-idk-evm-u-boot.dtsi b/arch/arm/dts/am437x-idk-evm-u-boot.dtsi index 4e6ad9445b..7c9f80e7ba 100644 --- a/arch/arm/dts/am437x-idk-evm-u-boot.dtsi +++ b/arch/arm/dts/am437x-idk-evm-u-boot.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ */ #include "am4372-u-boot.dtsi" diff --git a/arch/arm/dts/am437x-sk-evm-u-boot.dtsi b/arch/arm/dts/am437x-sk-evm-u-boot.dtsi index 43e519c4e5..580ba3512b 100644 --- a/arch/arm/dts/am437x-sk-evm-u-boot.dtsi +++ b/arch/arm/dts/am437x-sk-evm-u-boot.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ */ #include "am4372-u-boot.dtsi" diff --git a/arch/arm/dts/am571x-idk-u-boot.dtsi b/arch/arm/dts/am571x-idk-u-boot.dtsi index 65199200ed..98a7a7eeb3 100644 --- a/arch/arm/dts/am571x-idk-u-boot.dtsi +++ b/arch/arm/dts/am571x-idk-u-boot.dtsi @@ -1,5 +1,5 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/ */ #include "am57xx-idk-common-u-boot.dtsi" diff --git a/arch/arm/dts/am5729-beagleboneai.dts b/arch/arm/dts/am5729-beagleboneai.dts index f772aefb8f..75a29e65e1 100644 --- a/arch/arm/dts/am5729-beagleboneai.dts +++ b/arch/arm/dts/am5729-beagleboneai.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Copyright (C) 2014-2019 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2014-2019 Texas Instruments Incorporated - https://www.ti.com/ */ /dts-v1/; diff --git a/arch/arm/dts/am572x-idk-u-boot.dtsi b/arch/arm/dts/am572x-idk-u-boot.dtsi index 65199200ed..98a7a7eeb3 100644 --- a/arch/arm/dts/am572x-idk-u-boot.dtsi +++ b/arch/arm/dts/am572x-idk-u-boot.dtsi @@ -1,5 +1,5 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/ */ #include "am57xx-idk-common-u-boot.dtsi" diff --git a/arch/arm/dts/am574x-idk-u-boot.dtsi b/arch/arm/dts/am574x-idk-u-boot.dtsi index 65199200ed..98a7a7eeb3 100644 --- a/arch/arm/dts/am574x-idk-u-boot.dtsi +++ b/arch/arm/dts/am574x-idk-u-boot.dtsi @@ -1,5 +1,5 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/ */ #include "am57xx-idk-common-u-boot.dtsi" diff --git a/arch/arm/dts/am57xx-beagle-x15-revb1-u-boot.dtsi b/arch/arm/dts/am57xx-beagle-x15-revb1-u-boot.dtsi index 49b16215e5..2af4e60cda 100644 --- a/arch/arm/dts/am57xx-beagle-x15-revb1-u-boot.dtsi +++ b/arch/arm/dts/am57xx-beagle-x15-revb1-u-boot.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/ */ #include "omap5-u-boot.dtsi" diff --git a/arch/arm/dts/am57xx-beagle-x15-revc-u-boot.dtsi b/arch/arm/dts/am57xx-beagle-x15-revc-u-boot.dtsi index 49b16215e5..2af4e60cda 100644 --- a/arch/arm/dts/am57xx-beagle-x15-revc-u-boot.dtsi +++ b/arch/arm/dts/am57xx-beagle-x15-revc-u-boot.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/ */ #include "omap5-u-boot.dtsi" diff --git a/arch/arm/dts/am57xx-beagle-x15-u-boot.dtsi b/arch/arm/dts/am57xx-beagle-x15-u-boot.dtsi index 49b16215e5..2af4e60cda 100644 --- a/arch/arm/dts/am57xx-beagle-x15-u-boot.dtsi +++ b/arch/arm/dts/am57xx-beagle-x15-u-boot.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/ */ #include "omap5-u-boot.dtsi" diff --git a/arch/arm/dts/am57xx-cl-som-am57x-u-boot.dtsi b/arch/arm/dts/am57xx-cl-som-am57x-u-boot.dtsi index 49b16215e5..2af4e60cda 100644 --- a/arch/arm/dts/am57xx-cl-som-am57x-u-boot.dtsi +++ b/arch/arm/dts/am57xx-cl-som-am57x-u-boot.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/ */ #include "omap5-u-boot.dtsi" diff --git a/arch/arm/dts/am57xx-idk-common-u-boot.dtsi b/arch/arm/dts/am57xx-idk-common-u-boot.dtsi index b07aea0048..31faec4afe 100644 --- a/arch/arm/dts/am57xx-idk-common-u-boot.dtsi +++ b/arch/arm/dts/am57xx-idk-common-u-boot.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/ */ #include "omap5-u-boot.dtsi" diff --git a/arch/arm/dts/am57xx-sbc-am57x-u-boot.dtsi b/arch/arm/dts/am57xx-sbc-am57x-u-boot.dtsi index 49b16215e5..2af4e60cda 100644 --- a/arch/arm/dts/am57xx-sbc-am57x-u-boot.dtsi +++ b/arch/arm/dts/am57xx-sbc-am57x-u-boot.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/ */ #include "omap5-u-boot.dtsi" diff --git a/arch/arm/dts/bitmain-antminer-s9.dts b/arch/arm/dts/bitmain-antminer-s9.dts index 0228b4b30e..f5ad95a276 100644 --- a/arch/arm/dts/bitmain-antminer-s9.dts +++ b/arch/arm/dts/bitmain-antminer-s9.dts @@ -52,6 +52,8 @@ &nfc0 { status = "okay"; + #address-cells = <1>; + #size-cells = <0>; nand@0 { reg = <0>; }; diff --git a/arch/arm/dts/da850-lcdk-u-boot.dtsi b/arch/arm/dts/da850-lcdk-u-boot.dtsi index bbaebcb67a..9ab48bca08 100644 --- a/arch/arm/dts/da850-lcdk-u-boot.dtsi +++ b/arch/arm/dts/da850-lcdk-u-boot.dtsi @@ -2,7 +2,7 @@ /* * da850-lcdk U-Boot Additions * - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ */ / { diff --git a/arch/arm/dts/dra7-evm-u-boot.dtsi b/arch/arm/dts/dra7-evm-u-boot.dtsi index 87b2451a8e..3fe1fb4552 100644 --- a/arch/arm/dts/dra7-evm-u-boot.dtsi +++ b/arch/arm/dts/dra7-evm-u-boot.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ */ #include "omap5-u-boot.dtsi" diff --git a/arch/arm/dts/dra7-ipu-common-early-boot.dtsi b/arch/arm/dts/dra7-ipu-common-early-boot.dtsi index 90fc4cb36d..afa4595195 100644 --- a/arch/arm/dts/dra7-ipu-common-early-boot.dtsi +++ b/arch/arm/dts/dra7-ipu-common-early-boot.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/ */ / { diff --git a/arch/arm/dts/dra71-evm-u-boot.dtsi b/arch/arm/dts/dra71-evm-u-boot.dtsi index 8e7dc719bf..339b05f54a 100644 --- a/arch/arm/dts/dra71-evm-u-boot.dtsi +++ b/arch/arm/dts/dra71-evm-u-boot.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ */ #include "omap5-u-boot.dtsi" diff --git a/arch/arm/dts/dra72-evm-revc-u-boot.dtsi b/arch/arm/dts/dra72-evm-revc-u-boot.dtsi index 8e7dc719bf..339b05f54a 100644 --- a/arch/arm/dts/dra72-evm-revc-u-boot.dtsi +++ b/arch/arm/dts/dra72-evm-revc-u-boot.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ */ #include "omap5-u-boot.dtsi" diff --git a/arch/arm/dts/dra72-evm-u-boot.dtsi b/arch/arm/dts/dra72-evm-u-boot.dtsi index 91a3b6b742..dfdd5c57ad 100644 --- a/arch/arm/dts/dra72-evm-u-boot.dtsi +++ b/arch/arm/dts/dra72-evm-u-boot.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ */ #include "omap5-u-boot.dtsi" diff --git a/arch/arm/dts/dra76-evm-u-boot.dtsi b/arch/arm/dts/dra76-evm-u-boot.dtsi index 1216d93bdc..c8da3e4838 100644 --- a/arch/arm/dts/dra76-evm-u-boot.dtsi +++ b/arch/arm/dts/dra76-evm-u-boot.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ */ #include "omap5-u-boot.dtsi" diff --git a/arch/arm/dts/k3-am625-sk-u-boot.dtsi b/arch/arm/dts/k3-am625-sk-u-boot.dtsi index b78d34b459..7ae5e01f7c 100644 --- a/arch/arm/dts/k3-am625-sk-u-boot.dtsi +++ b/arch/arm/dts/k3-am625-sk-u-boot.dtsi @@ -126,7 +126,30 @@ bootph-all; }; +&main_bcdma { + reg = <0x00 0x485c0100 0x00 0x100>, + <0x00 0x4c000000 0x00 0x20000>, + <0x00 0x4a820000 0x00 0x20000>, + <0x00 0x4aa40000 0x00 0x20000>, + <0x00 0x4bc00000 0x00 0x100000>, + <0x00 0x48600000 0x00 0x8000>, + <0x00 0x484a4000 0x00 0x2000>, + <0x00 0x484c2000 0x00 0x2000>; + reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", + "ringrt" , "cfg", "tchan", "rchan"; +}; + &main_pktdma { + reg = <0x00 0x485c0000 0x00 0x100>, + <0x00 0x4a800000 0x00 0x20000>, + <0x00 0x4aa00000 0x00 0x20000>, + <0x00 0x4b800000 0x00 0x200000>, + <0x00 0x485e0000 0x00 0x10000>, + <0x00 0x484a0000 0x00 0x2000>, + <0x00 0x484c0000 0x00 0x2000>, + <0x00 0x48430000 0x00 0x1000>; + reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt", + "cfg", "tchan", "rchan", "rflow"; bootph-all; }; diff --git a/arch/arm/dts/k3-am625-verdin-wifi-dev-u-boot.dtsi b/arch/arm/dts/k3-am625-verdin-wifi-dev-u-boot.dtsi index afa24d07a4..75cb60b57d 100644 --- a/arch/arm/dts/k3-am625-verdin-wifi-dev-u-boot.dtsi +++ b/arch/arm/dts/k3-am625-verdin-wifi-dev-u-boot.dtsi @@ -42,6 +42,33 @@ bootph-all; }; +&main_bcdma { + reg = <0x00 0x485c0100 0x00 0x100>, + <0x00 0x4c000000 0x00 0x20000>, + <0x00 0x4a820000 0x00 0x20000>, + <0x00 0x4aa40000 0x00 0x20000>, + <0x00 0x4bc00000 0x00 0x100000>, + <0x00 0x48600000 0x00 0x8000>, + <0x00 0x484a4000 0x00 0x2000>, + <0x00 0x484c2000 0x00 0x2000>; + reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", + "ringrt" , "cfg", "tchan", "rchan"; +}; + +&main_pktdma { + reg = <0x00 0x485c0000 0x00 0x100>, + <0x00 0x4a800000 0x00 0x20000>, + <0x00 0x4aa00000 0x00 0x20000>, + <0x00 0x4b800000 0x00 0x200000>, + <0x00 0x485e0000 0x00 0x10000>, + <0x00 0x484a0000 0x00 0x2000>, + <0x00 0x484c0000 0x00 0x2000>, + <0x00 0x48430000 0x00 0x1000>; + reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt", + "cfg", "tchan", "rchan", "rflow"; + bootph-all; +}; + &cpsw3g { bootph-all; }; diff --git a/arch/arm/dts/k3-am642-evm-u-boot.dtsi b/arch/arm/dts/k3-am642-evm-u-boot.dtsi index 953bbe9aaf..b843078243 100644 --- a/arch/arm/dts/k3-am642-evm-u-boot.dtsi +++ b/arch/arm/dts/k3-am642-evm-u-boot.dtsi @@ -116,7 +116,30 @@ bootph-all; }; +&main_bcdma { + reg = <0x00 0x485c0100 0x00 0x100>, + <0x00 0x4c000000 0x00 0x20000>, + <0x00 0x4a820000 0x00 0x20000>, + <0x00 0x4aa40000 0x00 0x20000>, + <0x00 0x4bc00000 0x00 0x100000>, + <0x00 0x48600000 0x00 0x8000>, + <0x00 0x484a4000 0x00 0x2000>, + <0x00 0x484c2000 0x00 0x2000>; + reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt", + "cfg", "tchan", "rchan"; +}; + &main_pktdma { + reg = <0x00 0x485c0000 0x00 0x100>, + <0x00 0x4a800000 0x00 0x20000>, + <0x00 0x4aa00000 0x00 0x40000>, + <0x00 0x4b800000 0x00 0x400000>, + <0x00 0x485e0000 0x00 0x20000>, + <0x00 0x484a0000 0x00 0x4000>, + <0x00 0x484c0000 0x00 0x2000>, + <0x00 0x48430000 0x00 0x4000>; + reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt", "cfg", + "tchan", "rchan", "rflow"; bootph-all; }; diff --git a/arch/arm/dts/k3-am642-sk-u-boot.dtsi b/arch/arm/dts/k3-am642-sk-u-boot.dtsi index 40a53df0b0..2eb227c1d0 100644 --- a/arch/arm/dts/k3-am642-sk-u-boot.dtsi +++ b/arch/arm/dts/k3-am642-sk-u-boot.dtsi @@ -96,10 +96,6 @@ bootph-all; }; -&main_pktdma { - bootph-all; -}; - &mdio1_pins_default { bootph-all; }; @@ -141,10 +137,30 @@ }; &main_bcdma { + reg = <0x00 0x485c0100 0x00 0x100>, + <0x00 0x4c000000 0x00 0x20000>, + <0x00 0x4a820000 0x00 0x20000>, + <0x00 0x4aa40000 0x00 0x20000>, + <0x00 0x4bc00000 0x00 0x100000>, + <0x00 0x48600000 0x00 0x8000>, + <0x00 0x484a4000 0x00 0x2000>, + <0x00 0x484c2000 0x00 0x2000>; + reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt", + "cfg", "tchan", "rchan"; bootph-all; }; &main_pktdma { + reg = <0x00 0x485c0000 0x00 0x100>, + <0x00 0x4a800000 0x00 0x20000>, + <0x00 0x4aa00000 0x00 0x40000>, + <0x00 0x4b800000 0x00 0x400000>, + <0x00 0x485e0000 0x00 0x20000>, + <0x00 0x484a0000 0x00 0x4000>, + <0x00 0x484c0000 0x00 0x2000>, + <0x00 0x48430000 0x00 0x4000>; + reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt", "cfg", + "tchan", "rchan", "rflow"; bootph-all; }; diff --git a/arch/arm/dts/k3-am654-base-board-ddr4-1600MTs.dtsi b/arch/arm/dts/k3-am654-base-board-ddr4-1600MTs.dtsi index 5638321903..cfea21b3c9 100644 --- a/arch/arm/dts/k3-am654-base-board-ddr4-1600MTs.dtsi +++ b/arch/arm/dts/k3-am654-base-board-ddr4-1600MTs.dtsi @@ -1,8 +1,8 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/ * This file was generated by AM65x_DRA80xM_EMIF_Tool_2.02.xlsm - * http://www.ti.com/lit/pdf/spracj0 + * https://www.ti.com/lit/pdf/spracj0 * Configuration Parameters * Memory Type: DDR4 * Data Rate: 1600 MT/s diff --git a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi index e4cbc47c2a..11d83927ac 100644 --- a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi +++ b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Copyright (C) 2018-2021 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018-2021 Texas Instruments Incorporated - https://www.ti.com/ */ #include "k3-am654-r5-base-board-u-boot.dtsi" diff --git a/arch/arm/dts/k3-am654-ddr.dtsi b/arch/arm/dts/k3-am654-ddr.dtsi index 48698cdddc..9f0586ed1a 100644 --- a/arch/arm/dts/k3-am654-ddr.dtsi +++ b/arch/arm/dts/k3-am654-ddr.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ */ / { diff --git a/arch/arm/dts/k3-am654-r5-base-board-u-boot.dtsi b/arch/arm/dts/k3-am654-r5-base-board-u-boot.dtsi index 949320c91d..286604576e 100644 --- a/arch/arm/dts/k3-am654-r5-base-board-u-boot.dtsi +++ b/arch/arm/dts/k3-am654-r5-base-board-u-boot.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Copyright (C) 2018-2021 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018-2021 Texas Instruments Incorporated - https://www.ti.com/ */ #include <dt-bindings/pinctrl/k3.h> diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts b/arch/arm/dts/k3-am654-r5-base-board.dts index 7671875a55..637a5cc85e 100644 --- a/arch/arm/dts/k3-am654-r5-base-board.dts +++ b/arch/arm/dts/k3-am654-r5-base-board.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/ */ /dts-v1/; diff --git a/arch/arm/dts/k3-j7200-ddr-evm-lp4-2666.dtsi b/arch/arm/dts/k3-j7200-ddr-evm-lp4-2666.dtsi index 9ec8dff44b..f0683088cf 100644 --- a/arch/arm/dts/k3-j7200-ddr-evm-lp4-2666.dtsi +++ b/arch/arm/dts/k3-j7200-ddr-evm-lp4-2666.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/ * This file was generated by the Jacinto7_DDRSS_RegConfigTool, Revision: 0.6.0 * This file was generated on 06/01/2021 */ diff --git a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi index cd95907b98..b77f8d92de 100644 --- a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi +++ b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ */ #include "k3-j721e-binman.dtsi" diff --git a/arch/arm/dts/k3-j721e-ddr-evm-lp4-4266.dtsi b/arch/arm/dts/k3-j721e-ddr-evm-lp4-4266.dtsi index 5a6f9b11b8..66e1581151 100644 --- a/arch/arm/dts/k3-j721e-ddr-evm-lp4-4266.dtsi +++ b/arch/arm/dts/k3-j721e-ddr-evm-lp4-4266.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/ * This file was generated by the Jacinto7_DDRSS_RegConfigTool, Revision: 0.9.1 * This file was generated on 07/17/2022 */ diff --git a/arch/arm/dts/k3-j721e-ddr-sk-lp4-4266.dtsi b/arch/arm/dts/k3-j721e-ddr-sk-lp4-4266.dtsi index 6c7328e8db..18f1944474 100644 --- a/arch/arm/dts/k3-j721e-ddr-sk-lp4-4266.dtsi +++ b/arch/arm/dts/k3-j721e-ddr-sk-lp4-4266.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/ * This file was generated by the Jacinto7_DDRSS_RegConfigTool, Revision: 0.6.1 * This file was generated on 07/19/2021 */ diff --git a/arch/arm/dts/k3-j721e-ddr.dtsi b/arch/arm/dts/k3-j721e-ddr.dtsi index 3a9ea42fe5..7d2ccd9547 100644 --- a/arch/arm/dts/k3-j721e-ddr.dtsi +++ b/arch/arm/dts/k3-j721e-ddr.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/ */ / { diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts index fcd9c716a5..9655ca21d0 100644 --- a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts +++ b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/ */ /dts-v1/; diff --git a/arch/arm/dts/keystone-clocks.dtsi b/arch/arm/dts/keystone-clocks.dtsi index 457515b073..33742d8197 100644 --- a/arch/arm/dts/keystone-clocks.dtsi +++ b/arch/arm/dts/keystone-clocks.dtsi @@ -2,7 +2,7 @@ /* * Device Tree Source for Keystone 2 clock tree * - * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/ */ clocks { diff --git a/arch/arm/dts/keystone-k2e-clocks.dtsi b/arch/arm/dts/keystone-k2e-clocks.dtsi index f7592155a7..46f8ab3a11 100644 --- a/arch/arm/dts/keystone-k2e-clocks.dtsi +++ b/arch/arm/dts/keystone-k2e-clocks.dtsi @@ -2,7 +2,7 @@ /* * Keystone 2 Edison SoC specific device tree * - * Copyright (C) 2014-2017 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2014-2017 Texas Instruments Incorporated - https://www.ti.com/ */ clocks { diff --git a/arch/arm/dts/keystone-k2e-evm-u-boot.dtsi b/arch/arm/dts/keystone-k2e-evm-u-boot.dtsi index 970d452f08..953c750226 100644 --- a/arch/arm/dts/keystone-k2e-evm-u-boot.dtsi +++ b/arch/arm/dts/keystone-k2e-evm-u-boot.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ */ /{ diff --git a/arch/arm/dts/keystone-k2e-evm.dts b/arch/arm/dts/keystone-k2e-evm.dts index ed76e56369..bf88444261 100644 --- a/arch/arm/dts/keystone-k2e-evm.dts +++ b/arch/arm/dts/keystone-k2e-evm.dts @@ -2,7 +2,7 @@ /* * Keystone 2 Edison EVM device tree * - * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/ */ /dts-v1/; diff --git a/arch/arm/dts/keystone-k2e-netcp.dtsi b/arch/arm/dts/keystone-k2e-netcp.dtsi index 45ebb0ac4f..dd61503db3 100644 --- a/arch/arm/dts/keystone-k2e-netcp.dtsi +++ b/arch/arm/dts/keystone-k2e-netcp.dtsi @@ -2,7 +2,7 @@ /* * Device Tree Source for Keystone 2 Edison Netcp driver * - * Copyright (C) 2015-2017 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2015-2017 Texas Instruments Incorporated - https://www.ti.com/ */ qmss: qmss@2a40000 { diff --git a/arch/arm/dts/keystone-k2e.dtsi b/arch/arm/dts/keystone-k2e.dtsi index 496bb310c7..449cddcb81 100644 --- a/arch/arm/dts/keystone-k2e.dtsi +++ b/arch/arm/dts/keystone-k2e.dtsi @@ -2,7 +2,7 @@ /* * Keystone 2 Edison soc device tree * - * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/ */ / { diff --git a/arch/arm/dts/keystone-k2g-evm-u-boot.dtsi b/arch/arm/dts/keystone-k2g-evm-u-boot.dtsi index 05653afc7e..72b67b232d 100644 --- a/arch/arm/dts/keystone-k2g-evm-u-boot.dtsi +++ b/arch/arm/dts/keystone-k2g-evm-u-boot.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ */ /{ diff --git a/arch/arm/dts/keystone-k2g-evm.dts b/arch/arm/dts/keystone-k2g-evm.dts index 6376c62b6d..491fdc4b04 100644 --- a/arch/arm/dts/keystone-k2g-evm.dts +++ b/arch/arm/dts/keystone-k2g-evm.dts @@ -2,7 +2,7 @@ /* * Device Tree Source for K2G EVM * - * Copyright (C) 2016-2017 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2016-2017 Texas Instruments Incorporated - https://www.ti.com/ */ /dts-v1/; diff --git a/arch/arm/dts/keystone-k2g-generic-u-boot.dtsi b/arch/arm/dts/keystone-k2g-generic-u-boot.dtsi index 8e4b36c2de..3634ed7268 100644 --- a/arch/arm/dts/keystone-k2g-generic-u-boot.dtsi +++ b/arch/arm/dts/keystone-k2g-generic-u-boot.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ */ /{ diff --git a/arch/arm/dts/keystone-k2g-generic.dts b/arch/arm/dts/keystone-k2g-generic.dts index fc938a4baa..dc6c31a31b 100644 --- a/arch/arm/dts/keystone-k2g-generic.dts +++ b/arch/arm/dts/keystone-k2g-generic.dts @@ -2,7 +2,7 @@ /* * Device Tree Source for Generic 66AK2G0X EVM * - * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ */ /dts-v1/; diff --git a/arch/arm/dts/keystone-k2g-ice-u-boot.dtsi b/arch/arm/dts/keystone-k2g-ice-u-boot.dtsi index 8e4b36c2de..3634ed7268 100644 --- a/arch/arm/dts/keystone-k2g-ice-u-boot.dtsi +++ b/arch/arm/dts/keystone-k2g-ice-u-boot.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ */ /{ diff --git a/arch/arm/dts/keystone-k2g-ice.dts b/arch/arm/dts/keystone-k2g-ice.dts index cbdb6bfca8..b898ae668a 100644 --- a/arch/arm/dts/keystone-k2g-ice.dts +++ b/arch/arm/dts/keystone-k2g-ice.dts @@ -2,7 +2,7 @@ /* * Device Tree Source for K2G Industrial Communication Engine EVM * - * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ */ /dts-v1/; diff --git a/arch/arm/dts/keystone-k2g-netcp.dtsi b/arch/arm/dts/keystone-k2g-netcp.dtsi index 136cd20b76..2afb48823c 100644 --- a/arch/arm/dts/keystone-k2g-netcp.dtsi +++ b/arch/arm/dts/keystone-k2g-netcp.dtsi @@ -2,7 +2,7 @@ /* * Device Tree Source for K2G Netcp driver * - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ */ qmss: qmss@4020000 { diff --git a/arch/arm/dts/keystone-k2g.dtsi b/arch/arm/dts/keystone-k2g.dtsi index f12af433bb..5c3ff12721 100644 --- a/arch/arm/dts/keystone-k2g.dtsi +++ b/arch/arm/dts/keystone-k2g.dtsi @@ -2,7 +2,7 @@ /* * Device Tree Source for K2G SOC * - * Copyright (C) 2016-2017 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2016-2017 Texas Instruments Incorporated - https://www.ti.com/ */ #include <dt-bindings/interrupt-controller/arm-gic.h> diff --git a/arch/arm/dts/keystone-k2hk-clocks.dtsi b/arch/arm/dts/keystone-k2hk-clocks.dtsi index 4ba6912176..3ca4722087 100644 --- a/arch/arm/dts/keystone-k2hk-clocks.dtsi +++ b/arch/arm/dts/keystone-k2hk-clocks.dtsi @@ -2,7 +2,7 @@ /* * Keystone 2 Kepler/Hawking SoC clock nodes * - * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/ */ clocks { diff --git a/arch/arm/dts/keystone-k2hk-evm-u-boot.dtsi b/arch/arm/dts/keystone-k2hk-evm-u-boot.dtsi index 22df84ba93..3e38f228a6 100644 --- a/arch/arm/dts/keystone-k2hk-evm-u-boot.dtsi +++ b/arch/arm/dts/keystone-k2hk-evm-u-boot.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ */ /{ diff --git a/arch/arm/dts/keystone-k2hk-evm.dts b/arch/arm/dts/keystone-k2hk-evm.dts index ea53f3f6b8..6222876f27 100644 --- a/arch/arm/dts/keystone-k2hk-evm.dts +++ b/arch/arm/dts/keystone-k2hk-evm.dts @@ -2,7 +2,7 @@ /* * Keystone 2 Kepler/Hawking EVM device tree * - * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/ */ /dts-v1/; diff --git a/arch/arm/dts/keystone-k2hk-netcp.dtsi b/arch/arm/dts/keystone-k2hk-netcp.dtsi index 580af633df..3f8c4c263a 100644 --- a/arch/arm/dts/keystone-k2hk-netcp.dtsi +++ b/arch/arm/dts/keystone-k2hk-netcp.dtsi @@ -2,7 +2,7 @@ /* * Device Tree Source for Keystone 2 Hawking Netcp driver * - * Copyright (C) 2015-2017 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2015-2017 Texas Instruments Incorporated - https://www.ti.com/ */ qmss: qmss@2a40000 { diff --git a/arch/arm/dts/keystone-k2hk.dtsi b/arch/arm/dts/keystone-k2hk.dtsi index ef02f23c32..e5ab1fbb55 100644 --- a/arch/arm/dts/keystone-k2hk.dtsi +++ b/arch/arm/dts/keystone-k2hk.dtsi @@ -2,7 +2,7 @@ /* * Keystone 2 Kepler/Hawking soc specific device tree * - * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/ */ / { diff --git a/arch/arm/dts/keystone-k2l-clocks.dtsi b/arch/arm/dts/keystone-k2l-clocks.dtsi index 635528064d..fcfc2fb6cc 100644 --- a/arch/arm/dts/keystone-k2l-clocks.dtsi +++ b/arch/arm/dts/keystone-k2l-clocks.dtsi @@ -2,7 +2,7 @@ /* * Keystone 2 lamarr SoC clock nodes * - * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/ */ clocks { diff --git a/arch/arm/dts/keystone-k2l-evm-u-boot.dtsi b/arch/arm/dts/keystone-k2l-evm-u-boot.dtsi index 0a507d0210..f1aed14b0b 100644 --- a/arch/arm/dts/keystone-k2l-evm-u-boot.dtsi +++ b/arch/arm/dts/keystone-k2l-evm-u-boot.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/ */ &usb_phy { diff --git a/arch/arm/dts/keystone-k2l-evm.dts b/arch/arm/dts/keystone-k2l-evm.dts index 187f2caa6d..9d2b4542e8 100644 --- a/arch/arm/dts/keystone-k2l-evm.dts +++ b/arch/arm/dts/keystone-k2l-evm.dts @@ -2,7 +2,7 @@ /* * Keystone 2 Lamarr EVM device tree * - * Copyright (C) 2014-2017 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2014-2017 Texas Instruments Incorporated - https://www.ti.com/ */ /dts-v1/; diff --git a/arch/arm/dts/keystone-k2l-netcp.dtsi b/arch/arm/dts/keystone-k2l-netcp.dtsi index 54c1128819..2caa0583fc 100644 --- a/arch/arm/dts/keystone-k2l-netcp.dtsi +++ b/arch/arm/dts/keystone-k2l-netcp.dtsi @@ -2,7 +2,7 @@ /* * Device Tree Source for Keystone 2 Lamarr Netcp driver * - * Copyright (C) 2015-2017 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2015-2017 Texas Instruments Incorporated - https://www.ti.com/ */ qmss: qmss@2a40000 { diff --git a/arch/arm/dts/keystone-k2l.dtsi b/arch/arm/dts/keystone-k2l.dtsi index dcc83a7ee4..c8893e284f 100644 --- a/arch/arm/dts/keystone-k2l.dtsi +++ b/arch/arm/dts/keystone-k2l.dtsi @@ -2,7 +2,7 @@ /* * Keystone 2 Lamarr SoC specific device tree * - * Copyright (C) 2014-2017 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2014-2017 Texas Instruments Incorporated - https://www.ti.com/ */ / { diff --git a/arch/arm/dts/keystone.dtsi b/arch/arm/dts/keystone.dtsi index 2afcab76d2..1538ccef81 100644 --- a/arch/arm/dts/keystone.dtsi +++ b/arch/arm/dts/keystone.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/ */ #include <dt-bindings/interrupt-controller/arm-gic.h> diff --git a/arch/arm/dts/omap3-u-boot.dtsi b/arch/arm/dts/omap3-u-boot.dtsi index 7366ff5693..bc2793757b 100644 --- a/arch/arm/dts/omap3-u-boot.dtsi +++ b/arch/arm/dts/omap3-u-boot.dtsi @@ -1,5 +1,5 @@ /* - * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as diff --git a/arch/arm/dts/omap5-u-boot.dtsi b/arch/arm/dts/omap5-u-boot.dtsi index 720e79b3a5..d1de2e7c85 100644 --- a/arch/arm/dts/omap5-u-boot.dtsi +++ b/arch/arm/dts/omap5-u-boot.dtsi @@ -1,5 +1,5 @@ /* - * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as diff --git a/arch/arm/dts/rk3588-quartzpro64-u-boot.dtsi b/arch/arm/dts/rk3588-quartzpro64-u-boot.dtsi new file mode 100644 index 0000000000..191ec988c4 --- /dev/null +++ b/arch/arm/dts/rk3588-quartzpro64-u-boot.dtsi @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2023 Google, Inc + */ + +#include "rk3588-u-boot.dtsi" + +/ { + chosen { + u-boot,spl-boot-order = "same-as-spl", &sdmmc, &sdhci; + }; +}; diff --git a/arch/arm/dts/rk3588-quartzpro64.dts b/arch/arm/dts/rk3588-quartzpro64.dts new file mode 100644 index 0000000000..5c59f9571d --- /dev/null +++ b/arch/arm/dts/rk3588-quartzpro64.dts @@ -0,0 +1,1137 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2023 OndÅ™ej Jirman <megi@xff.cz> + */ + +/dts-v1/; + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/leds/common.h> +#include <dt-bindings/pinctrl/rockchip.h> +#include <dt-bindings/usb/pd.h> +#include "rk3588.dtsi" + +/ { + model = "PINE64 QuartzPro64"; + compatible = "pine64,quartzpro64", "rockchip,rk3588"; + + aliases { + mmc0 = &sdhci; + mmc1 = &sdmmc; + serial2 = &uart2; + }; + + chosen { + stdout-path = "serial2:1500000n8"; + }; + + adc-keys-0 { + compatible = "adc-keys"; + io-channels = <&saradc 0>; + io-channel-names = "buttons"; + keyup-threshold-microvolt = <1800000>; + poll-interval = <100>; + + button-maskrom { + label = "Mask Rom"; + linux,code = <KEY_SETUP>; + press-threshold-microvolt = <393>; + }; + }; + + adc-keys-1 { + compatible = "adc-keys"; + io-channels = <&saradc 1>; + io-channel-names = "buttons"; + keyup-threshold-microvolt = <1800000>; + poll-interval = <100>; + + button-volume-up { + label = "V+/REC"; + linux,code = <KEY_VOLUMEUP>; + press-threshold-microvolt = <17821>; + }; + + button-volume-down { + label = "V-"; + linux,code = <KEY_VOLUMEDOWN>; + press-threshold-microvolt = <415384>; + }; + + button-menu { + label = "MENU"; + linux,code = <KEY_MENU>; + press-threshold-microvolt = <890909>; + }; + + button-esc { + label = "ESC"; + linux,code = <KEY_ESC>; + press-threshold-microvolt = <1233962>; + }; + }; + + headphone_amp: audio-amplifier-headphone { + compatible = "simple-audio-amplifier"; + enable-gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>; + sound-name-prefix = "Headphones Amp"; + }; + + speaker_amp: audio-amplifier-speaker { + compatible = "simple-audio-amplifier"; + enable-gpios = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>; + sound-name-prefix = "Speaker Amp"; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&led_pins>; + + led-1 { + color = <LED_COLOR_ID_ORANGE>; + function = LED_FUNCTION_INDICATOR; + gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>; + }; + }; + + sound { + compatible = "simple-audio-card"; + pinctrl-names = "default"; + pinctrl-0 = <&hp_detect>; + simple-audio-card,name = "Analog"; + simple-audio-card,aux-devs = <&speaker_amp>, <&headphone_amp>; + simple-audio-card,format = "i2s"; + simple-audio-card,mclk-fs = <256>; + simple-audio-card,hp-det-gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>; + simple-audio-card,bitclock-master = <&daicpu>; + simple-audio-card,frame-master = <&daicpu>; + /* SARADC_IN3 is used as MIC detection / key input */ + + simple-audio-card,widgets = + "Microphone", "Onboard Microphone", + "Microphone", "Microphone Jack", + "Speaker", "Speaker", + "Headphone", "Headphones"; + + simple-audio-card,routing = + "Headphones", "LOUT1", + "Headphones", "ROUT1", + "Speaker", "LOUT2", + "Speaker", "ROUT2", + + "Headphones", "Headphones Amp OUTL", + "Headphones", "Headphones Amp OUTR", + "Headphones Amp INL", "LOUT1", + "Headphones Amp INR", "ROUT1", + + "Speaker", "Speaker Amp OUTL", + "Speaker", "Speaker Amp OUTR", + "Speaker Amp INL", "LOUT2", + "Speaker Amp INR", "ROUT2", + + /* single ended signal to LINPUT1 */ + "LINPUT1", "Microphone Jack", + "RINPUT1", "Microphone Jack", + /* differential signal */ + "LINPUT2", "Onboard Microphone", + "RINPUT2", "Onboard Microphone"; + + daicpu: simple-audio-card,cpu { + sound-dai = <&i2s0_8ch>; + system-clock-frequency = <12288000>; + }; + + daicodec: simple-audio-card,codec { + sound-dai = <&es8388>; + system-clock-frequency = <12288000>; + }; + }; + + vcc12v_dcin: vcc12v-dcin-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc12v_dcin"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + }; + + vcc3v3_bt: vcc3v3-bt-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>; + regulator-name = "vcc3v3_bt"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + startup-delay-us = <50000>; + vin-supply = <&vcc_3v3_s0>; + }; + + vcc3v3_pcie30: vcc3v3-pcie30-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpios = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>; + regulator-name = "vcc3v3_pcie30"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + startup-delay-us = <5000>; + vin-supply = <&vcc12v_dcin>; + }; + + vcc3v3_wf: vcc3v3-wf-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_HIGH>; + regulator-name = "vcc3v3_wf"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + startup-delay-us = <50000>; + vin-supply = <&vcc_3v3_s0>; + }; + + vcc4v0_sys: vcc4v0-sys-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc4v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <4000000>; + regulator-max-microvolt = <4000000>; + vin-supply = <&vcc12v_dcin>; + }; + + vcc5v0_host: vcc5v0-host-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_host_en>; + regulator-name = "vcc5v0_host"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc5v0_usb>; + }; + + vcc5v0_usb: vcc5v0-usb-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_usb"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc12v_dcin>; + }; +}; + +&combphy0_ps { + status = "okay"; +}; + +&combphy1_ps { + status = "okay"; +}; + +&combphy2_psu { + status = "okay"; +}; + +&cpu_b0 { + cpu-supply = <&vdd_cpu_big0_s0>; +}; + +&cpu_b1 { + cpu-supply = <&vdd_cpu_big0_s0>; +}; + +&cpu_b2 { + cpu-supply = <&vdd_cpu_big1_s0>; +}; + +&cpu_b3 { + cpu-supply = <&vdd_cpu_big1_s0>; +}; + +&cpu_l0 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&cpu_l1 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&cpu_l2 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&cpu_l3 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&gmac0 { + clock_in_out = "output"; + phy-handle = <&rgmii_phy>; + phy-mode = "rgmii-rxid"; + pinctrl-names = "default"; + pinctrl-0 = <&gmac0_miim + &gmac0_tx_bus2 + &gmac0_rx_bus2 + &gmac0_rgmii_clk + &gmac0_rgmii_bus>; + rx_delay = <0x00>; + tx_delay = <0x43>; + status = "okay"; +}; + +&i2c2 { + status = "okay"; + + hym8563: rtc@51 { + compatible = "haoyu,hym8563"; + reg = <0x51>; + #clock-cells = <0>; + clock-output-names = "hym8563"; + interrupt-parent = <&gpio0>; + interrupts = <RK_PD4 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&hym8563_int>; + wakeup-source; + }; +}; + +&i2c7 { + status = "okay"; + + es8388: audio-codec@11 { + compatible = "everest,es8388"; + reg = <0x11>; + assigned-clocks = <&cru I2S0_8CH_MCLKOUT>; + assigned-clock-rates = <12288000>; + clocks = <&cru I2S0_8CH_MCLKOUT>; + clock-names = "mclk"; + AVDD-supply = <&avcc_1v8_codec_s0>; + DVDD-supply = <&avcc_1v8_codec_s0>; + HPVDD-supply = <&vcc_3v3_s0>; + PVDD-supply = <&vcc_3v3_s0>; + #sound-dai-cells = <0>; + }; +}; + +&i2s0_8ch { + pinctrl-names = "default"; + pinctrl-0 = <&i2s0_lrck + &i2s0_mclk + &i2s0_sclk + &i2s0_sdi0 + &i2s0_sdo0>; + status = "okay"; +}; + +&mdio0 { + rgmii_phy: ethernet-phy@1 { + /* RTL8211F */ + compatible = "ethernet-phy-id001c.c916"; + reg = <0x1>; + pinctrl-names = "default"; + pinctrl-0 = <&rtl8211f_rst>; + reset-assert-us = <20000>; + reset-deassert-us = <100000>; + reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>; + }; +}; + +&pinctrl { + hym8563 { + hym8563_int: hym8563-int { + rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + leds { + led_pins: led-pins { + rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + rtl8111 { + rtl8111_isolate: rtl8111-isolate { + rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + rtl8211f { + rtl8211f_rst: rtl8211f-rst { + rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + }; + + sound { + hp_detect: hp-detect { + rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + usb { + vcc5v0_host_en: vcc5v0-host-en { + rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +/* WIFI */ +&pcie2x1l0 { + reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&vcc3v3_wf>; + status = "okay"; +}; + +/* GMAC1 */ +&pcie2x1l1 { + pinctrl-names = "default"; + pinctrl-0 = <&rtl8111_isolate>; + reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&pcie30phy { + status = "okay"; +}; + +&pcie3x4 { + reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&vcc3v3_pcie30>; + status = "okay"; +}; + +&saradc { + vref-supply = <&vcc_1v8_s0>; + status = "okay"; +}; + +&sata0 { + status = "okay"; +}; + +&sdhci { + bus-width = <8>; + no-sdio; + no-sd; + non-removable; + max-frequency = <150000000>; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + status = "okay"; +}; + +&sdmmc { + bus-width = <4>; + cap-sd-highspeed; + cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; + disable-wp; + max-frequency = <150000000>; + no-sdio; + no-mmc; + sd-uhs-sdr104; + vmmc-supply = <&vcc_3v3_s3>; + vqmmc-supply = <&vccio_sd_s0>; + status = "okay"; +}; + +&spi2 { + assigned-clocks = <&cru CLK_SPI2>; + assigned-clock-rates = <200000000>; + num-cs = <2>; + status = "okay"; + + pmic@0 { + compatible = "rockchip,rk806"; + reg = <0x0>; + #gpio-cells = <2>; + gpio-controller; + interrupt-parent = <&gpio0>; + interrupts = <7 IRQ_TYPE_LEVEL_LOW>; + pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, + <&rk806_dvs2_null>, <&rk806_dvs3_null>; + pinctrl-names = "default"; + spi-max-frequency = <1000000>; + + vcc1-supply = <&vcc4v0_sys>; + vcc2-supply = <&vcc4v0_sys>; + vcc3-supply = <&vcc4v0_sys>; + vcc4-supply = <&vcc4v0_sys>; + vcc5-supply = <&vcc4v0_sys>; + vcc6-supply = <&vcc4v0_sys>; + vcc7-supply = <&vcc4v0_sys>; + vcc8-supply = <&vcc4v0_sys>; + vcc9-supply = <&vcc4v0_sys>; + vcc10-supply = <&vcc4v0_sys>; + vcc11-supply = <&vcc_2v0_pldo_s3>; + vcc12-supply = <&vcc4v0_sys>; + vcc13-supply = <&vcc_1v1_nldo_s3>; + vcc14-supply = <&vcc_1v1_nldo_s3>; + vcca-supply = <&vcc4v0_sys>; + + rk806_dvs1_null: dvs1-null-pins { + pins = "gpio_pwrctrl1"; + function = "pin_fun0"; + }; + + rk806_dvs2_null: dvs2-null-pins { + pins = "gpio_pwrctrl2"; + function = "pin_fun0"; + }; + + rk806_dvs3_null: dvs3-null-pins { + pins = "gpio_pwrctrl3"; + function = "pin_fun0"; + }; + + regulators { + vdd_gpu_s0: dcdc-reg1 { + regulator-name = "vdd_gpu_s0"; + regulator-boot-on; + regulator-enable-ramp-delay = <400>; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_npu_s0: dcdc-reg2 { + regulator-name = "vdd_npu_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_log_s0: dcdc-reg3 { + regulator-name = "vdd_log_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <675000>; + regulator-max-microvolt = <750000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <750000>; + }; + }; + + vdd_vdenc_s0: dcdc-reg4 { + regulator-name = "vdd_vdenc_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + + }; + + vdd_gpu_mem_s0: dcdc-reg5 { + regulator-name = "vdd_gpu_mem_s0"; + regulator-boot-on; + regulator-enable-ramp-delay = <400>; + regulator-min-microvolt = <675000>; + regulator-max-microvolt = <950000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + + }; + + vdd_npu_mem_s0: dcdc-reg6 { + regulator-name = "vdd_npu_mem_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <675000>; + regulator-max-microvolt = <950000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + + }; + + vcc_2v0_pldo_s3: dcdc-reg7 { + regulator-name = "vdd_2v0_pldo_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <2000000>; + regulator-max-microvolt = <2000000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <2000000>; + }; + }; + + vdd_vdenc_mem_s0: dcdc-reg8 { + regulator-name = "vdd_vdenc_mem_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <675000>; + regulator-max-microvolt = <950000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd2_ddr_s3: dcdc-reg9 { + regulator-name = "vdd2_ddr_s3"; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_1v1_nldo_s3: dcdc-reg10 { + regulator-name = "vcc_1v1_nldo_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1100000>; + }; + }; + + avcc_1v8_s0: pldo-reg1 { + regulator-name = "avcc_1v8_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd1_1v8_ddr_s3: pldo-reg2 { + regulator-name = "vdd1_1v8_ddr_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + avcc_1v8_codec_s0: pldo-reg3 { + regulator-name = "avcc_1v8_codec_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_3v3_s3: pldo-reg4 { + regulator-name = "vcc_3v3_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vccio_sd_s0: pldo-reg5 { + regulator-name = "vccio_sd_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8_s3: pldo-reg6 { + regulator-name = "vcc_1v8_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdd_0v75_s3: nldo-reg1 { + regulator-name = "vdd_0v75_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <750000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <750000>; + }; + }; + + /* reserved for LPDDR5, unused? */ + vdd2l_0v9_ddr_s3: nldo-reg2 { + regulator-name = "vdd2l_0v9_ddr_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <900000>; + }; + }; + + vdd_0v75_hdmi_edp_s0: nldo-reg3 { + regulator-name = "vdd_0v75_hdmi_edp_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <750000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + avdd_0v75_s0: nldo-reg4 { + regulator-name = "avdd_0v75_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <750000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_0v85_s0: nldo-reg5 { + regulator-name = "vdd_0v85_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; + + pmic@1 { + compatible = "rockchip,rk806"; + reg = <0x01>; + #gpio-cells = <2>; + gpio-controller; + interrupt-parent = <&gpio0>; + interrupts = <7 IRQ_TYPE_LEVEL_LOW>; + pinctrl-0 = <&rk806_slave_dvs1_null>, <&rk806_slave_dvs2_null>, + <&rk806_slave_dvs3_null>; + pinctrl-names = "default"; + spi-max-frequency = <1000000>; + + vcc1-supply = <&vcc4v0_sys>; + vcc2-supply = <&vcc4v0_sys>; + vcc3-supply = <&vcc4v0_sys>; + vcc4-supply = <&vcc4v0_sys>; + vcc5-supply = <&vcc4v0_sys>; + vcc6-supply = <&vcc4v0_sys>; + vcc7-supply = <&vcc4v0_sys>; + vcc8-supply = <&vcc4v0_sys>; + vcc9-supply = <&vcc4v0_sys>; + vcc10-supply = <&vcc4v0_sys>; + vcc11-supply = <&vcc_2v0_pldo_s3>; + vcc12-supply = <&vcc4v0_sys>; + vcc13-supply = <&vcc_1v1_nldo_s3>; + vcc14-supply = <&vcc_2v0_pldo_s3>; + vcca-supply = <&vcc4v0_sys>; + + rk806_slave_dvs1_null: dvs1-null-pins { + pins = "gpio_pwrctrl1"; + function = "pin_fun0"; + }; + + rk806_slave_dvs2_null: dvs2-null-pins { + pins = "gpio_pwrctrl2"; + function = "pin_fun0"; + }; + + rk806_slave_dvs3_null: dvs3-null-pins { + pins = "gpio_pwrctrl3"; + function = "pin_fun0"; + }; + + regulators { + vdd_cpu_big1_s0: dcdc-reg1 { + regulator-name = "vdd_cpu_big1_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <1050000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_big0_s0: dcdc-reg2 { + regulator-name = "vdd_cpu_big0_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <1050000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_lit_s0: dcdc-reg3 { + regulator-name = "vdd_cpu_lit_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_3v3_s0: dcdc-reg4 { + regulator-name = "vcc_3v3_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_big1_mem_s0: dcdc-reg5 { + regulator-name = "vdd_cpu_big1_mem_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <675000>; + regulator-max-microvolt = <1050000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + + vdd_cpu_big0_mem_s0: dcdc-reg6 { + regulator-name = "vdd_cpu_big0_mem_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <675000>; + regulator-max-microvolt = <1050000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8_s0: dcdc-reg7 { + regulator-name = "vcc_1v8_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_lit_mem_s0: dcdc-reg8 { + regulator-name = "vdd_cpu_lit_mem_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <675000>; + regulator-max-microvolt = <950000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vddq_ddr_s0: dcdc-reg9 { + regulator-name = "vddq_ddr_s0"; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_ddr_s0: dcdc-reg10 { + regulator-name = "vdd_ddr_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <675000>; + regulator-max-microvolt = <900000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + /* reserved, unused? */ + vcc_1v8_cam_s0: pldo-reg1 { + regulator-name = "vcc_1v8_cam_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + avdd1v8_ddr_pll_s0: pldo-reg2 { + regulator-name = "avdd1v8_ddr_pll_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_1v8_pll_s0: pldo-reg3 { + regulator-name = "vdd_1v8_pll_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + /* reserved, unused? */ + vcc_3v3_sd_s0: pldo-reg4 { + regulator-name = "vcc_3v3_sd_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + /* reserved, unused? */ + vcc_2v8_cam_s0: pldo-reg5 { + regulator-name = "vcc_2v8_cam_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + /* unused */ + pldo6_s3: pldo-reg6 { + regulator-name = "pldo6_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdd_0v75_pll_s0: nldo-reg1 { + regulator-name = "vdd_0v75_pll_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <750000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_ddr_pll_s0: nldo-reg2 { + regulator-name = "vdd_ddr_pll_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + avdd_0v85_s0: nldo-reg3 { + regulator-name = "avdd_0v85_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + /* reserved, unused */ + avdd_1v2_cam_s0: nldo-reg4 { + regulator-name = "avdd_1v2_cam_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + avdd_1v2_s0: nldo-reg5 { + regulator-name = "avdd_1v2_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; +}; + +&tsadc { + status = "okay"; +}; + +&u2phy2 { + status = "okay"; +}; + +&u2phy2_host { + phy-supply = <&vcc5v0_host>; + status = "okay"; +}; + +&u2phy3 { + status = "okay"; +}; + +&u2phy3_host { + phy-supply = <&vcc5v0_host>; + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&uart2m0_xfer>; + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&usb_host1_ehci { + status = "okay"; +}; + +&usb_host1_ohci { + status = "okay"; +}; diff --git a/arch/arm/dts/rv1126-u-boot.dtsi b/arch/arm/dts/rv1126-u-boot.dtsi index 5e348278f2..4485980135 100644 --- a/arch/arm/dts/rv1126-u-boot.dtsi +++ b/arch/arm/dts/rv1126-u-boot.dtsi @@ -15,6 +15,18 @@ compatible = "rockchip,rv1126-dmc"; bootph-all; }; + + otp: otp@ff5c0000 { + compatible = "rockchip,rv1126-otp"; + reg = <0xff5c0000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + status = "okay"; + + cpu_id: id@7 { + reg = <0x07 0x10>; + }; + }; }; &gpio0 { @@ -26,15 +38,15 @@ }; &grf { - bootph-pre-ram; + bootph-all; }; &pmu { - bootph-pre-ram; + bootph-all; }; &pmugrf { - bootph-pre-ram; + bootph-all; }; &xin24m { diff --git a/arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi b/arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi index 1f7fdbce53..eb283cacd2 100644 --- a/arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi +++ b/arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi @@ -135,20 +135,28 @@ &qspi_bk1_pins_a { bootph-pre-ram; - pins1 { + pins { bootph-pre-ram; }; - pins2 { +}; + +&qspi_cs1_pins_a { + bootph-pre-ram; + pins { bootph-pre-ram; }; }; &qspi_bk2_pins_a { bootph-pre-ram; - pins1 { + pins { bootph-pre-ram; }; - pins2 { +}; + +&qspi_cs2_pins_a { + bootph-pre-ram; + pins { bootph-pre-ram; }; }; diff --git a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi index f12941b05f..2f70b0690d 100644 --- a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi +++ b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi @@ -134,20 +134,14 @@ &qspi_bk1_pins_a { bootph-pre-ram; - pins1 { - bootph-pre-ram; - }; - pins2 { + pins { bootph-pre-ram; }; }; -&qspi_bk2_pins_a { +&qspi_cs1_pins_a { bootph-pre-ram; - pins1 { - bootph-pre-ram; - }; - pins2 { + pins { bootph-pre-ram; }; }; diff --git a/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi index eb905ad282..552b35db3c 100644 --- a/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi +++ b/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi @@ -98,10 +98,14 @@ &qspi_bk1_pins_a { bootph-pre-ram; - pins1 { + pins { bootph-pre-ram; }; - pins2 { +}; + +&qspi_cs1_pins_a { + bootph-pre-ram; + pins { bootph-pre-ram; }; }; diff --git a/arch/arm/dts/tps6507x.dtsi b/arch/arm/dts/tps6507x.dtsi index db4809d308..6749d3f3d5 100644 --- a/arch/arm/dts/tps6507x.dtsi +++ b/arch/arm/dts/tps6507x.dtsi @@ -1,11 +1,11 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ */ /* * Integrated Power Management Chip - * http://www.ti.com/lit/ds/symlink/tps65070.pdf + * https://www.ti.com/lit/ds/symlink/tps65070.pdf */ &tps { diff --git a/arch/arm/dts/tps65217.dtsi b/arch/arm/dts/tps65217.dtsi index 0d463de565..262e0bb3ea 100644 --- a/arch/arm/dts/tps65217.dtsi +++ b/arch/arm/dts/tps65217.dtsi @@ -1,11 +1,11 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ */ /* * Integrated Power Management Chip - * http://www.ti.com/lit/ds/symlink/tps65217.pdf + * https://www.ti.com/lit/ds/symlink/tps65217.pdf */ &tps { diff --git a/arch/arm/dts/tps65910.dtsi b/arch/arm/dts/tps65910.dtsi index a941d1e623..ab3a4ffd12 100644 --- a/arch/arm/dts/tps65910.dtsi +++ b/arch/arm/dts/tps65910.dtsi @@ -1,11 +1,11 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ */ /* * Integrated Power Management Chip - * http://www.ti.com/lit/ds/symlink/tps65910.pdf + * https://www.ti.com/lit/ds/symlink/tps65910.pdf */ &tps { diff --git a/arch/arm/dts/twl4030.dtsi b/arch/arm/dts/twl4030.dtsi index 6cb0a01e77..f87cea1ac4 100644 --- a/arch/arm/dts/twl4030.dtsi +++ b/arch/arm/dts/twl4030.dtsi @@ -1,5 +1,5 @@ /* - * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as diff --git a/arch/arm/dts/twl6030.dtsi b/arch/arm/dts/twl6030.dtsi index 9d588cfaa5..8da969035c 100644 --- a/arch/arm/dts/twl6030.dtsi +++ b/arch/arm/dts/twl6030.dtsi @@ -1,11 +1,11 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ */ /* * Integrated Power Management Chip - * http://www.ti.com/lit/ds/symlink/twl6030.pdf + * https://www.ti.com/lit/ds/symlink/twl6030.pdf */ &twl { compatible = "ti,twl6030"; diff --git a/arch/arm/dts/twl6030_omap4.dtsi b/arch/arm/dts/twl6030_omap4.dtsi index fc498d0bde..5730e46b00 100644 --- a/arch/arm/dts/twl6030_omap4.dtsi +++ b/arch/arm/dts/twl6030_omap4.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ */ &twl { diff --git a/arch/arm/dts/versal-mini-ospi-stacked.dts b/arch/arm/dts/versal-mini-ospi-stacked.dts new file mode 100644 index 0000000000..f46125da71 --- /dev/null +++ b/arch/arm/dts/versal-mini-ospi-stacked.dts @@ -0,0 +1,22 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Xilinx Versal QSPI Quad Stacked DTS + * + * Copyright (C) 2018-2020 Xilinx, Inc. + */ + +#include "versal-mini-ospi.dtsi" + +/ { + model = "Xilinx Versal MINI OSPI STACKED"; +}; + +&ospi { + num-cs = <2>; +}; + +&flash0 { + reg = <0>, <1>; + stacked-memories = /bits/ 64 <0x8000000 0x8000000>; /* 128MB */ + spi-rx-bus-width = <8>; +}; diff --git a/arch/arm/dts/versal-mini-qspi-parallel.dts b/arch/arm/dts/versal-mini-qspi-parallel.dts new file mode 100644 index 0000000000..8485cda352 --- /dev/null +++ b/arch/arm/dts/versal-mini-qspi-parallel.dts @@ -0,0 +1,22 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Xilinx Versal QSPI Quad Parallel DTS + * + * Copyright (C) 2018-2019 Xilinx, Inc. + */ + +#include "versal-mini-qspi.dtsi" + +/ { + model = "Xilinx Versal MINI QSPI PARALLEL"; +}; + +&qspi { + num-cs = <2>; +}; + +&flash0 { + reg = <0>, <1>; + parallel-memories = /bits/ 64 <0x8000000 0x8000000>; /* 128MB */ + spi-rx-bus-width = <4>; +}; diff --git a/arch/arm/dts/versal-mini-qspi-stacked.dts b/arch/arm/dts/versal-mini-qspi-stacked.dts new file mode 100644 index 0000000000..54d42775e0 --- /dev/null +++ b/arch/arm/dts/versal-mini-qspi-stacked.dts @@ -0,0 +1,22 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Xilinx Versal QSPI Quad Stacked DTS + * + * Copyright (C) 2018-2019 Xilinx, Inc. + */ + +#include "versal-mini-qspi.dtsi" + +/ { + model = "Xilinx Versal MINI QSPI STACKED"; +}; + +&qspi { + num-cs = <2>; +}; + +&flash0 { + reg = <0>, <1>; + stacked-memories = /bits/ 64 <0x8000000 0x8000000>; /* 128MB */ + spi-rx-bus-width = <4>; +}; diff --git a/arch/arm/dts/versal-mini-qspi-x1-single.dts b/arch/arm/dts/versal-mini-qspi-x1-single.dts new file mode 100644 index 0000000000..4d459a1978 --- /dev/null +++ b/arch/arm/dts/versal-mini-qspi-x1-single.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Xilinx Versal QSPI x1 Single DTS + * + * Copyright (C) 2018-2019 Xilinx, Inc. + */ + +#include "versal-mini-qspi.dtsi" + +/ { + model = "Xilinx Versal MINI QSPI X1 SINGLE"; +}; + +&flash0 { + spi-tx-bus-width = <1>; + spi-rx-bus-width = <1>; +}; diff --git a/arch/arm/dts/versal-mini-qspi-x1-stacked.dts b/arch/arm/dts/versal-mini-qspi-x1-stacked.dts new file mode 100644 index 0000000000..905dc77340 --- /dev/null +++ b/arch/arm/dts/versal-mini-qspi-x1-stacked.dts @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Xilinx Versal QSPI x1 Stacked DTS + * + * Copyright (C) 2018-2019 Xilinx, Inc. + */ + +#include "versal-mini-qspi.dtsi" + +/ { + model = "Xilinx Versal MINI QSPI X1 STACKED"; +}; + +&qspi { + num-cs = <2>; +}; + +&flash0 { + reg = <0>, <1>; + stacked-memories = /bits/ 64 <0x8000000 0x8000000>; /* 128MB */ + spi-tx-bus-width = <1>; + spi-rx-bus-width = <1>; +}; diff --git a/arch/arm/dts/versal-mini-qspi-x2-single.dts b/arch/arm/dts/versal-mini-qspi-x2-single.dts new file mode 100644 index 0000000000..d25ad7c778 --- /dev/null +++ b/arch/arm/dts/versal-mini-qspi-x2-single.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Xilinx Versal QSPI x2 Single DTS + * + * Copyright (C) 2018-2019 Xilinx, Inc. + */ + +#include "versal-mini-qspi.dtsi" + +/ { + model = "Xilinx Versal MINI QSPI X2 SINGLE"; +}; + +&flash0 { + spi-tx-bus-width = <2>; + spi-rx-bus-width = <2>; +}; diff --git a/arch/arm/dts/versal-mini-qspi-x2-stacked.dts b/arch/arm/dts/versal-mini-qspi-x2-stacked.dts new file mode 100644 index 0000000000..0c9e740c72 --- /dev/null +++ b/arch/arm/dts/versal-mini-qspi-x2-stacked.dts @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Xilinx Versal QSPI x2 Stacked DTS + * + * Copyright (C) 2018-2019 Xilinx, Inc. + */ + +#include "versal-mini-qspi.dtsi" + +/ { + model = "Xilinx Versal MINI QSPI X2 STACKED"; +}; + +&qspi { + num-cs = <2>; +}; + +&flash0 { + reg = <0>, <1>; + stacked-memories = /bits/ 64 <0x8000000 0x8000000>; /* 128MB */ + spi-tx-bus-width = <2>; + spi-rx-bus-width = <2>; +}; diff --git a/arch/arm/dts/versal-net-mini-ospi-stacked.dts b/arch/arm/dts/versal-net-mini-ospi-stacked.dts new file mode 100644 index 0000000000..4bc954a183 --- /dev/null +++ b/arch/arm/dts/versal-net-mini-ospi-stacked.dts @@ -0,0 +1,22 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Xilinx Versal NET OSPI Quad Stacked DTS + * + * (C) Copyright 2023, Advanced Micro Devices, Inc. + */ + +#include "versal-net-mini-ospi.dtsi" + +/ { + model = "Xilinx Versal NET MINI OSPI STACKED"; +}; + +&ospi { + num-cs = <2>; +}; + +&flash0 { + reg = <0>, <1>; + stacked-memories = /bits/ 64 <0x8000000 0x8000000>; /* 128MB */ + spi-rx-bus-width = <8>; +}; diff --git a/arch/arm/dts/versal-net-mini-qspi-parallel.dts b/arch/arm/dts/versal-net-mini-qspi-parallel.dts new file mode 100644 index 0000000000..edc2311609 --- /dev/null +++ b/arch/arm/dts/versal-net-mini-qspi-parallel.dts @@ -0,0 +1,22 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Xilinx Versal NET QSPI Quad Parallel DTS + * + * (C) Copyright 2023, Advanced Micro Devices, Inc. + */ + +#include "versal-net-mini-qspi.dtsi" + +/ { + model = "Xilinx Versal NET MINI QSPI PARALLEL"; +}; + +&qspi { + num-cs = <2>; +}; + +&flash0 { + reg = <0>, <1>; + parallel-memories = /bits/ 64 <0x8000000 0x8000000>; /* 128MB */ + spi-rx-bus-width = <4>; +}; diff --git a/arch/arm/dts/versal-net-mini-qspi-stacked.dts b/arch/arm/dts/versal-net-mini-qspi-stacked.dts new file mode 100644 index 0000000000..920eed2f8c --- /dev/null +++ b/arch/arm/dts/versal-net-mini-qspi-stacked.dts @@ -0,0 +1,22 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Xilinx Versal NET QSPI Quad Stacked DTS + * + * (C) Copyright 2023, Advanced Micro Devices, Inc. + */ + +#include "versal-net-mini-qspi.dtsi" + +/ { + model = "Xilinx Versal NET MINI QSPI STACKED"; +}; + +&qspi { + num-cs = <2>; +}; + +&flash0 { + reg = <0>, <1>; + stacked-memories = /bits/ 64 <0x8000000 0x8000000>; /* 128MB */ + spi-rx-bus-width = <4>; +}; diff --git a/arch/arm/dts/versal-net-mini-qspi-x1-single.dts b/arch/arm/dts/versal-net-mini-qspi-x1-single.dts new file mode 100644 index 0000000000..856c79c3c0 --- /dev/null +++ b/arch/arm/dts/versal-net-mini-qspi-x1-single.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Xilinx Versal NET QSPI x1 Single DTS + * + * (C) Copyright 2023, Advanced Micro Devices, Inc. + */ + +#include "versal-net-mini-qspi.dtsi" + +/ { + model = "Xilinx Versal NET MINI QSPI X1 SINGLE"; +}; + +&flash0 { + spi-tx-bus-width = <1>; + spi-rx-bus-width = <1>; +}; diff --git a/arch/arm/dts/versal-net-mini-qspi-x1-stacked.dts b/arch/arm/dts/versal-net-mini-qspi-x1-stacked.dts new file mode 100644 index 0000000000..5f74d98ad6 --- /dev/null +++ b/arch/arm/dts/versal-net-mini-qspi-x1-stacked.dts @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Xilinx Versal NET QSPI x1 Stacked DTS + * + * (C) Copyright 2023, Advanced Micro Devices, Inc. + */ + +#include "versal-net-mini-qspi.dtsi" + +/ { + model = "Xilinx Versal NET MINI QSPI X1 STACKED"; +}; + +&qspi { + num-cs = <2>; +}; + +&flash0 { + reg = <0>, <1>; + stacked-memories = /bits/ 64 <0x8000000 0x8000000>; /* 128MB */ + spi-tx-bus-width = <1>; + spi-rx-bus-width = <1>; +}; diff --git a/arch/arm/dts/versal-net-mini-qspi-x2-single.dts b/arch/arm/dts/versal-net-mini-qspi-x2-single.dts new file mode 100644 index 0000000000..6ceaa244e6 --- /dev/null +++ b/arch/arm/dts/versal-net-mini-qspi-x2-single.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Xilinx Versal NET QSPI x2 Single DTS + * + * (C) Copyright 2023, Advanced Micro Devices, Inc. + */ + +#include "versal-net-mini-qspi.dtsi" + +/ { + model = "Xilinx Versal NET MINI QSPI X2 SINGLE"; +}; + +&flash0 { + spi-tx-bus-width = <2>; + spi-rx-bus-width = <2>; +}; diff --git a/arch/arm/dts/versal-net-mini-qspi-x2-stacked.dts b/arch/arm/dts/versal-net-mini-qspi-x2-stacked.dts new file mode 100644 index 0000000000..5f4d0b5505 --- /dev/null +++ b/arch/arm/dts/versal-net-mini-qspi-x2-stacked.dts @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Xilinx Versal NET QSPI x2 Stacked DTS + * + * (C) Copyright 2023, Advanced Micro Devices, Inc. + */ + +#include "versal-net-mini-qspi.dtsi" + +/ { + model = "Xilinx Versal NET MINI QSPI X2 STACKED"; +}; + +&qspi { + num-cs = <2>; +}; + +&flash0 { + reg = <0>, <1>; + stacked-memories = /bits/ 64 <0x8000000 0x8000000>; /* 128MB */ + spi-tx-bus-width = <2>; + spi-rx-bus-width = <2>; +}; diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi index fb61fe98e3..f8c786ab0b 100644 --- a/arch/arm/dts/zynq-7000.dtsi +++ b/arch/arm/dts/zynq-7000.dtsi @@ -306,15 +306,11 @@ compatible = "arm,pl353-nand-r2p1"; reg = <0 0 0x1000000>; status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; }; nor0: flash@1,0 { status = "disabled"; compatible = "cfi-flash"; reg = <1 0 0x2000000>; - #address-cells = <1>; - #size-cells = <1>; }; }; diff --git a/arch/arm/dts/zynq-cse-qspi-parallel.dts b/arch/arm/dts/zynq-cse-qspi-parallel.dts new file mode 100644 index 0000000000..afa6348cf5 --- /dev/null +++ b/arch/arm/dts/zynq-cse-qspi-parallel.dts @@ -0,0 +1,22 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Xilinx CSE QSPI Quad Parallel DTS + * + * Copyright (C) 2015 - 2017 Xilinx, Inc. + */ + +#include "zynq-cse-qspi.dtsi" + +/ { + model = "Zynq CSE QSPI PARALLEL Board"; +}; + +&qspi { + num-cs = <2>; +}; + +&flash0 { + reg = <0>, <1>; + parallel-memories = /bits/ 64 <0x1000000 0x1000000>; /* 16MB */ + spi-rx-bus-width = <4>; +}; diff --git a/arch/arm/dts/zynq-cse-qspi-stacked.dts b/arch/arm/dts/zynq-cse-qspi-stacked.dts new file mode 100644 index 0000000000..47859f7ea8 --- /dev/null +++ b/arch/arm/dts/zynq-cse-qspi-stacked.dts @@ -0,0 +1,22 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Xilinx CSE QSPI Quad Stacked DTS + * + * Copyright (C) 2015 - 2017 Xilinx, Inc. + */ + +#include "zynq-cse-qspi.dtsi" + +/ { + model = "Zynq CSE QSPI STACKED Board"; +}; + +&qspi { + num-cs = <2>; +}; + +&flash0 { + reg = <0>, <1>; + stacked-memories = /bits/ 64 <0x1000000 0x1000000>; /* 16MB */ + spi-rx-bus-width = <4>; +}; diff --git a/arch/arm/dts/zynq-cse-qspi-x1-single.dts b/arch/arm/dts/zynq-cse-qspi-x1-single.dts new file mode 100644 index 0000000000..c14fb422b7 --- /dev/null +++ b/arch/arm/dts/zynq-cse-qspi-x1-single.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Xilinx CSE QSPI x1 Single DTS + * + * Copyright (C) 2015 - 2017 Xilinx, Inc. + */ + +#include "zynq-cse-qspi.dtsi" + +/ { + model = "Zynq CSE QSPI X1 SINGLE Board"; +}; + +&flash0 { + spi-rx-bus-width = <1>; +}; diff --git a/arch/arm/dts/zynq-cse-qspi-x1-stacked.dts b/arch/arm/dts/zynq-cse-qspi-x1-stacked.dts new file mode 100644 index 0000000000..0f4d414a25 --- /dev/null +++ b/arch/arm/dts/zynq-cse-qspi-x1-stacked.dts @@ -0,0 +1,22 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Xilinx CSE QSPI x1 Stacked DTS + * + * Copyright (C) 2015 - 2017 Xilinx, Inc. + */ + +#include "zynq-cse-qspi.dtsi" + +/ { + model = "Zynq CSE QSPI X1 STACKED Board"; +}; + +&qspi { + num-cs = <2>; +}; + +&flash0 { + reg = <0>, <1>; + stacked-memories = /bits/ 64 <0x1000000 0x1000000>; /* 16MB */ + spi-rx-bus-width = <1>; +}; diff --git a/arch/arm/dts/zynq-cse-qspi-x2-single.dts b/arch/arm/dts/zynq-cse-qspi-x2-single.dts new file mode 100644 index 0000000000..11be06385d --- /dev/null +++ b/arch/arm/dts/zynq-cse-qspi-x2-single.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Xilinx CSE QSPI x2 Single DTS + * + * Copyright (C) 2015 - 2017 Xilinx, Inc. + */ + +#include "zynq-cse-qspi.dtsi" + +/ { + model = "Zynq CSE QSPI X2 SINGLE Board"; +}; + +&flash0 { + spi-rx-bus-width = <2>; +}; diff --git a/arch/arm/dts/zynq-cse-qspi-x2-stacked.dts b/arch/arm/dts/zynq-cse-qspi-x2-stacked.dts new file mode 100644 index 0000000000..d1b42e9269 --- /dev/null +++ b/arch/arm/dts/zynq-cse-qspi-x2-stacked.dts @@ -0,0 +1,22 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Xilinx CSE QSPI x2 Stacked DTS + * + * Copyright (C) 2015 - 2017 Xilinx, Inc. + */ + +#include "zynq-cse-qspi.dtsi" + +/ { + model = "Zynq CSE QSPI X2 STACKED Board"; +}; + +&qspi { + num-cs = <2>; +}; + +&flash0 { + reg = <0>, <1>; + stacked-memories = /bits/ 64 <0x1000000 0x1000000>; /* 16MB */ + spi-rx-bus-width = <2>; +}; diff --git a/arch/arm/dts/zynq-zc702.dts b/arch/arm/dts/zynq-zc702.dts index 8d47f24b75..0106d7bb17 100644 --- a/arch/arm/dts/zynq-zc702.dts +++ b/arch/arm/dts/zynq-zc702.dts @@ -406,6 +406,31 @@ spi-tx-bus-width = <1>; spi-rx-bus-width = <4>; spi-max-frequency = <50000000>; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + partition@0 { + label = "qspi-fsbl-uboot"; + reg = <0x0 0x100000>; + }; + partition@100000 { + label = "qspi-linux"; + reg = <0x100000 0x500000>; + }; + partition@600000 { + label = "qspi-device-tree"; + reg = <0x600000 0x20000>; + }; + partition@620000 { + label = "qspi-rootfs"; + reg = <0x620000 0x5e0000>; + }; + partition@c00000 { + label = "qspi-bitstream"; + reg = <0xc00000 0x400000>; + }; + }; }; }; diff --git a/arch/arm/dts/zynq-zc706.dts b/arch/arm/dts/zynq-zc706.dts index 03eb016ed6..ceea982546 100644 --- a/arch/arm/dts/zynq-zc706.dts +++ b/arch/arm/dts/zynq-zc706.dts @@ -309,13 +309,39 @@ &qspi { bootph-all; status = "okay"; - num-cs = <1>; + num-cs = <2>; flash@0 { compatible = "n25q128a11", "jedec,spi-nor"; - reg = <0x0>; + reg = <0>, <1>; + parallel-memories = /bits/ 64 <0x1000000 0x1000000>; /* 16MB */ spi-tx-bus-width = <1>; spi-rx-bus-width = <4>; spi-max-frequency = <50000000>; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + partition@0 { + label = "qspi-fsbl-uboot"; + reg = <0x0 0x100000>; + }; + partition@100000 { + label = "qspi-linux"; + reg = <0x100000 0x500000>; + }; + partition@600000 { + label = "qspi-device-tree"; + reg = <0x600000 0x20000>; + }; + partition@620000 { + label = "qspi-rootfs"; + reg = <0x620000 0x5e0000>; + }; + partition@c00000 { + label = "qspi-bitstream"; + reg = <0xc00000 0x400000>; + }; + }; }; }; diff --git a/arch/arm/dts/zynq-zc770-xm010.dts b/arch/arm/dts/zynq-zc770-xm010.dts index 17680d7f8e..199384bec9 100644 --- a/arch/arm/dts/zynq-zc770-xm010.dts +++ b/arch/arm/dts/zynq-zc770-xm010.dts @@ -69,6 +69,31 @@ spi-tx-bus-width = <1>; spi-rx-bus-width = <4>; spi-max-frequency = <50000000>; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + partition@0 { + label = "qspi-fsbl-uboot"; + reg = <0x0 0x100000>; + }; + partition@100000 { + label = "qspi-linux"; + reg = <0x100000 0x500000>; + }; + partition@600000 { + label = "qspi-device-tree"; + reg = <0x600000 0x20000>; + }; + partition@620000 { + label = "qspi-rootfs"; + reg = <0x620000 0x5e0000>; + }; + partition@c00000 { + label = "qspi-bitstream"; + reg = <0xc00000 0x400000>; + }; + }; }; }; diff --git a/arch/arm/dts/zynq-zc770-xm011.dts b/arch/arm/dts/zynq-zc770-xm011.dts index d1e971254e..f9a086fe66 100644 --- a/arch/arm/dts/zynq-zc770-xm011.dts +++ b/arch/arm/dts/zynq-zc770-xm011.dts @@ -49,8 +49,27 @@ &nfc0 { status = "okay"; + #address-cells = <1>; + #size-cells = <0>; nand@0 { reg = <0>; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + partition@0 { + label = "nand-fsbl-uboot"; + reg = <0x0 0x1000000>; + }; + partition@1000000 { + label = "nand-linux"; + reg = <0x1000000 0x2000000>; + }; + partition@3000000 { + label = "nand-rootfs"; + reg = <0x3000000 0x200000>; + }; + }; }; }; diff --git a/arch/arm/dts/zynq-zc770-xm012.dts b/arch/arm/dts/zynq-zc770-xm012.dts index 6e36634e3d..24520e7d39 100644 --- a/arch/arm/dts/zynq-zc770-xm012.dts +++ b/arch/arm/dts/zynq-zc770-xm012.dts @@ -56,6 +56,31 @@ &nor0 { status = "okay"; bank-width = <1>; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + partition@0 { + label = "nor-fsbl-uboot"; + reg = <0x0 0x100000>; + }; + partition@100000 { + label = "nor-linux"; + reg = <0x100000 0x500000>; + }; + partition@600000 { + label = "nor-device-tree"; + reg = <0x600000 0x20000>; + }; + partition@620000 { + label = "nor-rootfs"; + reg = <0x620000 0x5e0000>; + }; + partition@c00000 { + label = "nor-bitstream"; + reg = <0xc00000 0x400000>; + }; + }; }; &smcc { diff --git a/arch/arm/dts/zynq-zc770-xm013.dts b/arch/arm/dts/zynq-zc770-xm013.dts index 21902fbb0c..add75999f4 100644 --- a/arch/arm/dts/zynq-zc770-xm013.dts +++ b/arch/arm/dts/zynq-zc770-xm013.dts @@ -61,13 +61,39 @@ &qspi { status = "okay"; - num-cs = <1>; + num-cs = <2>; flash@0 { compatible = "n25q128a11", "jedec,spi-nor"; - reg = <0x0>; + reg = <0>, <1>; + parallel-memories = /bits/ 64 <0x1000000 0x1000000>; /* 16MB */ spi-tx-bus-width = <1>; spi-rx-bus-width = <4>; spi-max-frequency = <50000000>; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + partition@0 { + label = "qspi-fsbl-uboot"; + reg = <0x0 0x100000>; + }; + partition@100000 { + label = "qspi-linux"; + reg = <0x100000 0x500000>; + }; + partition@600000 { + label = "qspi-device-tree"; + reg = <0x600000 0x20000>; + }; + partition@620000 { + label = "qspi-rootfs"; + reg = <0x620000 0x5e0000>; + }; + partition@c00000 { + label = "qspi-bitstream"; + reg = <0xc00000 0x400000>; + }; + }; }; }; diff --git a/arch/arm/dts/zynq-zed.dts b/arch/arm/dts/zynq-zed.dts index 5320b4b233..70bc41822e 100644 --- a/arch/arm/dts/zynq-zed.dts +++ b/arch/arm/dts/zynq-zed.dts @@ -55,8 +55,35 @@ flash@0 { compatible = "spansion,s25fl256s1", "jedec,spi-nor"; reg = <0>; - spi-max-frequency = <30000000>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <4>; + spi-max-frequency = <50000000>; m25p,fast-read; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + partition@0 { + label = "qspi-fsbl-uboot"; + reg = <0x0 0x100000>; + }; + partition@100000 { + label = "qspi-linux"; + reg = <0x100000 0x500000>; + }; + partition@600000 { + label = "qspi-device-tree"; + reg = <0x600000 0x20000>; + }; + partition@620000 { + label = "qspi-rootfs"; + reg = <0x620000 0x5e0000>; + }; + partition@c00000 { + label = "qspi-bitstream"; + reg = <0xc00000 0x400000>; + }; + }; }; }; diff --git a/arch/arm/dts/zynqmp-clk-ccf.dtsi b/arch/arm/dts/zynqmp-clk-ccf.dtsi index 5f1b0b23c1..dd4569e7bd 100644 --- a/arch/arm/dts/zynqmp-clk-ccf.dtsi +++ b/arch/arm/dts/zynqmp-clk-ccf.dtsi @@ -10,12 +10,6 @@ #include <dt-bindings/clock/xlnx-zynqmp-clk.h> / { - fclk0: fclk0 { - status = "okay"; - compatible = "xlnx,fclk"; - clocks = <&zynqmp_clk PL0_REF>; - }; - pss_ref_clk: pss_ref_clk { bootph-all; compatible = "fixed-clock"; diff --git a/arch/arm/dts/zynqmp-m-a2197-01-revA.dts b/arch/arm/dts/zynqmp-m-a2197-01-revA.dts index 25ef646c84..83b8a98d80 100644 --- a/arch/arm/dts/zynqmp-m-a2197-01-revA.dts +++ b/arch/arm/dts/zynqmp-m-a2197-01-revA.dts @@ -71,11 +71,13 @@ &qspi { status = "okay"; + num-cs = <2>; flash@0 { compatible = "m25p80", "jedec,spi-nor"; /* 32MB */ + reg = <0>, <1>; + parallel-memories = /bits/ 64 <0x4000000 0x4000000>; /* 64MB */ #address-cells = <1>; #size-cells = <1>; - reg = <0x0>; spi-tx-bus-width = <4>; spi-rx-bus-width = <4>; spi-max-frequency = <108000000>; diff --git a/arch/arm/dts/zynqmp-m-a2197-02-revA.dts b/arch/arm/dts/zynqmp-m-a2197-02-revA.dts index ece9e69145..dd37b726d3 100644 --- a/arch/arm/dts/zynqmp-m-a2197-02-revA.dts +++ b/arch/arm/dts/zynqmp-m-a2197-02-revA.dts @@ -67,11 +67,13 @@ &qspi { status = "okay"; + num-cs = <2>; flash@0 { compatible = "m25p80", "jedec,spi-nor"; /* 32MB */ + reg = <0>, <1>; + parallel-memories = /bits/ 64 <0x4000000 0x4000000>; /* 64MB */ #address-cells = <1>; #size-cells = <1>; - reg = <0x0>; spi-tx-bus-width = <4>; spi-rx-bus-width = <4>; spi-max-frequency = <108000000>; diff --git a/arch/arm/dts/zynqmp-m-a2197-03-revA.dts b/arch/arm/dts/zynqmp-m-a2197-03-revA.dts index 7372968e57..811cebafe9 100644 --- a/arch/arm/dts/zynqmp-m-a2197-03-revA.dts +++ b/arch/arm/dts/zynqmp-m-a2197-03-revA.dts @@ -67,11 +67,13 @@ &qspi { status = "okay"; + num-cs = <2>; flash@0 { compatible = "m25p80", "jedec,spi-nor"; /* 32MB */ + reg = <0>, <1>; + parallel-memories = /bits/ 64 <0x4000000 0x4000000>; /* 64MB */ #address-cells = <1>; #size-cells = <1>; - reg = <0x0>; spi-tx-bus-width = <4>; spi-rx-bus-width = <4>; spi-max-frequency = <108000000>; diff --git a/arch/arm/dts/zynqmp-mini-qspi-parallel.dts b/arch/arm/dts/zynqmp-mini-qspi-parallel.dts new file mode 100644 index 0000000000..728e8223de --- /dev/null +++ b/arch/arm/dts/zynqmp-mini-qspi-parallel.dts @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Xilinx ZynqMP QSPI Quad Parallel DTS + * + * Copyright (C) 2015 - 2017 Xilinx, Inc. + */ + +#include "zynqmp-mini-qspi.dts" + +/ { + model = "ZynqMP MINI QSPI PARALLEL"; +}; + +&qspi { + num-cs = <2>; +}; + +&flash0 { + reg = <0>, <1>; + parallel-memories = /bits/ 64 <0x10000000 0x10000000>; /* 256MB */ +}; diff --git a/arch/arm/dts/zynqmp-mini-qspi-single.dts b/arch/arm/dts/zynqmp-mini-qspi-single.dts new file mode 100644 index 0000000000..0f9306e988 --- /dev/null +++ b/arch/arm/dts/zynqmp-mini-qspi-single.dts @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Xilinx ZynqMP QSPI single DTS + * + * Copyright (C) 2015 - 2017 Xilinx, Inc. + */ + +#include "zynqmp-mini-qspi.dts" + +/ { + model = "ZynqMP MINI QSPI SINGLE"; +}; diff --git a/arch/arm/dts/zynqmp-mini-qspi-stacked.dts b/arch/arm/dts/zynqmp-mini-qspi-stacked.dts new file mode 100644 index 0000000000..9a9541b0b6 --- /dev/null +++ b/arch/arm/dts/zynqmp-mini-qspi-stacked.dts @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Xilinx ZynqMP QSPI Quad Stacked DTS + * + * Copyright (C) 2015 - 2017 Xilinx, Inc. + */ + +#include "zynqmp-mini-qspi.dts" + +/ { + model = "ZynqMP MINI QSPI STACKED"; +}; + +&qspi { + num-cs = <2>; +}; + +&flash0 { + reg = <0>, <1>; + stacked-memories = /bits/ 64 <0x10000000 0x10000000>; /* 256MB */ +}; diff --git a/arch/arm/dts/zynqmp-mini-qspi-x1-single.dts b/arch/arm/dts/zynqmp-mini-qspi-x1-single.dts new file mode 100644 index 0000000000..5af875cc71 --- /dev/null +++ b/arch/arm/dts/zynqmp-mini-qspi-x1-single.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Xilinx ZynqMP QSPI x1 Single DTS + * + * Copyright (C) 2015 - 2017 Xilinx, Inc. + */ + +#include "zynqmp-mini-qspi.dts" + +/ { + model = "ZynqMP MINI QSPI X1 SINGLE"; +}; + +&flash0 { + spi-tx-bus-width = <1>; + spi-rx-bus-width = <1>; +}; diff --git a/arch/arm/dts/zynqmp-mini-qspi-x1-stacked.dts b/arch/arm/dts/zynqmp-mini-qspi-x1-stacked.dts new file mode 100644 index 0000000000..ebf890e0ae --- /dev/null +++ b/arch/arm/dts/zynqmp-mini-qspi-x1-stacked.dts @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Xilinx ZynqMP QSPI x1 Stacked DTS + * + * Copyright (C) 2015 - 2017 Xilinx, Inc. + */ + +#include "zynqmp-mini-qspi.dts" + +/ { + model = "ZynqMP MINI QSPI X1 STACKED"; +}; + +&qspi { + num-cs = <2>; +}; + +&flash0 { + reg = <0>, <1>; + stacked-memories = /bits/ 64 <0x10000000 0x10000000>; /* 256MB */ + spi-tx-bus-width = <1>; + spi-rx-bus-width = <1>; +}; diff --git a/arch/arm/dts/zynqmp-mini-qspi-x2-single.dts b/arch/arm/dts/zynqmp-mini-qspi-x2-single.dts new file mode 100644 index 0000000000..a5ab31583e --- /dev/null +++ b/arch/arm/dts/zynqmp-mini-qspi-x2-single.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Xilinx CSE QSPI x2 Single DTS + * + * Copyright (C) 2015 - 2017 Xilinx, Inc. + */ + +#include "zynqmp-mini-qspi.dts" + +/ { + model = "ZynqMP MINI QSPI X2 SINGLE"; +}; + +&flash0 { + spi-tx-bus-width = <2>; + spi-rx-bus-width = <2>; +}; diff --git a/arch/arm/dts/zynqmp-mini-qspi-x2-stacked.dts b/arch/arm/dts/zynqmp-mini-qspi-x2-stacked.dts new file mode 100644 index 0000000000..e234b76f25 --- /dev/null +++ b/arch/arm/dts/zynqmp-mini-qspi-x2-stacked.dts @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Xilinx ZynqMP QSPI x2 Stacked DTS + * + * Copyright (C) 2015 - 2017 Xilinx, Inc. + */ + +#include "zynqmp-mini-qspi.dts" + +/ { + model = "ZynqMP MINI QSPI X2 STACKED"; +}; + +&qspi { + num-cs = <2>; +}; + +&flash0 { + reg = <0>, <1>; + stacked-memories = /bits/ 64 <0x10000000 0x10000000>; /* 256MB */ + spi-tx-bus-width = <2>; + spi-rx-bus-width = <2>; +}; diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso b/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso index 22e7d68d02..c4f1da9218 100644 --- a/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso +++ b/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso @@ -190,6 +190,25 @@ &pinctrl0 { status = "okay"; + pinctrl_gpio0_default: gpio0-default { + conf { + groups = "gpio0_38_grp"; + bias-pull-up; + power-source = <IO_STANDARD_LVCMOS18>; + }; + + mux { + groups = "gpio0_38_grp"; + function = "gpio0"; + }; + + conf-tx { + pins = "MIO38"; + bias-disable; + output-enable; + }; + }; + pinctrl_uart1_default: uart1-default { conf { groups = "uart1_9_grp"; @@ -345,6 +364,12 @@ }; }; +&gpio { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio0_default>; +}; + &uart1 { status = "okay"; pinctrl-names = "default"; diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso b/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso index eadc256306..6c5e0e5660 100644 --- a/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso +++ b/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso @@ -178,6 +178,25 @@ &pinctrl0 { status = "okay"; + pinctrl_gpio0_default: gpio0-default { + conf { + groups = "gpio0_38_grp"; + bias-pull-up; + power-source = <IO_STANDARD_LVCMOS18>; + }; + + mux { + groups = "gpio0_38_grp"; + function = "gpio0"; + }; + + conf-tx { + pins = "MIO38"; + bias-disable; + output-enable; + }; + }; + pinctrl_uart1_default: uart1-default { conf { groups = "uart1_9_grp"; @@ -333,6 +352,12 @@ }; }; +&gpio { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio0_default>; +}; + &uart1 { status = "okay"; pinctrl-names = "default"; diff --git a/arch/arm/dts/zynqmp-vp-x-a2785-00-revA.dts b/arch/arm/dts/zynqmp-vp-x-a2785-00-revA.dts index 2f88aa4a0d..9ab8f5bfff 100644 --- a/arch/arm/dts/zynqmp-vp-x-a2785-00-revA.dts +++ b/arch/arm/dts/zynqmp-vp-x-a2785-00-revA.dts @@ -119,9 +119,13 @@ phy-mode = "sgmii"; /* DTG generates this properly 1512 */ is-internal-pcspma; /* phys = <&psgtr 0 PHY_TYPE_SGMII 0 0>; */ - /* phy-reset-gpios = <&gpio 142 GPIO_ACTIVE_LOW>; */ - phy0: ethernet-phy@0 { /* u131 - M88e1512 */ - reg = <0>; + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + /* reset-gpios = <&gpio 142 GPIO_ACTIVE_LOW>; */ + phy0: ethernet-phy@0 { /* u131 - M88e1512 */ + reg = <0>; + }; }; }; diff --git a/arch/arm/dts/zynqmp-vpk120-revA.dts b/arch/arm/dts/zynqmp-vpk120-revA.dts index 66919f578e..ce76e0b3db 100644 --- a/arch/arm/dts/zynqmp-vpk120-revA.dts +++ b/arch/arm/dts/zynqmp-vpk120-revA.dts @@ -120,9 +120,13 @@ phy-mode = "sgmii"; /* DTG generates this properly 1512 */ is-internal-pcspma; /* phys = <&psgtr 0 PHY_TYPE_SGMII 0 0>; */ - /* phy-reset-gpios = <&gpio 142 GPIO_ACTIVE_LOW>; */ - phy0: ethernet-phy@0 { - reg = <0>; + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + /* reset-gpios = <&gpio 142 GPIO_ACTIVE_LOW>; */ + phy0: ethernet-phy@0 { + reg = <0>; + }; }; }; diff --git a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts index 23a3ff2fed..160c6c58b3 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts @@ -141,8 +141,7 @@ reg = <0x0>; #address-cells = <0x2>; #size-cells = <0x1>; - nand-ecc-mode = "soft"; - nand-ecc-algo = "bch"; + nand-ecc-mode = "hw"; nand-rb = <0>; label = "main-storage-0"; nand-ecc-step-size = <1024>; @@ -178,8 +177,7 @@ reg = <0x1>; #address-cells = <0x2>; #size-cells = <0x1>; - nand-ecc-mode = "soft"; - nand-ecc-algo = "bch"; + nand-ecc-mode = "hw"; nand-rb = <0>; label = "main-storage-1"; nand-ecc-step-size = <1024>; diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index f03c201cae..58a56bc1bd 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -214,16 +214,61 @@ soc_revision: soc-revision@0 { reg = <0x0 0x4>; }; + /* efuse access */ + efuse_dna: efuse-dna@c { + reg = <0xc 0xc>; + }; + efuse_usr0: efuse-usr0@20 { + reg = <0x20 0x4>; + }; + efuse_usr1: efuse-usr1@24 { + reg = <0x24 0x4>; + }; + efuse_usr2: efuse-usr2@28 { + reg = <0x28 0x4>; + }; + efuse_usr3: efuse-usr3@2c { + reg = <0x2c 0x4>; + }; + efuse_usr4: efuse-usr4@30 { + reg = <0x30 0x4>; + }; + efuse_usr5: efuse-usr5@34 { + reg = <0x34 0x4>; + }; + efuse_usr6: efuse-usr6@38 { + reg = <0x38 0x4>; + }; + efuse_usr7: efuse-usr7@3c { + reg = <0x3c 0x4>; + }; + efuse_miscusr: efuse-miscusr@40 { + reg = <0x40 0x4>; + }; + efuse_chash: efuse-chash@50 { + reg = <0x50 0x4>; + }; + efuse_pufmisc: efuse-pufmisc@54 { + reg = <0x54 0x4>; + }; + efuse_sec: efuse-sec@58 { + reg = <0x58 0x4>; + }; + efuse_spkid: efuse-spkid@5c { + reg = <0x5c 0x4>; + }; + efuse_ppk0hash: efuse-ppk0hash@a0 { + reg = <0xa0 0x30>; + }; + efuse_ppk1hash: efuse-ppk1hash@d0 { + reg = <0xd0 0x30>; + }; }; zynqmp_pcap: pcap { compatible = "xlnx,zynqmp-pcap-fpga"; }; - xlnx_aes: zynqmp-aes { - compatible = "xlnx,zynqmp-aes"; - }; - zynqmp_reset: reset-controller { compatible = "xlnx,zynqmp-reset"; #reset-cells = <1>; @@ -261,7 +306,6 @@ #address-cells = <2>; #size-cells = <2>; ranges; - power-domains = <&zynqmp_firmware PD_PL>; }; remoteproc { @@ -344,7 +388,7 @@ clock-names = "clk_main", "clk_apb"; #dma-cells = <1>; xlnx,bus-width = <128>; - iommus = <&smmu 0x14e8>; + /* iommus = <&smmu 0x14e8>; */ power-domains = <&zynqmp_firmware PD_GDMA>; }; @@ -357,7 +401,7 @@ clock-names = "clk_main", "clk_apb"; #dma-cells = <1>; xlnx,bus-width = <128>; - iommus = <&smmu 0x14e9>; + /* iommus = <&smmu 0x14e9>; */ power-domains = <&zynqmp_firmware PD_GDMA>; }; @@ -370,7 +414,7 @@ clock-names = "clk_main", "clk_apb"; #dma-cells = <1>; xlnx,bus-width = <128>; - iommus = <&smmu 0x14ea>; + /* iommus = <&smmu 0x14ea>; */ power-domains = <&zynqmp_firmware PD_GDMA>; }; @@ -383,7 +427,7 @@ clock-names = "clk_main", "clk_apb"; #dma-cells = <1>; xlnx,bus-width = <128>; - iommus = <&smmu 0x14eb>; + /* iommus = <&smmu 0x14eb>; */ power-domains = <&zynqmp_firmware PD_GDMA>; }; @@ -396,7 +440,7 @@ clock-names = "clk_main", "clk_apb"; #dma-cells = <1>; xlnx,bus-width = <128>; - iommus = <&smmu 0x14ec>; + /* iommus = <&smmu 0x14ec>; */ power-domains = <&zynqmp_firmware PD_GDMA>; }; @@ -409,7 +453,7 @@ clock-names = "clk_main", "clk_apb"; #dma-cells = <1>; xlnx,bus-width = <128>; - iommus = <&smmu 0x14ed>; + /* iommus = <&smmu 0x14ed>; */ power-domains = <&zynqmp_firmware PD_GDMA>; }; @@ -422,7 +466,7 @@ clock-names = "clk_main", "clk_apb"; #dma-cells = <1>; xlnx,bus-width = <128>; - iommus = <&smmu 0x14ee>; + /* iommus = <&smmu 0x14ee>; */ power-domains = <&zynqmp_firmware PD_GDMA>; }; @@ -435,7 +479,7 @@ clock-names = "clk_main", "clk_apb"; #dma-cells = <1>; xlnx,bus-width = <128>; - iommus = <&smmu 0x14ef>; + /* iommus = <&smmu 0x14ef>; */ power-domains = <&zynqmp_firmware PD_GDMA>; }; @@ -480,7 +524,7 @@ clock-names = "clk_main", "clk_apb"; #dma-cells = <1>; xlnx,bus-width = <64>; - iommus = <&smmu 0x868>; + /* iommus = <&smmu 0x868>; */ power-domains = <&zynqmp_firmware PD_ADMA>; }; @@ -493,7 +537,7 @@ clock-names = "clk_main", "clk_apb"; #dma-cells = <1>; xlnx,bus-width = <64>; - iommus = <&smmu 0x869>; + /* iommus = <&smmu 0x869>; */ power-domains = <&zynqmp_firmware PD_ADMA>; }; @@ -506,7 +550,7 @@ clock-names = "clk_main", "clk_apb"; #dma-cells = <1>; xlnx,bus-width = <64>; - iommus = <&smmu 0x86a>; + /* iommus = <&smmu 0x86a>; */ power-domains = <&zynqmp_firmware PD_ADMA>; }; @@ -519,7 +563,7 @@ clock-names = "clk_main", "clk_apb"; #dma-cells = <1>; xlnx,bus-width = <64>; - iommus = <&smmu 0x86b>; + /* iommus = <&smmu 0x86b>; */ power-domains = <&zynqmp_firmware PD_ADMA>; }; @@ -532,7 +576,7 @@ clock-names = "clk_main", "clk_apb"; #dma-cells = <1>; xlnx,bus-width = <64>; - iommus = <&smmu 0x86c>; + /* iommus = <&smmu 0x86c>; */ power-domains = <&zynqmp_firmware PD_ADMA>; }; @@ -545,7 +589,7 @@ clock-names = "clk_main", "clk_apb"; #dma-cells = <1>; xlnx,bus-width = <64>; - iommus = <&smmu 0x86d>; + /* iommus = <&smmu 0x86d>; */ power-domains = <&zynqmp_firmware PD_ADMA>; }; @@ -558,7 +602,7 @@ clock-names = "clk_main", "clk_apb"; #dma-cells = <1>; xlnx,bus-width = <64>; - iommus = <&smmu 0x86e>; + /* iommus = <&smmu 0x86e>; */ power-domains = <&zynqmp_firmware PD_ADMA>; }; @@ -571,7 +615,7 @@ clock-names = "clk_main", "clk_apb"; #dma-cells = <1>; xlnx,bus-width = <64>; - iommus = <&smmu 0x86f>; + /* iommus = <&smmu 0x86f>; */ power-domains = <&zynqmp_firmware PD_ADMA>; }; @@ -591,7 +635,7 @@ interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; - iommus = <&smmu 0x872>; + /* iommus = <&smmu 0x872>; */ power-domains = <&zynqmp_firmware PD_NAND>; }; @@ -603,7 +647,7 @@ <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; reg = <0x0 0xff0b0000 0x0 0x1000>; clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk"; - iommus = <&smmu 0x874>; + /* iommus = <&smmu 0x874>; */ power-domains = <&zynqmp_firmware PD_ETH_0>; resets = <&zynqmp_reset ZYNQMP_RESET_GEM0>; reset-names = "gem0_rst"; @@ -617,7 +661,7 @@ <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; reg = <0x0 0xff0c0000 0x0 0x1000>; clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk"; - iommus = <&smmu 0x875>; + /* iommus = <&smmu 0x875>; */ power-domains = <&zynqmp_firmware PD_ETH_1>; resets = <&zynqmp_reset ZYNQMP_RESET_GEM1>; reset-names = "gem1_rst"; @@ -631,7 +675,7 @@ <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; reg = <0x0 0xff0d0000 0x0 0x1000>; clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk"; - iommus = <&smmu 0x876>; + /* iommus = <&smmu 0x876>; */ power-domains = <&zynqmp_firmware PD_ETH_2>; resets = <&zynqmp_reset ZYNQMP_RESET_GEM2>; reset-names = "gem2_rst"; @@ -645,7 +689,7 @@ <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; reg = <0x0 0xff0e0000 0x0 0x1000>; clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk"; - iommus = <&smmu 0x877>; + /* iommus = <&smmu 0x877>; */ power-domains = <&zynqmp_firmware PD_ETH_3>; resets = <&zynqmp_reset ZYNQMP_RESET_GEM3>; reset-names = "gem3_rst"; @@ -724,7 +768,7 @@ <0x0 0x0 0x0 0x2 &pcie_intc 0x2>, <0x0 0x0 0x0 0x3 &pcie_intc 0x3>, <0x0 0x0 0x0 0x4 &pcie_intc 0x4>; - iommus = <&smmu 0x4d0>; + /* iommus = <&smmu 0x4d0>; */ power-domains = <&zynqmp_firmware PD_PCIE>; pcie_intc: legacy-interrupt-controller { interrupt-controller; @@ -745,7 +789,7 @@ <0x0 0xc0000000 0x0 0x8000000>; #address-cells = <1>; #size-cells = <0>; - iommus = <&smmu 0x873>; + /* iommus = <&smmu 0x873>; */ power-domains = <&zynqmp_firmware PD_QSPI>; }; @@ -777,8 +821,7 @@ interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; power-domains = <&zynqmp_firmware PD_SATA>; resets = <&zynqmp_reset ZYNQMP_RESET_SATA>; - iommus = <&smmu 0x4c0>, <&smmu 0x4c1>, - <&smmu 0x4c2>, <&smmu 0x4c3>; + /* iommus = <&smmu 0x4c0>, <&smmu 0x4c1>, <&smmu 0x4c2>, <&smmu 0x4c3>; */ /* dma-coherent; */ }; @@ -790,7 +833,7 @@ interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; reg = <0x0 0xff160000 0x0 0x1000>; clock-names = "clk_xin", "clk_ahb"; - iommus = <&smmu 0x870>; + /* iommus = <&smmu 0x870>; */ #clock-cells = <1>; clock-output-names = "clk_out_sd0", "clk_in_sd0"; power-domains = <&zynqmp_firmware PD_SD_0>; @@ -805,7 +848,7 @@ interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; reg = <0x0 0xff170000 0x0 0x1000>; clock-names = "clk_xin", "clk_ahb"; - iommus = <&smmu 0x871>; + /* iommus = <&smmu 0x871>; */ #clock-cells = <1>; clock-output-names = "clk_out_sd1", "clk_in_sd1"; power-domains = <&zynqmp_firmware PD_SD_1>; @@ -956,11 +999,10 @@ interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; - iommus = <&smmu 0x860>; + /* iommus = <&smmu 0x860>; */ snps,quirk-frame-length-adjustment = <0x20>; clock-names = "ref"; snps,enable_guctl1_ipd_quirk; - snps,xhci-stream-quirk; snps,resume-hs-terminations; /* dma-coherent; */ }; @@ -989,11 +1031,10 @@ interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; - iommus = <&smmu 0x861>; + /* iommus = <&smmu 0x861>; */ snps,quirk-frame-length-adjustment = <0x20>; clock-names = "ref"; snps,enable_guctl1_ipd_quirk; - snps,xhci-stream-quirk; snps,resume-hs-terminations; /* dma-coherent; */ }; @@ -1039,8 +1080,6 @@ compatible = "xlnx,zynqmp-ams-pl"; status = "disabled"; reg = <0x400 0x400>; - #address-cells = <1>; - #size-cells = <0>; }; }; @@ -1052,6 +1091,7 @@ interrupt-parent = <&gic>; clock-names = "axi_clk"; power-domains = <&zynqmp_firmware PD_DP>; + /* iommus = <&smmu 0xce4>; */ #dma-cells = <1>; }; @@ -1066,6 +1106,7 @@ reg-names = "dp", "blend", "av_buf", "aud"; interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; interrupt-parent = <&gic>; + /* iommus = <&smmu 0xce3>; */ clock-names = "dp_apb_clk", "dp_aud_clk", "dp_vtc_pixel_clk_in"; power-domains = <&zynqmp_firmware PD_DP>; diff --git a/arch/arm/include/asm/arch-am33xx/clk_synthesizer.h b/arch/arm/include/asm/arch-am33xx/clk_synthesizer.h index 7bcafba6f0..8e3d55f3e7 100644 --- a/arch/arm/include/asm/arch-am33xx/clk_synthesizer.h +++ b/arch/arm/include/asm/arch-am33xx/clk_synthesizer.h @@ -4,7 +4,7 @@ * * Clock synthesizer header * - * Copyright (C) 2016, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2016, Texas Instruments, Incorporated - https://www.ti.com/ */ #ifndef __CLK_SYNTHESIZER_H diff --git a/arch/arm/include/asm/arch-am33xx/clock.h b/arch/arm/include/asm/arch-am33xx/clock.h index 67400c2c63..13960db2fb 100644 --- a/arch/arm/include/asm/arch-am33xx/clock.h +++ b/arch/arm/include/asm/arch-am33xx/clock.h @@ -4,7 +4,7 @@ * * clock header * - * Copyright (C) 2011, Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2011, Texas Instruments Incorporated - https://www.ti.com/ */ #ifndef _CLOCKS_H_ diff --git a/arch/arm/include/asm/arch-am33xx/clocks_am33xx.h b/arch/arm/include/asm/arch-am33xx/clocks_am33xx.h index e5ad50754e..adb574e8f1 100644 --- a/arch/arm/include/asm/arch-am33xx/clocks_am33xx.h +++ b/arch/arm/include/asm/arch-am33xx/clocks_am33xx.h @@ -4,7 +4,7 @@ * * AM33xx clock define * - * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ */ #ifndef _CLOCKS_AM33XX_H_ diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h b/arch/arm/include/asm/arch-am33xx/cpu.h index b33e6f7fd1..8ec25854f3 100644 --- a/arch/arm/include/asm/arch-am33xx/cpu.h +++ b/arch/arm/include/asm/arch-am33xx/cpu.h @@ -4,7 +4,7 @@ * * AM33xx specific header file * - * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ */ #ifndef _AM33XX_CPU_H diff --git a/arch/arm/include/asm/arch-am33xx/ddr_defs.h b/arch/arm/include/asm/arch-am33xx/ddr_defs.h index 1a03107107..6e7a62bc22 100644 --- a/arch/arm/include/asm/arch-am33xx/ddr_defs.h +++ b/arch/arm/include/asm/arch-am33xx/ddr_defs.h @@ -4,7 +4,7 @@ * * ddr specific header * - * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ */ #ifndef _DDR_DEFS_H diff --git a/arch/arm/include/asm/arch-am33xx/hardware.h b/arch/arm/include/asm/arch-am33xx/hardware.h index 387f053ce6..33ee915098 100644 --- a/arch/arm/include/asm/arch-am33xx/hardware.h +++ b/arch/arm/include/asm/arch-am33xx/hardware.h @@ -4,7 +4,7 @@ * * hardware specific header * - * Copyright (C) 2013, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2013, Texas Instruments, Incorporated - https://www.ti.com/ */ #ifndef __AM33XX_HARDWARE_H diff --git a/arch/arm/include/asm/arch-am33xx/hardware_am33xx.h b/arch/arm/include/asm/arch-am33xx/hardware_am33xx.h index 878ef3e5d2..de597c2775 100644 --- a/arch/arm/include/asm/arch-am33xx/hardware_am33xx.h +++ b/arch/arm/include/asm/arch-am33xx/hardware_am33xx.h @@ -4,7 +4,7 @@ * * AM33xx hardware specific header * - * Copyright (C) 2013, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2013, Texas Instruments, Incorporated - https://www.ti.com/ */ #ifndef __AM33XX_HARDWARE_AM33XX_H diff --git a/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h b/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h index 0b73ebdbb4..8786d8c923 100644 --- a/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h +++ b/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h @@ -4,7 +4,7 @@ * * AM43xx hardware specific header * - * Copyright (C) 2013, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2013, Texas Instruments, Incorporated - https://www.ti.com/ */ #ifndef __AM43XX_HARDWARE_AM43XX_H diff --git a/arch/arm/include/asm/arch-am33xx/mmc_host_def.h b/arch/arm/include/asm/arch-am33xx/mmc_host_def.h index b1b189631a..ed60abf2e7 100644 --- a/arch/arm/include/asm/arch-am33xx/mmc_host_def.h +++ b/arch/arm/include/asm/arch-am33xx/mmc_host_def.h @@ -1,7 +1,7 @@ /* * mmc_host_def.h * - * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as diff --git a/arch/arm/include/asm/arch-am33xx/mux.h b/arch/arm/include/asm/arch-am33xx/mux.h index ebb2d303df..f704afaca1 100644 --- a/arch/arm/include/asm/arch-am33xx/mux.h +++ b/arch/arm/include/asm/arch-am33xx/mux.h @@ -1,7 +1,7 @@ /* * mux.h * - * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as diff --git a/arch/arm/include/asm/arch-am33xx/mux_am33xx.h b/arch/arm/include/asm/arch-am33xx/mux_am33xx.h index 26bd4b46ff..c702e4adc4 100644 --- a/arch/arm/include/asm/arch-am33xx/mux_am33xx.h +++ b/arch/arm/include/asm/arch-am33xx/mux_am33xx.h @@ -1,7 +1,7 @@ /* * mux_am33xx.h * - * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as diff --git a/arch/arm/include/asm/arch-am33xx/mux_am43xx.h b/arch/arm/include/asm/arch-am33xx/mux_am43xx.h index f74ae74ff1..24f0041c94 100644 --- a/arch/arm/include/asm/arch-am33xx/mux_am43xx.h +++ b/arch/arm/include/asm/arch-am33xx/mux_am43xx.h @@ -2,7 +2,7 @@ /* * mux_am43xx.h * - * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ */ #ifndef _MUX_AM43XX_H_ diff --git a/arch/arm/include/asm/arch-am33xx/omap.h b/arch/arm/include/asm/arch-am33xx/omap.h index 53046deed5..71a84fef35 100644 --- a/arch/arm/include/asm/arch-am33xx/omap.h +++ b/arch/arm/include/asm/arch-am33xx/omap.h @@ -2,7 +2,7 @@ /* * omap.h * - * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ * * Author: * Chandan Nath <chandan.nath@ti.com> diff --git a/arch/arm/include/asm/arch-am33xx/sys_proto.h b/arch/arm/include/asm/arch-am33xx/sys_proto.h index be17aad29e..513cdaca85 100644 --- a/arch/arm/include/asm/arch-am33xx/sys_proto.h +++ b/arch/arm/include/asm/arch-am33xx/sys_proto.h @@ -4,7 +4,7 @@ * * System information header * - * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ */ #ifndef _SYS_PROTO_H_ diff --git a/arch/arm/include/asm/arch-omap3/emif4.h b/arch/arm/include/asm/arch-omap3/emif4.h index bac43b231f..397bb47edf 100644 --- a/arch/arm/include/asm/arch-omap3/emif4.h +++ b/arch/arm/include/asm/arch-omap3/emif4.h @@ -4,7 +4,7 @@ * Vaibhav Hiremath <hvaibhav@ti.com> * * Copyright (C) 2010 - * Texas Instruments Incorporated - http://www.ti.com/ + * Texas Instruments Incorporated - https://www.ti.com/ */ #ifndef _EMIF_H_ diff --git a/arch/arm/include/asm/arch-omap4/ehci.h b/arch/arm/include/asm/arch-omap4/ehci.h index 30bdaad64e..e8fe88f2af 100644 --- a/arch/arm/include/asm/arch-omap4/ehci.h +++ b/arch/arm/include/asm/arch-omap4/ehci.h @@ -4,7 +4,7 @@ * Based on LINUX KERNEL * drivers/usb/host/ehci-omap.c and drivers/mfd/omap-usb-host.c * - * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com * Author: Govindraj R <govindraj.raja@ti.com> */ diff --git a/arch/arm/include/asm/arch-omap4/hardware.h b/arch/arm/include/asm/arch-omap4/hardware.h index 48dc809249..67e3dae7bc 100644 --- a/arch/arm/include/asm/arch-omap4/hardware.h +++ b/arch/arm/include/asm/arch-omap4/hardware.h @@ -4,7 +4,7 @@ * * hardware specific header * - * Copyright (C) 2013, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2013, Texas Instruments, Incorporated - https://www.ti.com/ */ #ifndef __OMAP_HARDWARE_H diff --git a/arch/arm/include/asm/arch-omap5/ehci.h b/arch/arm/include/asm/arch-omap5/ehci.h index 1790b92a24..3c52a76d48 100644 --- a/arch/arm/include/asm/arch-omap5/ehci.h +++ b/arch/arm/include/asm/arch-omap5/ehci.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com* + * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com* * Author: Govindraj R <govindraj.raja@ti.com> */ diff --git a/arch/arm/include/asm/arch-omap5/hardware.h b/arch/arm/include/asm/arch-omap5/hardware.h index b6d26e9f0e..c948c0ef11 100644 --- a/arch/arm/include/asm/arch-omap5/hardware.h +++ b/arch/arm/include/asm/arch-omap5/hardware.h @@ -4,7 +4,7 @@ * * hardware specific header * - * Copyright (C) 2013, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2013, Texas Instruments, Incorporated - https://www.ti.com/ */ #ifndef __OMAP_HARDWARE_H diff --git a/arch/arm/include/asm/arch-rk3066/boot0.h b/arch/arm/include/asm/arch-rk3066/boot0.h index 28c0fb9a4c..6bf3828c84 100644 --- a/arch/arm/include/asm/arch-rk3066/boot0.h +++ b/arch/arm/include/asm/arch-rk3066/boot0.h @@ -3,6 +3,81 @@ #ifndef __ASM_ARCH_BOOT0_H__ #define __ASM_ARCH_BOOT0_H__ -#include <asm/arch-rockchip/boot0.h> +#include <asm/arch-rockchip/boot_mode.h> +/* + * Execution starts on the instruction following this 4-byte header + * (containing the magic 'RK30'). This magic constant will be written into + * the final image by the rkimage tool, but we need to reserve space for it here. + */ +#ifdef CONFIG_SPL_BUILD + b 1f /* if overwritten, entry-address is at the next word */ +1: +#endif + +#if CONFIG_IS_ENABLED(ROCKCHIP_EARLYRETURN_TO_BROM) +/* + * Keep track of the re-entries with help of the lr register. + * This binary can be re-used and called from various BROM functions. + * Only when it's called from the part that handles SPI, NAND or EMMC + * hardware it needs to early return to BROM ones. + * In download mode when it handles data on USB OTG and UART0 + * this section must be skipped. + */ + ldr r3, =CONFIG_ROCKCHIP_BOOT_LR_REG + cmp lr, r3 /* if (LR != CONFIG_ROCKCHIP_BOOT_LR_REG) */ + bne reset /* goto reset; */ +/* + * Unlike newer Rockchip SoC models the rk3066 BROM code does not have built-in + * support to enter download mode on return to BROM. This binary must check + * the boot mode register for the BOOT_BROM_DOWNLOAD flag and reset if it's set. + * It then returns to BROM to the end of the function that reads boot blocks. + * From there the BROM code goes into a download mode and waits for data + * on USB OTG and UART0. + */ + ldr r2, =BOOT_BROM_DOWNLOAD + ldr r3, =CONFIG_ROCKCHIP_BOOT_MODE_REG + ldr r0, [r3] /* if (readl(CONFIG_ROCKCHIP_BOOT_MODE_REG) != */ + cmp r0, r2 /* BOOT_BROM_DOWNLOAD) { */ + bne early_return /* goto early_return; */ + /* } else { */ + mov r0, #0 + str r0, [r3] /* writel(0, CONFIG_ROCKCHIP_BOOT_MODE_REG); */ + + ldr r3, =CONFIG_ROCKCHIP_BOOT_RETURN_REG + bx r3 /* return to CONFIG_ROCKCHIP_BOOT_RETURN_REG;*/ + /* } */ +early_return: + bx lr /* return to LR in BROM */ + +SAVE_SP_ADDR: + .word 0 + + .globl save_boot_params +save_boot_params: + push {r1-r12, lr} + ldr r0, =SAVE_SP_ADDR + str sp, [r0] + b save_boot_params_ret + + .globl back_to_bootrom +back_to_bootrom: + ldr r0, =SAVE_SP_ADDR + ldr sp, [r0] + mov r0, #0 + pop {r1-r12, pc} +#endif + +#if (defined(CONFIG_SPL_BUILD)) +/* U-Boot proper of armv7 does not need this */ + b reset +#endif + +/* + * For armv7, the addr '_start' will be used as vector start address + * and is written to the VBAR register, which needs to aligned to 0x20. + */ + .align(5), 0x0 +_start: + ARM_VECTORS #endif diff --git a/arch/arm/include/asm/arch-sunxi/dram_sun50i_h616.h b/arch/arm/include/asm/arch-sunxi/dram_sun50i_h616.h index 11774deded..a8fdda124a 100644 --- a/arch/arm/include/asm/arch-sunxi/dram_sun50i_h616.h +++ b/arch/arm/include/asm/arch-sunxi/dram_sun50i_h616.h @@ -130,6 +130,7 @@ check_member(sunxi_mctl_ctl_reg, unk_0x4240, 0x4240); #define MSTR_DEVICETYPE_LPDDR2 BIT(2) #define MSTR_DEVICETYPE_LPDDR3 BIT(3) #define MSTR_DEVICETYPE_DDR4 BIT(4) +#define MSTR_DEVICETYPE_LPDDR4 BIT(5) #define MSTR_DEVICETYPE_MASK GENMASK(5, 0) #define MSTR_2TMODE BIT(10) #define MSTR_BUSWIDTH_FULL (0 << 12) @@ -154,6 +155,7 @@ struct dram_para { u32 odt_en; u32 tpr0; u32 tpr2; + u32 tpr6; u32 tpr10; u32 tpr11; u32 tpr12; diff --git a/arch/arm/include/asm/arch-sunxi/mmc.h b/arch/arm/include/asm/arch-sunxi/mmc.h index 8ed3e0459c..b8d91b5c64 100644 --- a/arch/arm/include/asm/arch-sunxi/mmc.h +++ b/arch/arm/include/asm/arch-sunxi/mmc.h @@ -1,139 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2007-2011 - * Allwinner Technology Co., Ltd. <www.allwinnertech.com> - * Aaron <leafy.myeh@allwinnertech.com> - * - * MMC register definition for allwinner sunxi platform. - */ -#ifndef _SUNXI_MMC_H -#define _SUNXI_MMC_H - -#include <linux/types.h> - -struct sunxi_mmc { - u32 gctrl; /* 0x00 global control */ - u32 clkcr; /* 0x04 clock control */ - u32 timeout; /* 0x08 time out */ - u32 width; /* 0x0c bus width */ - u32 blksz; /* 0x10 block size */ - u32 bytecnt; /* 0x14 byte count */ - u32 cmd; /* 0x18 command */ - u32 arg; /* 0x1c argument */ - u32 resp0; /* 0x20 response 0 */ - u32 resp1; /* 0x24 response 1 */ - u32 resp2; /* 0x28 response 2 */ - u32 resp3; /* 0x2c response 3 */ - u32 imask; /* 0x30 interrupt mask */ - u32 mint; /* 0x34 masked interrupt status */ - u32 rint; /* 0x38 raw interrupt status */ - u32 status; /* 0x3c status */ - u32 ftrglevel; /* 0x40 FIFO threshold watermark*/ - u32 funcsel; /* 0x44 function select */ - u32 cbcr; /* 0x48 CIU byte count */ - u32 bbcr; /* 0x4c BIU byte count */ - u32 dbgc; /* 0x50 debug enable */ - u32 res0; /* 0x54 reserved */ - u32 a12a; /* 0x58 Auto command 12 argument */ - u32 ntsr; /* 0x5c New timing set register */ - u32 res1[8]; - u32 dmac; /* 0x80 internal DMA control */ - u32 dlba; /* 0x84 internal DMA descr list base address */ - u32 idst; /* 0x88 internal DMA status */ - u32 idie; /* 0x8c internal DMA interrupt enable */ - u32 chda; /* 0x90 */ - u32 cbda; /* 0x94 */ - u32 res2[26]; -#if defined(CONFIG_SUNXI_GEN_SUN6I) || defined(CONFIG_SUN50I_GEN_H6) || defined(CONFIG_SUNXI_GEN_NCAT2) - u32 res3[17]; - u32 samp_dl; - u32 res4[46]; -#endif - u32 fifo; /* 0x100 / 0x200 FIFO access address */ -}; - -#define SUNXI_MMC_CLK_POWERSAVE (0x1 << 17) -#define SUNXI_MMC_CLK_ENABLE (0x1 << 16) -#define SUNXI_MMC_CLK_DIVIDER_MASK (0xff) - -#define SUNXI_MMC_GCTRL_SOFT_RESET (0x1 << 0) -#define SUNXI_MMC_GCTRL_FIFO_RESET (0x1 << 1) -#define SUNXI_MMC_GCTRL_DMA_RESET (0x1 << 2) -#define SUNXI_MMC_GCTRL_RESET (SUNXI_MMC_GCTRL_SOFT_RESET|\ - SUNXI_MMC_GCTRL_FIFO_RESET|\ - SUNXI_MMC_GCTRL_DMA_RESET) -#define SUNXI_MMC_GCTRL_DMA_ENABLE (0x1 << 5) -#define SUNXI_MMC_GCTRL_ACCESS_BY_AHB (0x1 << 31) - -#define SUNXI_MMC_CMD_RESP_EXPIRE (0x1 << 6) -#define SUNXI_MMC_CMD_LONG_RESPONSE (0x1 << 7) -#define SUNXI_MMC_CMD_CHK_RESPONSE_CRC (0x1 << 8) -#define SUNXI_MMC_CMD_DATA_EXPIRE (0x1 << 9) -#define SUNXI_MMC_CMD_WRITE (0x1 << 10) -#define SUNXI_MMC_CMD_AUTO_STOP (0x1 << 12) -#define SUNXI_MMC_CMD_WAIT_PRE_OVER (0x1 << 13) -#define SUNXI_MMC_CMD_SEND_INIT_SEQ (0x1 << 15) -#define SUNXI_MMC_CMD_UPCLK_ONLY (0x1 << 21) -#define SUNXI_MMC_CMD_START (0x1 << 31) - -#define SUNXI_MMC_RINT_RESP_ERROR (0x1 << 1) -#define SUNXI_MMC_RINT_COMMAND_DONE (0x1 << 2) -#define SUNXI_MMC_RINT_DATA_OVER (0x1 << 3) -#define SUNXI_MMC_RINT_TX_DATA_REQUEST (0x1 << 4) -#define SUNXI_MMC_RINT_RX_DATA_REQUEST (0x1 << 5) -#define SUNXI_MMC_RINT_RESP_CRC_ERROR (0x1 << 6) -#define SUNXI_MMC_RINT_DATA_CRC_ERROR (0x1 << 7) -#define SUNXI_MMC_RINT_RESP_TIMEOUT (0x1 << 8) -#define SUNXI_MMC_RINT_DATA_TIMEOUT (0x1 << 9) -#define SUNXI_MMC_RINT_VOLTAGE_CHANGE_DONE (0x1 << 10) -#define SUNXI_MMC_RINT_FIFO_RUN_ERROR (0x1 << 11) -#define SUNXI_MMC_RINT_HARD_WARE_LOCKED (0x1 << 12) -#define SUNXI_MMC_RINT_START_BIT_ERROR (0x1 << 13) -#define SUNXI_MMC_RINT_AUTO_COMMAND_DONE (0x1 << 14) -#define SUNXI_MMC_RINT_END_BIT_ERROR (0x1 << 15) -#define SUNXI_MMC_RINT_SDIO_INTERRUPT (0x1 << 16) -#define SUNXI_MMC_RINT_CARD_INSERT (0x1 << 30) -#define SUNXI_MMC_RINT_CARD_REMOVE (0x1 << 31) -#define SUNXI_MMC_RINT_INTERRUPT_ERROR_BIT \ - (SUNXI_MMC_RINT_RESP_ERROR | \ - SUNXI_MMC_RINT_RESP_CRC_ERROR | \ - SUNXI_MMC_RINT_DATA_CRC_ERROR | \ - SUNXI_MMC_RINT_RESP_TIMEOUT | \ - SUNXI_MMC_RINT_DATA_TIMEOUT | \ - SUNXI_MMC_RINT_VOLTAGE_CHANGE_DONE | \ - SUNXI_MMC_RINT_FIFO_RUN_ERROR | \ - SUNXI_MMC_RINT_HARD_WARE_LOCKED | \ - SUNXI_MMC_RINT_START_BIT_ERROR | \ - SUNXI_MMC_RINT_END_BIT_ERROR) /* 0xbfc2 */ -#define SUNXI_MMC_RINT_INTERRUPT_DONE_BIT \ - (SUNXI_MMC_RINT_AUTO_COMMAND_DONE | \ - SUNXI_MMC_RINT_DATA_OVER | \ - SUNXI_MMC_RINT_COMMAND_DONE | \ - SUNXI_MMC_RINT_VOLTAGE_CHANGE_DONE) - -#define SUNXI_MMC_STATUS_RXWL_FLAG (0x1 << 0) -#define SUNXI_MMC_STATUS_TXWL_FLAG (0x1 << 1) -#define SUNXI_MMC_STATUS_FIFO_EMPTY (0x1 << 2) -#define SUNXI_MMC_STATUS_FIFO_FULL (0x1 << 3) -#define SUNXI_MMC_STATUS_CARD_PRESENT (0x1 << 8) -#define SUNXI_MMC_STATUS_CARD_DATA_BUSY (0x1 << 9) -#define SUNXI_MMC_STATUS_DATA_FSM_BUSY (0x1 << 10) -#define SUNXI_MMC_STATUS_FIFO_LEVEL(reg) (((reg) >> 17) & 0x3fff) - -#define SUNXI_MMC_NTSR_MODE_SEL_NEW (0x1 << 31) - -#define SUNXI_MMC_IDMAC_RESET (0x1 << 0) -#define SUNXI_MMC_IDMAC_FIXBURST (0x1 << 1) -#define SUNXI_MMC_IDMAC_ENABLE (0x1 << 7) - -#define SUNXI_MMC_IDIE_TXIRQ (0x1 << 0) -#define SUNXI_MMC_IDIE_RXIRQ (0x1 << 1) - -#define SUNXI_MMC_COMMON_CLK_GATE (1 << 16) -#define SUNXI_MMC_COMMON_RESET (1 << 18) - -#define SUNXI_MMC_CAL_DL_SW_EN (0x1 << 7) +#ifndef _ASM_ARCH_MMC_H_ +#define _ASM_ARCH_MMC_H_ struct mmc *sunxi_mmc_init(int sdc_no); -#endif /* _SUNXI_MMC_H */ + +#endif /* _ASM_ARCH_MMC_H_ */ diff --git a/arch/arm/include/asm/armv8/mmu.h b/arch/arm/include/asm/armv8/mmu.h index 4f0adb0732..ce655ce7a9 100644 --- a/arch/arm/include/asm/armv8/mmu.h +++ b/arch/arm/include/asm/armv8/mmu.h @@ -49,13 +49,10 @@ #define PTE_TYPE_BLOCK (1 << 0) #define PTE_TYPE_VALID (1 << 0) -#define PTE_RDONLY BIT(7) -#define PTE_DBM BIT(51) - -#define PTE_TABLE_PXN BIT(59) -#define PTE_TABLE_XN BIT(60) -#define PTE_TABLE_AP BIT(61) -#define PTE_TABLE_NS BIT(63) +#define PTE_TABLE_PXN (1UL << 59) +#define PTE_TABLE_XN (1UL << 60) +#define PTE_TABLE_AP (1UL << 61) +#define PTE_TABLE_NS (1UL << 63) /* * Block @@ -102,15 +99,6 @@ #define TCR_TG0_16K (2 << 14) #define TCR_EPD1_DISABLE (1 << 23) -#define TCR_EL1_HA BIT(39) -#define TCR_EL1_HD BIT(40) - -#define TCR_EL2_HA BIT(21) -#define TCR_EL2_HD BIT(22) - -#define TCR_EL3_HA BIT(21) -#define TCR_EL3_HD BIT(22) - #define TCR_EL1_RSVD (1U << 31) #define TCR_EL2_RSVD (1U << 31 | 1 << 23) #define TCR_EL3_RSVD (1U << 31 | 1 << 23) diff --git a/arch/arm/include/asm/ehci-omap.h b/arch/arm/include/asm/ehci-omap.h index 2b51b5eb99..662b62cbb2 100644 --- a/arch/arm/include/asm/ehci-omap.h +++ b/arch/arm/include/asm/ehci-omap.h @@ -4,7 +4,7 @@ * Based on LINUX KERNEL * drivers/usb/host/ehci-omap.c and drivers/mfd/omap-usb-host.c * - * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com* + * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com* * Author: Govindraj R <govindraj.raja@ti.com> */ diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h index b385bae026..75bd9d56f8 100644 --- a/arch/arm/include/asm/global_data.h +++ b/arch/arm/include/asm/global_data.h @@ -52,8 +52,6 @@ struct arch_global_data { #if defined(CONFIG_ARM64) unsigned long tlb_fillptr; unsigned long tlb_emerg; - unsigned int first_block_level; - bool has_hafdbs; #endif #endif #ifdef CFG_SYS_MEM_RESERVE_SECURE diff --git a/arch/arm/include/asm/ti-common/omap_wdt.h b/arch/arm/include/asm/ti-common/omap_wdt.h index 42d7e4c989..855f889225 100644 --- a/arch/arm/include/asm/ti-common/omap_wdt.h +++ b/arch/arm/include/asm/ti-common/omap_wdt.h @@ -4,7 +4,7 @@ * * OMAP Watchdog header file * - * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ */ #ifndef __OMAP_WDT_H__ diff --git a/arch/arm/mach-davinci/config.mk b/arch/arm/mach-davinci/config.mk index 4674cae43b..edbac8e8e2 100644 --- a/arch/arm/mach-davinci/config.mk +++ b/arch/arm/mach-davinci/config.mk @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0+ # -# Copyright (C) 2012, Texas Instruments, Incorporated - http://www.ti.com/ +# Copyright (C) 2012, Texas Instruments, Incorporated - https://www.ti.com/ ifndef CONFIG_SPL_BUILD INPUTS-$(CONFIG_SPL_FRAMEWORK) += u-boot.ais endif diff --git a/arch/arm/mach-imx/spl_imx_romapi.c b/arch/arm/mach-imx/spl_imx_romapi.c index 9f0968cdf7..b9ff9bb83b 100644 --- a/arch/arm/mach-imx/spl_imx_romapi.c +++ b/arch/arm/mach-imx/spl_imx_romapi.c @@ -154,7 +154,7 @@ static ulong spl_romapi_read_stream(struct spl_load_info *load, ulong sector, return 0; } - ss->end = end; + ss->end += bytes; } memcpy(buf, (void *)(sector), count); @@ -277,7 +277,7 @@ static int spl_romapi_load_image_stream(struct spl_image_info *spl_image, ret = rom_api_download_image(p, 0, pg); if (ret != ROM_API_OKAY) { - puts("Steam(USB) download failure\n"); + puts("Stream(USB) download failure\n"); return -1; } @@ -297,7 +297,7 @@ static int spl_romapi_load_image_stream(struct spl_image_info *spl_image, ret = rom_api_download_image(p, 0, pg); if (ret != ROM_API_OKAY) { - puts("Steam(USB) download failure\n"); + puts("Stream(USB) download failure\n"); return -1; } diff --git a/arch/arm/mach-k3/Makefile b/arch/arm/mach-k3/Makefile index fd77b8bbba..c7ca0fdce5 100644 --- a/arch/arm/mach-k3/Makefile +++ b/arch/arm/mach-k3/Makefile @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0+ # -# Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/ +# Copyright (C) 2017-2018 Texas Instruments Incorporated - https://www.ti.com/ # Lokesh Vutla <lokeshvutla@ti.com> obj-$(CONFIG_SOC_K3_J721E) += j721e/ j7200/ diff --git a/arch/arm/mach-k3/am654_init.c b/arch/arm/mach-k3/am654_init.c index 2c5d633452..4235296774 100644 --- a/arch/arm/mach-k3/am654_init.c +++ b/arch/arm/mach-k3/am654_init.c @@ -2,7 +2,7 @@ /* * AM6: SoC specific initialization * - * Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2017-2018 Texas Instruments Incorporated - https://www.ti.com/ * Lokesh Vutla <lokeshvutla@ti.com> */ diff --git a/arch/arm/mach-k3/cache.S b/arch/arm/mach-k3/cache.S index a5717ea203..17cfb12f10 100644 --- a/arch/arm/mach-k3/cache.S +++ b/arch/arm/mach-k3/cache.S @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* - * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/ * Andrew F. Davis <afd@ti.com> */ diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c index eff2fff3c7..4c7b03fe6e 100644 --- a/arch/arm/mach-k3/common.c +++ b/arch/arm/mach-k3/common.c @@ -2,7 +2,7 @@ /* * K3: Common Architecture initialization * - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ * Lokesh Vutla <lokeshvutla@ti.com> */ diff --git a/arch/arm/mach-k3/common.h b/arch/arm/mach-k3/common.h index eabb44f620..04f3c0b85b 100644 --- a/arch/arm/mach-k3/common.h +++ b/arch/arm/mach-k3/common.h @@ -2,7 +2,7 @@ /* * K3: Architecture common definitions * - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ * Lokesh Vutla <lokeshvutla@ti.com> */ diff --git a/arch/arm/mach-k3/include/mach/am6_hardware.h b/arch/arm/mach-k3/include/mach/am6_hardware.h index 029041f415..9913964c46 100644 --- a/arch/arm/mach-k3/include/mach/am6_hardware.h +++ b/arch/arm/mach-k3/include/mach/am6_hardware.h @@ -2,7 +2,7 @@ /* * K3: AM6 SoC definitions, structures etc. * - * (C) Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * (C) Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ */ #ifndef __ASM_ARCH_AM6_HARDWARE_H #define __ASM_ARCH_AM6_HARDWARE_H diff --git a/arch/arm/mach-k3/include/mach/am6_spl.h b/arch/arm/mach-k3/include/mach/am6_spl.h index 61e0380927..4c6950ff2b 100644 --- a/arch/arm/mach-k3/include/mach/am6_spl.h +++ b/arch/arm/mach-k3/include/mach/am6_spl.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ * Lokesh Vutla <lokeshvutla@ti.com> */ #ifndef _ASM_ARCH_AM6_SPL_H_ diff --git a/arch/arm/mach-k3/include/mach/clock.h b/arch/arm/mach-k3/include/mach/clock.h index e3adbcd9de..32368ce0ed 100644 --- a/arch/arm/mach-k3/include/mach/clock.h +++ b/arch/arm/mach-k3/include/mach/clock.h @@ -2,7 +2,7 @@ /* * K3: Common SoC clock definitions. * - * (C) Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * (C) Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ */ #ifndef __ASM_ARCH_CLOCK_H #define __ASM_ARCH_CLOCK_H diff --git a/arch/arm/mach-k3/include/mach/hardware.h b/arch/arm/mach-k3/include/mach/hardware.h index 65742c4b7c..a1a9dfbde6 100644 --- a/arch/arm/mach-k3/include/mach/hardware.h +++ b/arch/arm/mach-k3/include/mach/hardware.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ * Lokesh Vutla <lokeshvutla@ti.com> */ #ifndef _ASM_ARCH_HARDWARE_H_ diff --git a/arch/arm/mach-k3/include/mach/j721e_hardware.h b/arch/arm/mach-k3/include/mach/j721e_hardware.h index 376db389ba..780341124a 100644 --- a/arch/arm/mach-k3/include/mach/j721e_hardware.h +++ b/arch/arm/mach-k3/include/mach/j721e_hardware.h @@ -2,7 +2,7 @@ /* * K3: J721E SoC definitions, structures etc. * - * (C) Copyright (C) 2018-2019 Texas Instruments Incorporated - http://www.ti.com/ + * (C) Copyright (C) 2018-2019 Texas Instruments Incorporated - https://www.ti.com/ */ #ifndef __ASM_ARCH_J721E_HARDWARE_H #define __ASM_ARCH_J721E_HARDWARE_H diff --git a/arch/arm/mach-k3/include/mach/j721e_spl.h b/arch/arm/mach-k3/include/mach/j721e_spl.h index e8947917a6..ed3d7333bd 100644 --- a/arch/arm/mach-k3/include/mach/j721e_spl.h +++ b/arch/arm/mach-k3/include/mach/j721e_spl.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright (C) 2018-2019 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018-2019 Texas Instruments Incorporated - https://www.ti.com/ * Lokesh Vutla <lokeshvutla@ti.com> */ #ifndef _ASM_ARCH_J721E_SPL_H_ diff --git a/arch/arm/mach-k3/include/mach/j721s2_hardware.h b/arch/arm/mach-k3/include/mach/j721s2_hardware.h index 7948bcf478..ad4fcdd4a9 100644 --- a/arch/arm/mach-k3/include/mach/j721s2_hardware.h +++ b/arch/arm/mach-k3/include/mach/j721s2_hardware.h @@ -2,7 +2,7 @@ /* * K3: J721S2 SoC definitions, structures etc. * - * (C) Copyright (C) 2021 Texas Instruments Incorporated - http://www.ti.com/ + * (C) Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/ */ #ifndef __ASM_ARCH_J721S2_HARDWARE_H #define __ASM_ARCH_J721S2_HARDWARE_H diff --git a/arch/arm/mach-k3/include/mach/j721s2_spl.h b/arch/arm/mach-k3/include/mach/j721s2_spl.h index 94b6c1337f..d8fae2c8b4 100644 --- a/arch/arm/mach-k3/include/mach/j721s2_spl.h +++ b/arch/arm/mach-k3/include/mach/j721s2_spl.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright (C) 2021 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/ * David Huang <d-huang@ti.com> */ #ifndef _ASM_ARCH_J721S2_SPL_H_ diff --git a/arch/arm/mach-k3/include/mach/spl.h b/arch/arm/mach-k3/include/mach/spl.h index 356cd89210..3ddc7eb6b6 100644 --- a/arch/arm/mach-k3/include/mach/spl.h +++ b/arch/arm/mach-k3/include/mach/spl.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ * Lokesh Vutla <lokeshvutla@ti.com> */ #ifndef _ASM_ARCH_SPL_H_ diff --git a/arch/arm/mach-k3/j7200/Makefile b/arch/arm/mach-k3/j7200/Makefile index ff9abd78ea..0f91cf4dae 100644 --- a/arch/arm/mach-k3/j7200/Makefile +++ b/arch/arm/mach-k3/j7200/Makefile @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-2.0+ # -# Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/ +# Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/ obj-y += clk-data.o obj-y += dev-data.o diff --git a/arch/arm/mach-k3/j721e/Makefile b/arch/arm/mach-k3/j721e/Makefile index ff9abd78ea..0f91cf4dae 100644 --- a/arch/arm/mach-k3/j721e/Makefile +++ b/arch/arm/mach-k3/j721e/Makefile @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-2.0+ # -# Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/ +# Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/ obj-y += clk-data.o obj-y += dev-data.o diff --git a/arch/arm/mach-k3/j721e_init.c b/arch/arm/mach-k3/j721e_init.c index 099301d61a..b4398c8e0b 100644 --- a/arch/arm/mach-k3/j721e_init.c +++ b/arch/arm/mach-k3/j721e_init.c @@ -2,7 +2,7 @@ /* * J721E: SoC specific initialization * - * Copyright (C) 2018-2019 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018-2019 Texas Instruments Incorporated - https://www.ti.com/ * Lokesh Vutla <lokeshvutla@ti.com> */ diff --git a/arch/arm/mach-k3/j721s2/Makefile b/arch/arm/mach-k3/j721s2/Makefile index 7bcd4901cd..e794bffb3a 100644 --- a/arch/arm/mach-k3/j721s2/Makefile +++ b/arch/arm/mach-k3/j721s2/Makefile @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-2.0+ # -# Copyright (C) 2021 Texas Instruments Incorporated - http://www.ti.com/ +# Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/ obj-y += clk-data.o obj-y += dev-data.o diff --git a/arch/arm/mach-k3/j721s2_init.c b/arch/arm/mach-k3/j721s2_init.c index 7d44810090..39499be271 100644 --- a/arch/arm/mach-k3/j721s2_init.c +++ b/arch/arm/mach-k3/j721s2_init.c @@ -2,7 +2,7 @@ /* * J721E: SoC specific initialization * - * Copyright (C) 2021 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/ * David Huang <d-huang@ti.com> */ diff --git a/arch/arm/mach-k3/lowlevel_init.S b/arch/arm/mach-k3/lowlevel_init.S index 70c5d1cade..463ab0de1b 100644 --- a/arch/arm/mach-k3/lowlevel_init.S +++ b/arch/arm/mach-k3/lowlevel_init.S @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ * Lokesh Vutla <lokeshvutla@ti.com> */ diff --git a/arch/arm/mach-k3/r5_mpu.c b/arch/arm/mach-k3/r5_mpu.c index 6786e7e1e5..2de5d28aeb 100644 --- a/arch/arm/mach-k3/r5_mpu.c +++ b/arch/arm/mach-k3/r5_mpu.c @@ -2,7 +2,7 @@ /* * K3: R5 MPU region definitions * - * Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2017-2018 Texas Instruments Incorporated - https://www.ti.com/ * Lokesh Vutla <lokeshvutla@ti.com> */ diff --git a/arch/arm/mach-k3/security.c b/arch/arm/mach-k3/security.c index 3b7c26c612..22697a263a 100644 --- a/arch/arm/mach-k3/security.c +++ b/arch/arm/mach-k3/security.c @@ -2,7 +2,7 @@ /* * K3: Security functions * - * Copyright (C) 2018-2022 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018-2022 Texas Instruments Incorporated - https://www.ti.com/ * Andrew F. Davis <afd@ti.com> */ diff --git a/arch/arm/mach-k3/sysfw-loader.c b/arch/arm/mach-k3/sysfw-loader.c index aa401ae3a0..49a82c7edc 100644 --- a/arch/arm/mach-k3/sysfw-loader.c +++ b/arch/arm/mach-k3/sysfw-loader.c @@ -2,7 +2,7 @@ /* * K3: System Firmware Loader * - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/ * Andreas Dannenberg <dannenberg@ti.com> */ diff --git a/arch/arm/mach-k3/sysfw-loader.h b/arch/arm/mach-k3/sysfw-loader.h index b23a9e821e..e48c834227 100644 --- a/arch/arm/mach-k3/sysfw-loader.h +++ b/arch/arm/mach-k3/sysfw-loader.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/ * Andreas Dannenberg <dannenberg@ti.com> */ diff --git a/arch/arm/mach-keystone/mon.c b/arch/arm/mach-keystone/mon.c index b863bab196..e91b0d68f4 100644 --- a/arch/arm/mach-keystone/mon.c +++ b/arch/arm/mach-keystone/mon.c @@ -2,7 +2,7 @@ /* * K2x: Secure commands file * - * Copyright (C) 2012-2019 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2012-2019 Texas Instruments Incorporated - https://www.ti.com/ */ #include <hang.h> diff --git a/arch/arm/mach-omap2/am33xx/Makefile b/arch/arm/mach-omap2/am33xx/Makefile index 2aa8013527..3f1af7f163 100644 --- a/arch/arm/mach-omap2/am33xx/Makefile +++ b/arch/arm/mach-omap2/am33xx/Makefile @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0+ # -# Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ +# Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ obj-$(CONFIG_AM33XX) += clock_am33xx.o obj-$(CONFIG_AM43XX) += clock_am43xx.o diff --git a/arch/arm/mach-omap2/am33xx/board.c b/arch/arm/mach-omap2/am33xx/board.c index 06b4129773..09659da586 100644 --- a/arch/arm/mach-omap2/am33xx/board.c +++ b/arch/arm/mach-omap2/am33xx/board.c @@ -4,7 +4,7 @@ * * Common board functions for AM33XX based boards * - * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ */ #include <common.h> diff --git a/arch/arm/mach-omap2/am33xx/chilisom.c b/arch/arm/mach-omap2/am33xx/chilisom.c index 459bac13e0..d4f2abe17a 100644 --- a/arch/arm/mach-omap2/am33xx/chilisom.c +++ b/arch/arm/mach-omap2/am33xx/chilisom.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ * Copyright (C) 2017, Grinn - http://grinn-global.com/ */ diff --git a/arch/arm/mach-omap2/am33xx/clk_synthesizer.c b/arch/arm/mach-omap2/am33xx/clk_synthesizer.c index c9b9502aef..0969a404bf 100644 --- a/arch/arm/mach-omap2/am33xx/clk_synthesizer.c +++ b/arch/arm/mach-omap2/am33xx/clk_synthesizer.c @@ -4,7 +4,7 @@ * * Clock synthesizer apis * - * Copyright (C) 2016, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2016, Texas Instruments, Incorporated - https://www.ti.com/ */ diff --git a/arch/arm/mach-omap2/am33xx/clock.c b/arch/arm/mach-omap2/am33xx/clock.c index 130ee6c6e3..3273632c64 100644 --- a/arch/arm/mach-omap2/am33xx/clock.c +++ b/arch/arm/mach-omap2/am33xx/clock.c @@ -5,7 +5,7 @@ * Clock initialization for AM33XX boards. * Derived from OMAP4 boards * - * Copyright (C) 2013, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2013, Texas Instruments, Incorporated - https://www.ti.com/ */ #include <common.h> #include <hang.h> diff --git a/arch/arm/mach-omap2/am33xx/clock_am33xx.c b/arch/arm/mach-omap2/am33xx/clock_am33xx.c index cd3b34bf56..d39e7e4fed 100644 --- a/arch/arm/mach-omap2/am33xx/clock_am33xx.c +++ b/arch/arm/mach-omap2/am33xx/clock_am33xx.c @@ -4,7 +4,7 @@ * * clocks for AM33XX based boards * - * Copyright (C) 2013, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2013, Texas Instruments, Incorporated - https://www.ti.com/ */ #include <common.h> diff --git a/arch/arm/mach-omap2/am33xx/clock_am43xx.c b/arch/arm/mach-omap2/am33xx/clock_am43xx.c index b98bb9989c..8039bc2fe7 100644 --- a/arch/arm/mach-omap2/am33xx/clock_am43xx.c +++ b/arch/arm/mach-omap2/am33xx/clock_am43xx.c @@ -5,7 +5,7 @@ * clocks for AM43XX based boards * Derived from AM33XX based boards * - * Copyright (C) 2013, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2013, Texas Instruments, Incorporated - https://www.ti.com/ */ #include <common.h> diff --git a/arch/arm/mach-omap2/am33xx/ddr.c b/arch/arm/mach-omap2/am33xx/ddr.c index 5f970d93f0..61b95c9373 100644 --- a/arch/arm/mach-omap2/am33xx/ddr.c +++ b/arch/arm/mach-omap2/am33xx/ddr.c @@ -2,7 +2,7 @@ /* * DDR Configuration for AM33xx devices. * - * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ */ #include <common.h> diff --git a/arch/arm/mach-omap2/am33xx/emif4.c b/arch/arm/mach-omap2/am33xx/emif4.c index bf3da43ed9..b29250b8d2 100644 --- a/arch/arm/mach-omap2/am33xx/emif4.c +++ b/arch/arm/mach-omap2/am33xx/emif4.c @@ -4,7 +4,7 @@ * * AM33XX emif4 configuration file * - * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ */ #include <common.h> diff --git a/arch/arm/mach-omap2/am33xx/mux.c b/arch/arm/mach-omap2/am33xx/mux.c index aad3ec8556..4960559397 100644 --- a/arch/arm/mach-omap2/am33xx/mux.c +++ b/arch/arm/mach-omap2/am33xx/mux.c @@ -1,7 +1,7 @@ /* * mux.c * - * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as diff --git a/arch/arm/mach-omap2/am33xx/sys_info.c b/arch/arm/mach-omap2/am33xx/sys_info.c index 338f6afcae..390d540e85 100644 --- a/arch/arm/mach-omap2/am33xx/sys_info.c +++ b/arch/arm/mach-omap2/am33xx/sys_info.c @@ -4,7 +4,7 @@ * * System information functions * - * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ * * Derived from Beagle Board and 3430 SDP code by * Richard Woodruff <r-woodruff2@ti.com> diff --git a/arch/arm/mach-omap2/boot-common.c b/arch/arm/mach-omap2/boot-common.c index 5e4d29910c..57917da25c 100644 --- a/arch/arm/mach-omap2/boot-common.c +++ b/arch/arm/mach-omap2/boot-common.c @@ -4,7 +4,7 @@ * * Common bootmode functions for omap based boards * - * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ */ #include <common.h> diff --git a/arch/arm/mach-omap2/config.mk b/arch/arm/mach-omap2/config.mk index 4f0d2598fa..30d8fb1b1d 100644 --- a/arch/arm/mach-omap2/config.mk +++ b/arch/arm/mach-omap2/config.mk @@ -1,5 +1,5 @@ # -# Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ +# Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ # # SPDX-License-Identifier: GPL-2.0+ diff --git a/arch/arm/mach-omap2/config_secure.mk b/arch/arm/mach-omap2/config_secure.mk index f76262bb0c..40db1aec14 100644 --- a/arch/arm/mach-omap2/config_secure.mk +++ b/arch/arm/mach-omap2/config_secure.mk @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0+ # -# Copyright (C) 2016, Texas Instruments, Incorporated - http://www.ti.com/ +# Copyright (C) 2016, Texas Instruments, Incorporated - https://www.ti.com/ quiet_cmd_mkomapsecimg = SECURE $@ ifneq ($(TI_SECURE_DEV_PKG),) ifneq ($(wildcard $(TI_SECURE_DEV_PKG)/scripts/create-boot-image.sh),) diff --git a/arch/arm/mach-omap2/omap3/emif4.c b/arch/arm/mach-omap2/omap3/emif4.c index 491e7c23db..7e5a281922 100644 --- a/arch/arm/mach-omap2/omap3/emif4.c +++ b/arch/arm/mach-omap2/omap3/emif4.c @@ -6,7 +6,7 @@ * Based on mem.c and sdrc.c * * Copyright (C) 2010 - * Texas Instruments Incorporated - http://www.ti.com/ + * Texas Instruments Incorporated - https://www.ti.com/ */ #include <common.h> diff --git a/arch/arm/mach-omap2/omap3/sdrc.c b/arch/arm/mach-omap2/omap3/sdrc.c index 07f534a60b..5d43e7c9cf 100644 --- a/arch/arm/mach-omap2/omap3/sdrc.c +++ b/arch/arm/mach-omap2/omap3/sdrc.c @@ -7,7 +7,7 @@ * generic init function (mem_init). * * Copyright (C) 2004-2010 - * Texas Instruments Incorporated - http://www.ti.com/ + * Texas Instruments Incorporated - https://www.ti.com/ * * Copyright (C) 2011 * Corscience GmbH & Co. KG - Simon Schwarz <schwarz@corscience.de> diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c index b7f79800de..054782efbd 100644 --- a/arch/arm/mach-omap2/vc.c +++ b/arch/arm/mach-omap2/vc.c @@ -1,7 +1,7 @@ /* * Voltage Controller implementation for OMAP * - * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ * Nishanth Menon * * This program is free software; you can redistribute it and/or modify diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index a6c69c300d..b577a911e7 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -359,6 +359,8 @@ config ROCKCHIP_RV1126 select BOARD_LATE_INIT imply ROCKCHIP_COMMON_BOARD imply OF_LIBFDT_OVERLAY + imply ROCKCHIP_OTP + imply MISC_INIT_R imply TPL_DM imply TPL_LIBCOMMON_SUPPORT imply TPL_LIBGENERIC_SUPPORT @@ -401,7 +403,7 @@ config SPL_ROCKCHIP_BACK_TO_BROM config TPL_ROCKCHIP_BACK_TO_BROM bool "TPL returns to bootrom" default y - select ROCKCHIP_BROM_HELPER + select ROCKCHIP_BROM_HELPER if !ROCKCHIP_RK3066 select TPL_BOOTROM_SUPPORT depends on TPL help diff --git a/arch/arm/mach-rockchip/rk3066/Kconfig b/arch/arm/mach-rockchip/rk3066/Kconfig index 95d7fc8a29..4a79a829ad 100644 --- a/arch/arm/mach-rockchip/rk3066/Kconfig +++ b/arch/arm/mach-rockchip/rk3066/Kconfig @@ -10,6 +10,14 @@ config TARGET_MK808 config ROCKCHIP_BOOT_MODE_REG default 0x20004040 +config ROCKCHIP_BOOT_LR_REG + hex + default 0x00001058 + +config ROCKCHIP_BOOT_RETURN_REG + hex + default 0x00001100 + config SYS_SOC default "rk3066" diff --git a/arch/arm/mach-rockchip/rk3588/Kconfig b/arch/arm/mach-rockchip/rk3588/Kconfig index 1ff6b7d2cd..e5282dd112 100644 --- a/arch/arm/mach-rockchip/rk3588/Kconfig +++ b/arch/arm/mach-rockchip/rk3588/Kconfig @@ -125,6 +125,13 @@ config TARGET_ROCK5B_RK3588 USB PD over USB Type-C Size: 100mm x 72mm (Pico-ITX form factor) +config TARGET_QUARTZPRO64_RK3588 + bool "Pine64 QuartzPro64 RK3588 board" + select BOARD_LATE_INIT + help + Pine64 QuartzPro64 is a Rockchip RK3588 based SBC (Single Board + Computer) by Pine64. + config ROCKCHIP_BOOT_MODE_REG default 0xfd588080 @@ -139,6 +146,7 @@ config SYS_MALLOC_F_LEN source board/edgeble/neural-compute-module-6/Kconfig source board/friendlyelec/nanopc-t6-rk3588/Kconfig +source board/pine64/quartzpro64-rk3588/Kconfig source board/rockchip/evb_rk3588/Kconfig source board/radxa/rock5a-rk3588s/Kconfig source board/radxa/rock5b-rk3588/Kconfig diff --git a/arch/arm/mach-stm32mp/include/mach/stm32.h b/arch/arm/mach-stm32mp/include/mach/stm32.h index b31e4a5d0d..46d469881b 100644 --- a/arch/arm/mach-stm32mp/include/mach/stm32.h +++ b/arch/arm/mach-stm32mp/include/mach/stm32.h @@ -46,10 +46,13 @@ enum boot_device { #define TAMP_BOOT_MODE_MASK GENMASK(15, 8) #define TAMP_BOOT_MODE_SHIFT 8 +#define TAMP_BOOT_AUTH_MASK GENMASK(23, 16) +#define TAMP_BOOT_AUTH_SHIFT 16 #define TAMP_BOOT_DEVICE_MASK GENMASK(7, 4) #define TAMP_BOOT_INSTANCE_MASK GENMASK(3, 0) +#define TAMP_BOOT_AUTH_ST_MASK GENMASK(7, 4) +#define TAMP_BOOT_PARTITION_MASK GENMASK(3, 0) #define TAMP_BOOT_FORCED_MASK GENMASK(7, 0) -#define TAMP_BOOT_DEBUG_ON BIT(16) enum forced_boot_mode { BOOT_NORMAL = 0x00, diff --git a/arch/arm/mach-stm32mp/include/mach/sys_proto.h b/arch/arm/mach-stm32mp/include/mach/sys_proto.h index 7b2df09a33..83388fdb73 100644 --- a/arch/arm/mach-stm32mp/include/mach/sys_proto.h +++ b/arch/arm/mach-stm32mp/include/mach/sys_proto.h @@ -92,6 +92,9 @@ void get_soc_name(char name[SOC_NAME_SIZE]); /* return boot mode */ u32 get_bootmode(void); +/* return auth status and partition */ +u32 get_bootauth(void); + int get_eth_nb(void); int setup_mac_address(void); diff --git a/arch/arm/mach-stm32mp/stm32mp1/cpu.c b/arch/arm/mach-stm32mp/stm32mp1/cpu.c index e07abbe21c..55574fd4be 100644 --- a/arch/arm/mach-stm32mp/stm32mp1/cpu.c +++ b/arch/arm/mach-stm32mp/stm32mp1/cpu.c @@ -40,6 +40,13 @@ u32 get_bootmode(void) TAMP_BOOT_MODE_SHIFT; } +u32 get_bootauth(void) +{ + /* read boot auth status and partition from TAMP backup register */ + return (readl(TAMP_BOOT_CONTEXT) & TAMP_BOOT_AUTH_MASK) >> + TAMP_BOOT_AUTH_SHIFT; +} + /* * weak function overidde: set the DDR/SYSRAM executable before to enable the * MMU and configure DACR, for early early_enable_caches (SPL or pre-reloc) @@ -91,10 +98,10 @@ static void early_enable_caches(void) if (CONFIG_IS_ENABLED(SYS_DCACHE_OFF)) return; - if (!(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF))) { +#if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF)) gd->arch.tlb_size = PGTABLE_SIZE; gd->arch.tlb_addr = (unsigned long)&early_tlb; - } +#endif /* enable MMU (default configuration) */ dcache_enable(); @@ -371,8 +378,24 @@ __weak void stm32mp_misc_init(void) { } +static int setup_boot_auth_info(void) +{ + char buf[10]; + u32 bootauth = get_bootauth(); + + snprintf(buf, sizeof(buf), "%d", bootauth >> 4); + env_set("boot_auth", buf); + + snprintf(buf, sizeof(buf), "%d", bootauth & + (u32)TAMP_BOOT_PARTITION_MASK); + env_set("boot_part", buf); + + return 0; +} + int arch_misc_init(void) { + setup_boot_auth_info(); setup_boot_mode(); setup_mac_address(); setup_serial_number(); diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig index a10e4c06b6..a4a8d8e944 100644 --- a/arch/arm/mach-sunxi/Kconfig +++ b/arch/arm/mach-sunxi/Kconfig @@ -85,6 +85,12 @@ config DRAM_SUN50I_H616_TPR2 help TPR2 value from vendor DRAM settings. +config DRAM_SUN50I_H616_TPR6 + hex "H616 DRAM TPR6 parameter" + default 0x3300c080 + help + TPR6 value from vendor DRAM settings. + config DRAM_SUN50I_H616_TPR10 hex "H616 DRAM TPR10 parameter" help @@ -462,6 +468,9 @@ config SUNXI_DRAM_DDR2 config SUNXI_DRAM_LPDDR3 bool +config SUNXI_DRAM_LPDDR4 + bool + choice prompt "DRAM Type and Timing" default SUNXI_DRAM_DDR3_1333 if !MACH_SUN8I_V3S @@ -505,6 +514,14 @@ config SUNXI_DRAM_H616_LPDDR3 This option is the LPDDR3 timing used by the stock boot0 by Allwinner. +config SUNXI_DRAM_H616_LPDDR4 + bool "LPDDR4 DRAM chips on the H616 DRAM controller" + select SUNXI_DRAM_LPDDR4 + depends on DRAM_SUN50I_H616 + help + This option is the LPDDR4 timing used by the stock boot0 by + Allwinner. + config SUNXI_DRAM_H616_DDR3_1333 bool "DDR3-1333 boot0 timings on the H616 DRAM controller" select SUNXI_DRAM_DDR3 diff --git a/arch/arm/mach-sunxi/dram_sun50i_h616.c b/arch/arm/mach-sunxi/dram_sun50i_h616.c index 7e580b62dc..c5c1331a4c 100644 --- a/arch/arm/mach-sunxi/dram_sun50i_h616.c +++ b/arch/arm/mach-sunxi/dram_sun50i_h616.c @@ -6,8 +6,8 @@ * unknown. That's why this driver has plenty of magic numbers. Some * meaning was nevertheless deduced from strings found in boot0 and * known meaning of some dram parameters. - * This driver only supports DDR3 memory and omits logic for all - * other supported types supported by hardware. + * This driver supports DDR3, LPDDR3 and LPDDR4 memory. There is no + * DDR4 support yet. * * (C) Copyright 2020 Jernej Skrabec <jernej.skrabec@siol.net> * @@ -238,64 +238,59 @@ static const u8 phy_init[] = { 0x08, 0x01, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x07, 0x17, 0x19, 0x1a +#elif defined(CONFIG_SUNXI_DRAM_H616_LPDDR4) + 0x02, 0x00, 0x17, 0x05, 0x04, 0x19, 0x06, 0x07, + 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, + 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x01, + 0x18, 0x03, 0x1a #endif }; +#define MASK_BYTE(reg, nr) (((reg) >> ((nr) * 8)) & 0x1f) static void mctl_phy_configure_odt(const struct dram_para *para) { - unsigned int val; + uint32_t val_lo, val_hi; - val = para->dx_dri & 0x1f; - writel_relaxed(val, SUNXI_DRAM_PHY0_BASE + 0x388); - writel_relaxed(val, SUNXI_DRAM_PHY0_BASE + 0x38c); - - val = (para->dx_dri >> 8) & 0x1f; - writel_relaxed(val, SUNXI_DRAM_PHY0_BASE + 0x3c8); - writel_relaxed(val, SUNXI_DRAM_PHY0_BASE + 0x3cc); - - val = (para->dx_dri >> 16) & 0x1f; - writel_relaxed(val, SUNXI_DRAM_PHY0_BASE + 0x408); - writel_relaxed(val, SUNXI_DRAM_PHY0_BASE + 0x40c); - - val = (para->dx_dri >> 24) & 0x1f; - writel_relaxed(val, SUNXI_DRAM_PHY0_BASE + 0x448); - writel_relaxed(val, SUNXI_DRAM_PHY0_BASE + 0x44c); - - val = para->ca_dri & 0x1f; - writel_relaxed(val, SUNXI_DRAM_PHY0_BASE + 0x340); - writel_relaxed(val, SUNXI_DRAM_PHY0_BASE + 0x344); - - val = (para->ca_dri >> 8) & 0x1f; - writel_relaxed(val, SUNXI_DRAM_PHY0_BASE + 0x348); - writel_relaxed(val, SUNXI_DRAM_PHY0_BASE + 0x34c); - - val = para->dx_odt & 0x1f; - if (para->type == SUNXI_DRAM_TYPE_LPDDR3) - writel_relaxed(0, SUNXI_DRAM_PHY0_BASE + 0x380); - else - writel_relaxed(val, SUNXI_DRAM_PHY0_BASE + 0x380); - writel_relaxed(val, SUNXI_DRAM_PHY0_BASE + 0x384); - - val = (para->dx_odt >> 8) & 0x1f; - if (para->type == SUNXI_DRAM_TYPE_LPDDR3) - writel_relaxed(0, SUNXI_DRAM_PHY0_BASE + 0x3c0); - else - writel_relaxed(val, SUNXI_DRAM_PHY0_BASE + 0x3c0); - writel_relaxed(val, SUNXI_DRAM_PHY0_BASE + 0x3c4); - - val = (para->dx_odt >> 16) & 0x1f; - if (para->type == SUNXI_DRAM_TYPE_LPDDR3) - writel_relaxed(0, SUNXI_DRAM_PHY0_BASE + 0x400); - else - writel_relaxed(val, SUNXI_DRAM_PHY0_BASE + 0x400); - writel_relaxed(val, SUNXI_DRAM_PHY0_BASE + 0x404); + /* + * This part should be applicable to all memory types, but is + * usually found in LPDDR4 bootloaders. Therefore, we will leave + * only for this type of memory. + */ + if (para->type == SUNXI_DRAM_TYPE_LPDDR4) { + clrsetbits_le32(SUNXI_DRAM_PHY0_BASE + 0x390, BIT(5), BIT(4)); + clrsetbits_le32(SUNXI_DRAM_PHY0_BASE + 0x3d0, BIT(5), BIT(4)); + clrsetbits_le32(SUNXI_DRAM_PHY0_BASE + 0x410, BIT(5), BIT(4)); + clrsetbits_le32(SUNXI_DRAM_PHY0_BASE + 0x450, BIT(5), BIT(4)); + } - val = (para->dx_odt >> 24) & 0x1f; - if (para->type == SUNXI_DRAM_TYPE_LPDDR3) - writel_relaxed(0, SUNXI_DRAM_PHY0_BASE + 0x440); - else - writel_relaxed(val, SUNXI_DRAM_PHY0_BASE + 0x440); - writel_relaxed(val, SUNXI_DRAM_PHY0_BASE + 0x444); + val_lo = para->dx_dri; + val_hi = (para->type == SUNXI_DRAM_TYPE_LPDDR4) ? 0x04040404 : para->dx_dri; + writel_relaxed(MASK_BYTE(val_lo, 0), SUNXI_DRAM_PHY0_BASE + 0x388); + writel_relaxed(MASK_BYTE(val_hi, 0), SUNXI_DRAM_PHY0_BASE + 0x38c); + writel_relaxed(MASK_BYTE(val_lo, 1), SUNXI_DRAM_PHY0_BASE + 0x3c8); + writel_relaxed(MASK_BYTE(val_hi, 1), SUNXI_DRAM_PHY0_BASE + 0x3cc); + writel_relaxed(MASK_BYTE(val_lo, 2), SUNXI_DRAM_PHY0_BASE + 0x408); + writel_relaxed(MASK_BYTE(val_hi, 2), SUNXI_DRAM_PHY0_BASE + 0x40c); + writel_relaxed(MASK_BYTE(val_lo, 3), SUNXI_DRAM_PHY0_BASE + 0x448); + writel_relaxed(MASK_BYTE(val_hi, 3), SUNXI_DRAM_PHY0_BASE + 0x44c); + + val_lo = para->ca_dri; + val_hi = para->ca_dri; + writel_relaxed(MASK_BYTE(val_lo, 0), SUNXI_DRAM_PHY0_BASE + 0x340); + writel_relaxed(MASK_BYTE(val_hi, 0), SUNXI_DRAM_PHY0_BASE + 0x344); + writel_relaxed(MASK_BYTE(val_lo, 1), SUNXI_DRAM_PHY0_BASE + 0x348); + writel_relaxed(MASK_BYTE(val_hi, 1), SUNXI_DRAM_PHY0_BASE + 0x34c); + + val_lo = (para->type == SUNXI_DRAM_TYPE_LPDDR3) ? 0 : para->dx_odt; + val_hi = (para->type == SUNXI_DRAM_TYPE_LPDDR4) ? 0 : para->dx_odt; + writel_relaxed(MASK_BYTE(val_lo, 0), SUNXI_DRAM_PHY0_BASE + 0x380); + writel_relaxed(MASK_BYTE(val_hi, 0), SUNXI_DRAM_PHY0_BASE + 0x384); + writel_relaxed(MASK_BYTE(val_lo, 1), SUNXI_DRAM_PHY0_BASE + 0x3c0); + writel_relaxed(MASK_BYTE(val_hi, 1), SUNXI_DRAM_PHY0_BASE + 0x3c4); + writel_relaxed(MASK_BYTE(val_lo, 2), SUNXI_DRAM_PHY0_BASE + 0x400); + writel_relaxed(MASK_BYTE(val_hi, 2), SUNXI_DRAM_PHY0_BASE + 0x404); + writel_relaxed(MASK_BYTE(val_lo, 3), SUNXI_DRAM_PHY0_BASE + 0x440); + writel_relaxed(MASK_BYTE(val_hi, 3), SUNXI_DRAM_PHY0_BASE + 0x444); dmb(); } @@ -414,12 +409,18 @@ static bool mctl_phy_read_calibration(const struct dram_config *config) return result; } -static bool mctl_phy_read_training(const struct dram_config *config) +static bool mctl_phy_read_training(const struct dram_para *para, + const struct dram_config *config) { u32 val1, val2, *ptr1, *ptr2; bool result = true; int i; + if (para->type == SUNXI_DRAM_TYPE_LPDDR4) { + writel(0, SUNXI_DRAM_PHY0_BASE + 0x800); + writel(0, SUNXI_DRAM_PHY0_BASE + 0x81c); + } + clrsetbits_le32(SUNXI_DRAM_PHY0_BASE + 0x198, 3, 2); clrsetbits_le32(SUNXI_DRAM_PHY0_BASE + 0x804, 0x3f, 0xf); clrsetbits_le32(SUNXI_DRAM_PHY0_BASE + 0x808, 0x3f, 0xf); @@ -600,6 +601,8 @@ static void mctl_phy_bit_delay_compensation(const struct dram_para *para) clrbits_le32(SUNXI_DRAM_PHY0_BASE + 0x60, 1); setbits_le32(SUNXI_DRAM_PHY0_BASE + 8, 8); clrbits_le32(SUNXI_DRAM_PHY0_BASE + 0x190, 0x10); + if (para->type == SUNXI_DRAM_TYPE_LPDDR4) + clrbits_le32(SUNXI_DRAM_PHY0_BASE + 0x4, 0x80); if (para->tpr10 & BIT(30)) val = para->tpr11 & 0x3f; @@ -813,8 +816,9 @@ static void mctl_phy_ca_bit_delay_compensation(const struct dram_para *para, writel(val, SUNXI_DRAM_PHY0_BASE + 0x7e0); writel(val, SUNXI_DRAM_PHY0_BASE + 0x7f4); - if (para->type == SUNXI_DRAM_TYPE_DDR3) { - val = (para->tpr10 >> 7) & 0x1e; + val = (para->tpr10 >> 7) & 0x1e; + switch (para->type) { + case SUNXI_DRAM_TYPE_DDR3: if (para->tpr2 & 1) { writel(val, SUNXI_DRAM_PHY0_BASE + 0x794); if (config->ranks == 2) { @@ -840,8 +844,8 @@ static void mctl_phy_ca_bit_delay_compensation(const struct dram_para *para, writel(val, SUNXI_DRAM_PHY0_BASE + 0x7b8); } } - } else if (para->type == SUNXI_DRAM_TYPE_LPDDR3) { - val = (para->tpr10 >> 7) & 0x1e; + break; + case SUNXI_DRAM_TYPE_LPDDR3: if (para->tpr2 & 1) { writel(val, SUNXI_DRAM_PHY0_BASE + 0x7a0); if (config->ranks == 2) { @@ -855,7 +859,18 @@ static void mctl_phy_ca_bit_delay_compensation(const struct dram_para *para, writel(val, SUNXI_DRAM_PHY0_BASE + 0x7f8); } } - } + break; + case SUNXI_DRAM_TYPE_LPDDR4: + if (para->tpr2 & 1) { + writel(val, SUNXI_DRAM_PHY0_BASE + 0x788); + } else { + writel(val, SUNXI_DRAM_PHY0_BASE + 0x794); + }; + break; + case SUNXI_DRAM_TYPE_DDR4: + default: + panic("This DRAM setup is currently not supported.\n"); + }; } static bool mctl_phy_init(const struct dram_para *para, @@ -868,30 +883,42 @@ static bool mctl_phy_init(const struct dram_para *para, u32 val, val2, *ptr, mr0, mr2; int i; + if (para->type == SUNXI_DRAM_TYPE_LPDDR4) + clrbits_le32(SUNXI_DRAM_PHY0_BASE + 0x4,0x80); + if (config->bus_full_width) val = 0xf; else val = 3; clrsetbits_le32(SUNXI_DRAM_PHY0_BASE + 0x3c, 0xf, val); - if (para->tpr2 & 0x100) { - if (para->type == SUNXI_DRAM_TYPE_DDR3) { + switch (para->type) { + case SUNXI_DRAM_TYPE_DDR3: + if (para->tpr2 & 0x100) { val = 9; val2 = 7; - } else if (para->type == SUNXI_DRAM_TYPE_LPDDR3) { - // untested setup: use some values for now - val = 14; - val2 = 8; - } - } else { - if (para->type == SUNXI_DRAM_TYPE_DDR3) { + } else { val = 13; val2 = 9; - } else if (para->type == SUNXI_DRAM_TYPE_LPDDR3) { + } + break; + case SUNXI_DRAM_TYPE_LPDDR3: + if (para->tpr2 & 0x100) { + val = 12; + val2 = 6; + } else { val = 14; val2 = 8; } - } + break; + case SUNXI_DRAM_TYPE_LPDDR4: + val = 20; + val2 = 10; + break; + case SUNXI_DRAM_TYPE_DDR4: + default: + panic("This DRAM setup is currently not supported.\n"); + }; writel(val, SUNXI_DRAM_PHY0_BASE + 0x14); writel(val, SUNXI_DRAM_PHY0_BASE + 0x35c); @@ -915,19 +942,40 @@ static bool mctl_phy_init(const struct dram_para *para, if (para->tpr10 & TPR10_CA_BIT_DELAY) mctl_phy_ca_bit_delay_compensation(para, config); - if (para->type == SUNXI_DRAM_TYPE_DDR3) - val = 0x80; - else if (para->type == SUNXI_DRAM_TYPE_LPDDR3) - val = 0xc0; + switch (para->type) { + case SUNXI_DRAM_TYPE_DDR3: + val = para->tpr6 & 0xff; + break; + case SUNXI_DRAM_TYPE_LPDDR3: + val = para->tpr6 >> 8 & 0xff; + break; + case SUNXI_DRAM_TYPE_LPDDR4: + val = para->tpr6 >> 24 & 0xff; + break; + case SUNXI_DRAM_TYPE_DDR4: + default: + panic("This DRAM setup is currently not supported.\n"); + }; + writel(val, SUNXI_DRAM_PHY0_BASE + 0x3dc); writel(val, SUNXI_DRAM_PHY0_BASE + 0x45c); mctl_phy_configure_odt(para); - if (para->type == SUNXI_DRAM_TYPE_DDR3) + switch (para->type) { + case SUNXI_DRAM_TYPE_DDR3: val = 0x0a; - else if (para->type == SUNXI_DRAM_TYPE_LPDDR3) + break; + case SUNXI_DRAM_TYPE_LPDDR3: val = 0x0b; + break; + case SUNXI_DRAM_TYPE_LPDDR4: + val = 0x0d; + break; + case SUNXI_DRAM_TYPE_DDR4: + default: + panic("This DRAM setup is currently not supported.\n"); + }; clrsetbits_le32(SUNXI_DRAM_PHY0_BASE + 4, 0x7, val); if (para->clk <= 672) @@ -977,8 +1025,8 @@ static bool mctl_phy_init(const struct dram_para *para, mr0 = 0x1f14; mr2 = 0x20; } - - if (para->type == SUNXI_DRAM_TYPE_DDR3) { + switch (para->type) { + case SUNXI_DRAM_TYPE_DDR3: writel(mr0, &mctl_ctl->mrctrl1); writel(0x80000030, &mctl_ctl->mrctrl0); mctl_await_completion(&mctl_ctl->mrctrl0, BIT(31), 0); @@ -994,7 +1042,8 @@ static bool mctl_phy_init(const struct dram_para *para, writel(0, &mctl_ctl->mrctrl1); writel(0x80003030, &mctl_ctl->mrctrl0); mctl_await_completion(&mctl_ctl->mrctrl0, BIT(31), 0); - } else if (para->type == SUNXI_DRAM_TYPE_LPDDR3) { + break; + case SUNXI_DRAM_TYPE_LPDDR3: writel(mr0, &mctl_ctl->mrctrl1); writel(0x800000f0, &mctl_ctl->mrctrl0); mctl_await_completion(&mctl_ctl->mrctrl0, BIT(31), 0); @@ -1010,7 +1059,48 @@ static bool mctl_phy_init(const struct dram_para *para, writel(0x301, &mctl_ctl->mrctrl1); writel(0x800000f0, &mctl_ctl->mrctrl0); mctl_await_completion(&mctl_ctl->mrctrl0, BIT(31), 0); - } + break; + case SUNXI_DRAM_TYPE_LPDDR4: + writel(0x0, &mctl_ctl->mrctrl1); + writel(0x80000030, &mctl_ctl->mrctrl0); + mctl_await_completion(&mctl_ctl->mrctrl0, BIT(31), 0); + + writel(0x134, &mctl_ctl->mrctrl1); + writel(0x80000030, &mctl_ctl->mrctrl0); + mctl_await_completion(&mctl_ctl->mrctrl0, BIT(31), 0); + + writel(0x21b, &mctl_ctl->mrctrl1); + writel(0x80000030, &mctl_ctl->mrctrl0); + mctl_await_completion(&mctl_ctl->mrctrl0, BIT(31), 0); + + writel(0x333, &mctl_ctl->mrctrl1); + writel(0x80000030, &mctl_ctl->mrctrl0); + mctl_await_completion(&mctl_ctl->mrctrl0, BIT(31), 0); + + writel(0x403, &mctl_ctl->mrctrl1); + writel(0x80000030, &mctl_ctl->mrctrl0); + mctl_await_completion(&mctl_ctl->mrctrl0, BIT(31), 0); + + writel(0xb04, &mctl_ctl->mrctrl1); + writel(0x80000030, &mctl_ctl->mrctrl0); + mctl_await_completion(&mctl_ctl->mrctrl0, BIT(31), 0); + + writel(0xc72, &mctl_ctl->mrctrl1); + writel(0x80000030, &mctl_ctl->mrctrl0); + mctl_await_completion(&mctl_ctl->mrctrl0, BIT(31), 0); + + writel(0xe09, &mctl_ctl->mrctrl1); + writel(0x80000030, &mctl_ctl->mrctrl0); + mctl_await_completion(&mctl_ctl->mrctrl0, BIT(31), 0); + + writel(0x1624, &mctl_ctl->mrctrl1); + writel(0x80000030, &mctl_ctl->mrctrl0); + mctl_await_completion(&mctl_ctl->mrctrl0, BIT(31), 0); + break; + case SUNXI_DRAM_TYPE_DDR4: + default: + panic("This DRAM setup is currently not supported.\n"); + }; writel(0, SUNXI_DRAM_PHY0_BASE + 0x54); @@ -1040,7 +1130,7 @@ static bool mctl_phy_init(const struct dram_para *para, if (para->tpr10 & TPR10_READ_TRAINING) { for (i = 0; i < 5; i++) - if (mctl_phy_read_training(config)) + if (mctl_phy_read_training(para, config)) break; if (i == 5) { debug("read training failed!\n"); @@ -1079,17 +1169,29 @@ static bool mctl_ctrl_init(const struct dram_para *para, setbits_le32(&mctl_com->unk_0x008, 0xff00); + if (para->type == SUNXI_DRAM_TYPE_LPDDR4) + writel(1, SUNXI_DRAM_COM_BASE + 0x50); clrsetbits_le32(&mctl_ctl->sched[0], 0xff00, 0x3000); writel(0, &mctl_ctl->hwlpctl); setbits_le32(&mctl_com->unk_0x008, 0xff00); - reg_val = MSTR_BURST_LENGTH(8) | MSTR_ACTIVE_RANKS(config->ranks); - if (para->type == SUNXI_DRAM_TYPE_DDR3) - reg_val |= MSTR_DEVICETYPE_DDR3 | MSTR_2TMODE; - else if (para->type == SUNXI_DRAM_TYPE_LPDDR3) - reg_val |= MSTR_DEVICETYPE_LPDDR3; + reg_val = MSTR_ACTIVE_RANKS(config->ranks); + switch (para->type) { + case SUNXI_DRAM_TYPE_DDR3: + reg_val |= MSTR_BURST_LENGTH(8) | MSTR_DEVICETYPE_DDR3 | MSTR_2TMODE; + break; + case SUNXI_DRAM_TYPE_LPDDR3: + reg_val |= MSTR_BURST_LENGTH(8) | MSTR_DEVICETYPE_LPDDR3; + break; + case SUNXI_DRAM_TYPE_LPDDR4: + reg_val |= MSTR_BURST_LENGTH(16) | MSTR_DEVICETYPE_LPDDR4; + break; + case SUNXI_DRAM_TYPE_DDR4: + default: + panic("This DRAM setup is currently not supported.\n"); + }; if (config->bus_full_width) reg_val |= MSTR_BUSWIDTH_FULL; else @@ -1101,10 +1203,20 @@ static bool mctl_ctrl_init(const struct dram_para *para, else writel(0x0201, &mctl_ctl->odtmap); - if (para->type == SUNXI_DRAM_TYPE_DDR3) + switch (para->type) { + case SUNXI_DRAM_TYPE_DDR3: reg_val = 0x06000400; - else if (para->type == SUNXI_DRAM_TYPE_LPDDR3) + break; + case SUNXI_DRAM_TYPE_LPDDR3: reg_val = 0x09020400; + break; + case SUNXI_DRAM_TYPE_LPDDR4: + reg_val = 0x04000400; + break; + case SUNXI_DRAM_TYPE_DDR4: + default: + panic("This DRAM setup is currently not supported.\n"); + }; writel(reg_val, &mctl_ctl->odtcfg); writel(reg_val, &mctl_ctl->unk_0x2240); writel(reg_val, &mctl_ctl->unk_0x3240); @@ -1124,6 +1236,9 @@ static bool mctl_ctrl_init(const struct dram_para *para, setbits_le32(&mctl_ctl->unk_0x3180, BIT(31) | BIT(30)); setbits_le32(&mctl_ctl->unk_0x4180, BIT(31) | BIT(30)); + if (para->type == SUNXI_DRAM_TYPE_LPDDR4) + setbits_le32(&mctl_ctl->dbictl, 0x1); + setbits_le32(&mctl_ctl->rfshctl3, BIT(0)); clrbits_le32(&mctl_ctl->dfimisc, BIT(0)); @@ -1246,6 +1361,8 @@ static const struct dram_para para = { .type = SUNXI_DRAM_TYPE_DDR3, #elif defined(CONFIG_SUNXI_DRAM_H616_LPDDR3) .type = SUNXI_DRAM_TYPE_LPDDR3, +#elif defined(CONFIG_SUNXI_DRAM_H616_LPDDR4) + .type = SUNXI_DRAM_TYPE_LPDDR4, #endif .dx_odt = CONFIG_DRAM_SUN50I_H616_DX_ODT, .dx_dri = CONFIG_DRAM_SUN50I_H616_DX_DRI, @@ -1253,6 +1370,7 @@ static const struct dram_para para = { .odt_en = CONFIG_DRAM_SUN50I_H616_ODT_EN, .tpr0 = CONFIG_DRAM_SUN50I_H616_TPR0, .tpr2 = CONFIG_DRAM_SUN50I_H616_TPR2, + .tpr6 = CONFIG_DRAM_SUN50I_H616_TPR6, .tpr10 = CONFIG_DRAM_SUN50I_H616_TPR10, .tpr11 = CONFIG_DRAM_SUN50I_H616_TPR11, .tpr12 = CONFIG_DRAM_SUN50I_H616_TPR12, diff --git a/arch/arm/mach-sunxi/dram_sun8i_a23.c b/arch/arm/mach-sunxi/dram_sun8i_a23.c index 3ed97b59a3..056cb03efb 100644 --- a/arch/arm/mach-sunxi/dram_sun8i_a23.c +++ b/arch/arm/mach-sunxi/dram_sun8i_a23.c @@ -14,7 +14,7 @@ * * The register-layout of the sunxi_mctl_phy_reg-s looks a lot like the one * found in the TI Keystone2 documentation: - * http://www.ti.com/lit/ug/spruhn7a/spruhn7a.pdf + * https://www.ti.com/lit/ug/spruhn7a/spruhn7a.pdf * "Table4-2 DDR3 PHY Registers" * This may be used as a (possible) reference for future work / cleanups. */ diff --git a/arch/arm/mach-sunxi/dram_timings/Makefile b/arch/arm/mach-sunxi/dram_timings/Makefile index 8bfd99448a..5f20341924 100644 --- a/arch/arm/mach-sunxi/dram_timings/Makefile +++ b/arch/arm/mach-sunxi/dram_timings/Makefile @@ -5,3 +5,4 @@ obj-$(CONFIG_SUNXI_DRAM_H6_LPDDR3) += h6_lpddr3.o obj-$(CONFIG_SUNXI_DRAM_H6_DDR3_1333) += h6_ddr3_1333.o obj-$(CONFIG_SUNXI_DRAM_H616_DDR3_1333) += h616_ddr3_1333.o obj-$(CONFIG_SUNXI_DRAM_H616_LPDDR3) += h616_lpddr3.o +obj-$(CONFIG_SUNXI_DRAM_H616_LPDDR4) += h616_lpddr4_2133.o diff --git a/arch/arm/mach-sunxi/dram_timings/h616_lpddr4_2133.c b/arch/arm/mach-sunxi/dram_timings/h616_lpddr4_2133.c new file mode 100644 index 0000000000..c11cb8678f --- /dev/null +++ b/arch/arm/mach-sunxi/dram_timings/h616_lpddr4_2133.c @@ -0,0 +1,95 @@ +/* + * sun50i H616 LPDDR4-2133 timings, as programmed by Allwinner's boot0 + * for orangepi zero3 with the H618 and LPDDR4 memory. + * + * (C) Copyright 2023 Mikhail Kalashnikov <iuncuim@gmail.com> + * Based on H6 DDR3 timings: + * (C) Copyright 2020 Jernej Skrabec <jernej.skrabec@siol.net> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/arch/dram.h> +#include <asm/arch/cpu.h> + +void mctl_set_timing_params(const struct dram_para *para) +{ + struct sunxi_mctl_ctl_reg * const mctl_ctl = + (struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL0_BASE; + + u8 tccd = 4; + u8 tfaw = ns_to_t(40); + u8 trrd = max(ns_to_t(10), 2); + u8 trcd = max(ns_to_t(18), 2); + u8 trc = ns_to_t(65); + u8 txp = max(ns_to_t(8), 2); + u8 trtp = max(ns_to_t(8), 4); + u8 trp = ns_to_t(21); + u8 tras = ns_to_t(42); + u16 trefi = ns_to_t(3904) / 32; + u16 trfc = ns_to_t(280); + u16 txsr = ns_to_t(190); + + u8 tmrw = max(ns_to_t(14), 5); + u8 tmrd = tmrw; + u8 tmod = 12; + u8 tcke = max(ns_to_t(15), 2); + u8 tcksrx = max(ns_to_t(2), 2); + u8 tcksre = max(ns_to_t(5), 2); + u8 tckesr = tcke; + u8 trasmax = (trefi * 9) / 32; + u8 txs = 4; + u8 txsdll = 16; + u8 txsabort = 4; + u8 txsfast = 4; + u8 tcl = 10; + u8 tcwl = 5; + u8 t_rdata_en = 17; + u8 tphy_wrlat = 5; + + u8 twtp = 24; + u8 twr2rd = max(trrd, (u8)4) + 14; + u8 trd2wr = (ns_to_t(4) + 17) - ns_to_t(1); + + /* set DRAM timing */ + writel((twtp << 24) | (tfaw << 16) | (trasmax << 8) | tras, + &mctl_ctl->dramtmg[0]); + writel((txp << 16) | (trtp << 8) | trc, &mctl_ctl->dramtmg[1]); + writel((tcwl << 24) | (tcl << 16) | (trd2wr << 8) | twr2rd, + &mctl_ctl->dramtmg[2]); + writel((tmrw << 20) | (tmrd << 12) | tmod, &mctl_ctl->dramtmg[3]); + writel((trcd << 24) | (tccd << 16) | (trrd << 8) | trp, + &mctl_ctl->dramtmg[4]); + writel((tcksrx << 24) | (tcksre << 16) | (tckesr << 8) | tcke, + &mctl_ctl->dramtmg[5]); + /* Value suggested by ZynqMP manual and used by libdram */ + writel((txp + 2) | 0x02020000, &mctl_ctl->dramtmg[6]); + writel((txsfast << 24) | (txsabort << 16) | (txsdll << 8) | txs, + &mctl_ctl->dramtmg[8]); + writel(0x00020208, &mctl_ctl->dramtmg[9]); + writel(0xE0C05, &mctl_ctl->dramtmg[10]); + writel(0x440C021C, &mctl_ctl->dramtmg[11]); + writel(8, &mctl_ctl->dramtmg[12]); + writel(0xA100002, &mctl_ctl->dramtmg[13]); + writel(txsr, &mctl_ctl->dramtmg[14]); + + clrsetbits_le32(&mctl_ctl->init[0], 0xC0000FFF, 0x3f0); + writel(0x01f20000, &mctl_ctl->init[1]); + writel(0x00000d05, &mctl_ctl->init[2]); + writel(0, &mctl_ctl->dfimisc); + writel(0x0034001b, &mctl_ctl->init[3]); + writel(0x00330000, &mctl_ctl->init[4]); + writel(0x00040072, &mctl_ctl->init[6]); + writel(0x00240009, &mctl_ctl->init[7]); + + clrsetbits_le32(&mctl_ctl->rankctl, 0xff0, 0x660); + + /* Configure DFI timing */ + writel(tphy_wrlat | 0x2000000 | (t_rdata_en << 16) | 0x808000, + &mctl_ctl->dfitmg0); + writel(0x100202, &mctl_ctl->dfitmg1); + + /* set refresh timing */ + writel((trefi << 16) | trfc, &mctl_ctl->rfshtmg); +} diff --git a/arch/arm/mach-sunxi/pmic_bus.c b/arch/arm/mach-sunxi/pmic_bus.c index c090840637..8e7625fe05 100644 --- a/arch/arm/mach-sunxi/pmic_bus.c +++ b/arch/arm/mach-sunxi/pmic_bus.c @@ -22,6 +22,7 @@ #define AXP209_I2C_ADDR 0x34 #define AXP305_I2C_ADDR 0x36 +#define AXP313_I2C_ADDR 0x36 #define AXP221_CHIP_ADDR 0x68 @@ -34,6 +35,8 @@ static int pmic_i2c_address(void) return AXP152_I2C_ADDR; if (IS_ENABLED(CONFIG_AXP305_POWER)) return AXP305_I2C_ADDR; + if (IS_ENABLED(CONFIG_AXP313_POWER)) + return AXP313_I2C_ADDR; /* Other AXP2xx and AXP8xx variants */ return AXP209_I2C_ADDR; diff --git a/arch/arm/mach-zynqmp/Kconfig b/arch/arm/mach-zynqmp/Kconfig index 26b80b7882..7e7c87d16f 100644 --- a/arch/arm/mach-zynqmp/Kconfig +++ b/arch/arm/mach-zynqmp/Kconfig @@ -100,30 +100,30 @@ config SPL_ZYNQMP_DRAM_ECC_INIT config SPL_ZYNQMP_DRAM_BANK1_BASE depends on SPL_ZYNQMP_DRAM_ECC_INIT hex "DRAM Bank1 address" - default 0x00000000 - help - Start address of DRAM ECC bank1 + default 0x00000000 + help + Start address of DRAM ECC bank1 config SPL_ZYNQMP_DRAM_BANK1_LEN depends on SPL_ZYNQMP_DRAM_ECC_INIT hex "DRAM Bank1 size" - default 0x80000000 - help - Size in bytes of the DRAM ECC bank1 + default 0x80000000 + help + Size in bytes of the DRAM ECC bank1 config SPL_ZYNQMP_DRAM_BANK2_BASE depends on SPL_ZYNQMP_DRAM_ECC_INIT hex "DRAM Bank2 address" - default 0x800000000 - help - Start address of DRAM ECC bank2 + default 0x800000000 + help + Start address of DRAM ECC bank2 config SPL_ZYNQMP_DRAM_BANK2_LEN depends on SPL_ZYNQMP_DRAM_ECC_INIT hex "DRAM Bank2 size" - default 0x0 - help - Size in bytes of the DRAM ECC bank2. A null size takes no action. + default 0x0 + help + Size in bytes of the DRAM ECC bank2. A null size takes no action. config SYS_MALLOC_F_LEN default 0x600 diff --git a/arch/sandbox/cpu/os.c b/arch/sandbox/cpu/os.c index 8847c4cd0a..cbae5109e8 100644 --- a/arch/sandbox/cpu/os.c +++ b/arch/sandbox/cpu/os.c @@ -219,7 +219,7 @@ int os_map_file(const char *pathname, int os_flags, void **bufp, int *sizep) { void *ptr; off_t size; - int ifd; + int ifd, ret = 0; ifd = os_open(pathname, os_flags); if (ifd < 0) { @@ -229,23 +229,28 @@ int os_map_file(const char *pathname, int os_flags, void **bufp, int *sizep) size = os_filesize(ifd); if (size < 0) { printf("Cannot get file size of '%s'\n", pathname); - return -EIO; + ret = -EIO; + goto out; } if ((unsigned long long)size > (unsigned long long)SIZE_MAX) { printf("File '%s' too large to map\n", pathname); - return -EIO; + ret = -EIO; + goto out; } ptr = mmap(0, size, PROT_READ | PROT_WRITE, MAP_SHARED, ifd, 0); if (ptr == MAP_FAILED) { printf("Can't map file '%s': %s\n", pathname, strerror(errno)); - return -EPERM; + ret = -EPERM; + goto out; } *bufp = ptr; *sizep = size; - return 0; +out: + os_close(ifd); + return ret; } int os_unmap(void *buf, int size) diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index 6fd62fcdf8..9131eda970 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -1572,6 +1572,7 @@ other-node = "/some-bus/c-test@5"; int-values = <0x1937 72993>; u-boot,acpi-ssdt-order = <&acpi_test2 &acpi_test1>; + stdout-path = "serial0:115200n8"; chosen-test { compatible = "denx,u-boot-fdt-test"; reg = <9 1>; diff --git a/board/bosch/guardian/board.c b/board/bosch/guardian/board.c index c31e2c86a2..ee9e6d632e 100644 --- a/board/bosch/guardian/board.c +++ b/board/bosch/guardian/board.c @@ -4,7 +4,7 @@ * * Board functions for Bosch Guardian * - * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ * Copyright (C) 2018 Robert Bosch Power Tools GmbH */ diff --git a/board/bosch/guardian/board.h b/board/bosch/guardian/board.h index b301caf47f..e1e8c0cb0e 100644 --- a/board/bosch/guardian/board.h +++ b/board/bosch/guardian/board.h @@ -4,7 +4,7 @@ * * Board header for Bosch Guardian * - * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ * Copyright (C) 2018 Robert Bosch Power Tools GmbH */ diff --git a/board/bosch/guardian/mux.c b/board/bosch/guardian/mux.c index 12c3eb666f..53850ffb8f 100644 --- a/board/bosch/guardian/mux.c +++ b/board/bosch/guardian/mux.c @@ -2,7 +2,7 @@ /* * mux.c * - * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ * Copyright (C) 2018 Robert Bosch Power Tools GmbH */ diff --git a/board/bosch/shc/Makefile b/board/bosch/shc/Makefile index 93f2df3773..bac12edc1d 100644 --- a/board/bosch/shc/Makefile +++ b/board/bosch/shc/Makefile @@ -2,7 +2,7 @@ # # Makefile # -# Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ +# Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ obj-y := mux.o obj-y += board.o diff --git a/board/bosch/shc/board.c b/board/bosch/shc/board.c index e3a9c00e80..962a485acd 100644 --- a/board/bosch/shc/board.c +++ b/board/bosch/shc/board.c @@ -8,7 +8,7 @@ * Based on: * Board functions for TI AM335X based boards * - * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ */ #include <common.h> diff --git a/board/bosch/shc/board.h b/board/bosch/shc/board.h index 997595bf42..4cc02f93c6 100644 --- a/board/bosch/shc/board.h +++ b/board/bosch/shc/board.h @@ -8,7 +8,7 @@ * Based on: * TI AM335x boards information header * - * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ */ #ifndef _BOARD_H_ diff --git a/board/bosch/shc/mux.c b/board/bosch/shc/mux.c index 0a97eafea6..f19d1866c7 100644 --- a/board/bosch/shc/mux.c +++ b/board/bosch/shc/mux.c @@ -6,7 +6,7 @@ * Heiko Schocher, DENX Software Engineering, hs@denx.de. * * Based on: - * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ */ #include <common.h> diff --git a/board/davinci/da8xxevm/da850evm.c b/board/davinci/da8xxevm/da850evm.c index 474dca7292..05053a87a5 100644 --- a/board/davinci/da8xxevm/da850evm.c +++ b/board/davinci/da8xxevm/da850evm.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2010 Texas Instruments Incorporated - https://www.ti.com/ * * Based on da830evm.c. Original Copyrights follow: * diff --git a/board/davinci/da8xxevm/omapl138_lcdk.c b/board/davinci/da8xxevm/omapl138_lcdk.c index 5ffd420fff..9738e2bd9c 100644 --- a/board/davinci/da8xxevm/omapl138_lcdk.c +++ b/board/davinci/da8xxevm/omapl138_lcdk.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ * * Based on da850evm.c. Original Copyrights follow: * diff --git a/board/eets/pdu001/README b/board/eets/pdu001/README index 50e715446b..ab10cf99f4 100644 --- a/board/eets/pdu001/README +++ b/board/eets/pdu001/README @@ -14,7 +14,7 @@ Hardware The PDU-001 (Processor and Display Unit) is a plugin card for 19" racks. It is manufactured by EETS GmbH (https://www.eets.ch). The core of the board is a m2 SOM from bytes at work (https://www.bytesatwork.ch) which in turn is based on -AM3352 SOC from TI (http://www.ti.com). +AM3352 SOC from TI (https://www.ti.com). Customization ============= diff --git a/board/eets/pdu001/board.c b/board/eets/pdu001/board.c index de224d4d28..3a52e4ae67 100644 --- a/board/eets/pdu001/board.c +++ b/board/eets/pdu001/board.c @@ -6,7 +6,7 @@ * * Copyright (C) 2018, EETS GmbH, http://www.eets.ch/ * - * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ */ #include <common.h> diff --git a/board/eets/pdu001/board.h b/board/eets/pdu001/board.h index bfea96e5f0..6ad0fea33b 100644 --- a/board/eets/pdu001/board.h +++ b/board/eets/pdu001/board.h @@ -6,7 +6,7 @@ * * Copyright (C) 2018 EETS GmbH - http://www.eets.ch/ * - * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ */ #ifndef _BOARD_H_ diff --git a/board/eets/pdu001/mux.c b/board/eets/pdu001/mux.c index 886fef60b0..c97927e5cf 100644 --- a/board/eets/pdu001/mux.c +++ b/board/eets/pdu001/mux.c @@ -4,7 +4,7 @@ * * Copyright (C) 2018 EETS GmbH - http://www.eets.ch/ * - * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ */ #include <common.h> diff --git a/board/grinn/chiliboard/board.c b/board/grinn/chiliboard/board.c index b472ca5b94..64b32ca96d 100644 --- a/board/grinn/chiliboard/board.c +++ b/board/grinn/chiliboard/board.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ * Copyright (C) 2017, Grinn - http://grinn-global.com/ */ diff --git a/board/hisilicon/hikey960/README b/board/hisilicon/hikey960/README index e1e330d535..6e01862f8a 100644 --- a/board/hisilicon/hikey960/README +++ b/board/hisilicon/hikey960/README @@ -26,12 +26,12 @@ First get all the sources > git clone https://github.com/ARM-software/arm-trusted-firmware > git clone https://github.com/96boards-hikey/OpenPlatformPkg -b testing/hikey960_v1.3.4 > git clone https://github.com/96boards-hikey/l-loader -b testing/hikey960_v1.2 - > wget http://snapshots.linaro.org/96boards/reference-platform/components/uefi-staging/latest/hikey960/release/config - > wget http://snapshots.linaro.org/96boards/reference-platform/components/uefi-staging/latest/hikey960/release/hisi-sec_usb_xloader.img - > wget http://snapshots.linaro.org/96boards/reference-platform/components/uefi-staging/latest/hikey960/release/hisi-sec_uce_boot.img - > wget http://snapshots.linaro.org/96boards/reference-platform/components/uefi-staging/latest/hikey960/release/sec_xloader.img - > wget http://snapshots.linaro.org/96boards/reference-platform/components/uefi-staging/latest/hikey960/release/recovery.bin - > wget http://snapshots.linaro.org/96boards/reference-platform/components/uefi-staging/latest/hikey960/release/hikey_idt + > wget http://snapshots.linaro.org/reference-platform/components/uefi-staging/123/hikey960/release/config + > wget http://snapshots.linaro.org/reference-platform/components/uefi-staging/123/hikey960/release/hisi-sec_usb_xloader.img + > wget http://snapshots.linaro.org/reference-platform/components/uefi-staging/123/hikey960/release/hisi-sec_uce_boot.img + > wget http://snapshots.linaro.org/reference-platform/components/uefi-staging/123/hikey960/release/hisi-sec_xloader.img + > wget http://snapshots.linaro.org/reference-platform/components/uefi-staging/123/hikey960/release/recovery.bin + > wget http://snapshots.linaro.org/reference-platform/components/uefi-staging/123/hikey960/release/hikey_idt Get the SCP_BL2 lpm3.img binary. It is shipped as part of the UEFI source. The latest version can be obtained from the OpenPlatformPkg repo. @@ -126,7 +126,7 @@ following command Now, the images can be flashed using fastboot: > sudo fastboot flash ptable ~/hikey960/bin/prm_ptable.img - > sudo fastboot flash xloader ~/hikey960/bin/sec_xloader.img + > sudo fastboot flash xloader ~/hikey960/bin/hisi-sec_xloader.img > sudo fastboot flash fastboot ~/hikey960/bin/l-loader.bin > sudo fastboot flash fip ~/hikey960/bin/fip.bin diff --git a/board/lego/ev3/legoev3.c b/board/lego/ev3/legoev3.c index 8349260131..43afe593c7 100644 --- a/board/lego/ev3/legoev3.c +++ b/board/lego/ev3/legoev3.c @@ -4,7 +4,7 @@ * * Based on da850evm.c * - * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2010 Texas Instruments Incorporated - https://www.ti.com/ * * Based on da830evm.c. Original Copyrights follow: * diff --git a/board/logicpd/am3517evm/Makefile b/board/logicpd/am3517evm/Makefile index c07a98e938..c7da6e3fe0 100644 --- a/board/logicpd/am3517evm/Makefile +++ b/board/logicpd/am3517evm/Makefile @@ -4,6 +4,6 @@ # # Based on ti/evm/Makefile # -# Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ +# Copyright (C) 2010 Texas Instruments Incorporated - https://www.ti.com/ obj-y := am3517evm.o diff --git a/board/logicpd/am3517evm/am3517evm.c b/board/logicpd/am3517evm/am3517evm.c index e787441c74..e69a73f2af 100644 --- a/board/logicpd/am3517evm/am3517evm.c +++ b/board/logicpd/am3517evm/am3517evm.c @@ -7,7 +7,7 @@ * Based on ti/evm/evm.c * * Copyright (C) 2010 - * Texas Instruments Incorporated - http://www.ti.com/ + * Texas Instruments Incorporated - https://www.ti.com/ */ #include <common.h> diff --git a/board/logicpd/am3517evm/am3517evm.h b/board/logicpd/am3517evm/am3517evm.h index aec2b410c8..283b4535a6 100644 --- a/board/logicpd/am3517evm/am3517evm.h +++ b/board/logicpd/am3517evm/am3517evm.h @@ -7,7 +7,7 @@ * Based on ti/evm/evm.h * * Copyright (C) 2010 - * Texas Instruments Incorporated - http://www.ti.com/ + * Texas Instruments Incorporated - https://www.ti.com/ */ #ifndef _AM3517EVM_H_ diff --git a/board/phytec/phycore_am335x_r2/Makefile b/board/phytec/phycore_am335x_r2/Makefile index ff6f8b4221..16ac38fd8b 100644 --- a/board/phytec/phycore_am335x_r2/Makefile +++ b/board/phytec/phycore_am335x_r2/Makefile @@ -2,7 +2,7 @@ # # Makefile # -# Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ +# Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ ifdef CONFIG_SPL_BUILD obj-y += mux.o diff --git a/board/phytec/phycore_am335x_r2/board.c b/board/phytec/phycore_am335x_r2/board.c index eb573d076d..5700effbd3 100644 --- a/board/phytec/phycore_am335x_r2/board.c +++ b/board/phytec/phycore_am335x_r2/board.c @@ -4,7 +4,7 @@ * * Board functions for Phytec phyCORE-AM335x R2 (PCL060 / PCM060) based boards * - * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ * Copyright (C) 2013 Lars Poeschel, Lemonage Software GmbH * Copyright (C) 2015 Wadim Egorov, PHYTEC Messtechnik GmbH * Copyright (C) 2019 DENX Software Engineering GmbH diff --git a/board/pine64/quartzpro64-rk3588/Kconfig b/board/pine64/quartzpro64-rk3588/Kconfig new file mode 100644 index 0000000000..96aa7921d3 --- /dev/null +++ b/board/pine64/quartzpro64-rk3588/Kconfig @@ -0,0 +1,15 @@ +if TARGET_QUARTZPRO64_RK3588 + +config SYS_BOARD + default "quartzpro64-rk3588" + +config SYS_VENDOR + default "pine64" + +config SYS_CONFIG_NAME + default "quartzpro64-rk3588" + +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + +endif diff --git a/board/pine64/quartzpro64-rk3588/MAINTAINERS b/board/pine64/quartzpro64-rk3588/MAINTAINERS new file mode 100644 index 0000000000..a7e944b747 --- /dev/null +++ b/board/pine64/quartzpro64-rk3588/MAINTAINERS @@ -0,0 +1,8 @@ +QUARTZPRO64-RK3588 +M: Tom Fitzhenry <tom@tom-fitzhenry.me.uk> +S: Maintained +F: board/pine64/quartzpro64-rk3588 +F: include/configs/quartzpro64-rk3588.h +F: configs/quartzpro64-rk3588_defconfig +F: arch/arm/dts/rk3588-quartzpro64.dts +F: arch/arm/dts/rk3588-quartzpro64-u-boot.dtsi diff --git a/board/pine64/quartzpro64-rk3588/Makefile b/board/pine64/quartzpro64-rk3588/Makefile new file mode 100644 index 0000000000..47819d9be9 --- /dev/null +++ b/board/pine64/quartzpro64-rk3588/Makefile @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0+ + +obj-y += quartzpro64-rk3588.o diff --git a/board/pine64/quartzpro64-rk3588/quartzpro64-rk3588.c b/board/pine64/quartzpro64-rk3588/quartzpro64-rk3588.c new file mode 100644 index 0000000000..bda804a89e --- /dev/null +++ b/board/pine64/quartzpro64-rk3588/quartzpro64-rk3588.c @@ -0,0 +1,39 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2023 Google, Inc + */ + +#include <fdtdec.h> +#include <fdt_support.h> + +#ifdef CONFIG_OF_BOARD_SETUP +int quartzpro64_add_reserved_memory_fdt_nodes(void *new_blob) +{ + struct fdt_memory gap1 = { + .start = 0x3fc000000, + .end = 0x3fc4fffff, + }; + struct fdt_memory gap2 = { + .start = 0x3fff00000, + .end = 0x3ffffffff, + }; + unsigned long flags = FDTDEC_RESERVED_MEMORY_NO_MAP; + unsigned int ret; + + /* + * Inject the reserved-memory nodes into the DTS + */ + ret = fdtdec_add_reserved_memory(new_blob, "gap1", &gap1, NULL, 0, + NULL, flags); + if (ret) + return ret; + + return fdtdec_add_reserved_memory(new_blob, "gap2", &gap2, NULL, 0, + NULL, flags); +} + +int ft_board_setup(void *blob, struct bd_info *bd) +{ + return quartzpro64_add_reserved_memory_fdt_nodes(blob); +} +#endif diff --git a/board/siemens/common/board.c b/board/siemens/common/board.c index 8fa9197a6d..d077751cbe 100644 --- a/board/siemens/common/board.c +++ b/board/siemens/common/board.c @@ -6,7 +6,7 @@ * * Based on: * U-Boot file:/board/ti/am335x/board.c - * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ */ #include <common.h> diff --git a/board/siemens/draco/Makefile b/board/siemens/draco/Makefile index 3e3394a865..e94456ab1c 100644 --- a/board/siemens/draco/Makefile +++ b/board/siemens/draco/Makefile @@ -7,7 +7,7 @@ # # Based on: # u-boot:/board/ti/am335x/Makefile -# Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ +# Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ ifdef CONFIG_SPL_BUILD obj-y := mux.o diff --git a/board/siemens/draco/board.c b/board/siemens/draco/board.c index 8874659013..8b13d23aca 100644 --- a/board/siemens/draco/board.c +++ b/board/siemens/draco/board.c @@ -9,7 +9,7 @@ * Board functions for TI AM335X based boards * u-boot:/board/ti/am335x/board.c * - * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ */ #include <common.h> diff --git a/board/siemens/draco/board.h b/board/siemens/draco/board.h index 7c29a45c03..f027427d1f 100644 --- a/board/siemens/draco/board.h +++ b/board/siemens/draco/board.h @@ -9,7 +9,7 @@ * TI AM335x boards information header * u-boot:/board/ti/am335x/board.h * - * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ */ #ifndef _BOARD_H_ diff --git a/board/siemens/draco/mux.c b/board/siemens/draco/mux.c index 3f2d41befe..2632f05033 100644 --- a/board/siemens/draco/mux.c +++ b/board/siemens/draco/mux.c @@ -7,7 +7,7 @@ * * Based on: * u-boot:/board/ti/am335x/mux.c - * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ */ #include <common.h> diff --git a/board/siemens/pxm2/Makefile b/board/siemens/pxm2/Makefile index 3e3394a865..e94456ab1c 100644 --- a/board/siemens/pxm2/Makefile +++ b/board/siemens/pxm2/Makefile @@ -7,7 +7,7 @@ # # Based on: # u-boot:/board/ti/am335x/Makefile -# Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ +# Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ ifdef CONFIG_SPL_BUILD obj-y := mux.o diff --git a/board/siemens/pxm2/board.c b/board/siemens/pxm2/board.c index 47f19bcb8f..40aee7c8b3 100644 --- a/board/siemens/pxm2/board.c +++ b/board/siemens/pxm2/board.c @@ -9,7 +9,7 @@ * * Board functions for TI AM335X based boards * - * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ */ #include <common.h> diff --git a/board/siemens/pxm2/board.h b/board/siemens/pxm2/board.h index af21fc4743..9067e4d5aa 100644 --- a/board/siemens/pxm2/board.h +++ b/board/siemens/pxm2/board.h @@ -9,7 +9,7 @@ * TI AM335x boards information header * u-boot:/board/ti/am335x/board.h * - * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ */ #ifndef _BOARD_H_ diff --git a/board/siemens/pxm2/mux.c b/board/siemens/pxm2/mux.c index 2f35bb4a73..d21ef47771 100644 --- a/board/siemens/pxm2/mux.c +++ b/board/siemens/pxm2/mux.c @@ -8,7 +8,7 @@ * Based on: * u-boot:/board/ti/am335x/mux.c * - * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ */ #include <common.h> diff --git a/board/siemens/pxm2/pmic.h b/board/siemens/pxm2/pmic.h index 37660460aa..f4ce7f16b2 100644 --- a/board/siemens/pxm2/pmic.h +++ b/board/siemens/pxm2/pmic.h @@ -4,7 +4,7 @@ * (C) Heiko Schocher, DENX Software Engineering, hs@denx.de. * * Based on: - * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ */ #ifndef PMIC_H #define PMIC_H diff --git a/board/siemens/rut/Makefile b/board/siemens/rut/Makefile index 3e3394a865..e94456ab1c 100644 --- a/board/siemens/rut/Makefile +++ b/board/siemens/rut/Makefile @@ -7,7 +7,7 @@ # # Based on: # u-boot:/board/ti/am335x/Makefile -# Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ +# Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ ifdef CONFIG_SPL_BUILD obj-y := mux.o diff --git a/board/siemens/rut/board.c b/board/siemens/rut/board.c index a8b196a65c..bad0b71ce2 100644 --- a/board/siemens/rut/board.c +++ b/board/siemens/rut/board.c @@ -7,7 +7,7 @@ * Based on: * u-boot:/board/ti/am335x/board.c * - * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ */ #include <common.h> diff --git a/board/siemens/rut/board.h b/board/siemens/rut/board.h index af21fc4743..9067e4d5aa 100644 --- a/board/siemens/rut/board.h +++ b/board/siemens/rut/board.h @@ -9,7 +9,7 @@ * TI AM335x boards information header * u-boot:/board/ti/am335x/board.h * - * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ */ #ifndef _BOARD_H_ diff --git a/board/siemens/rut/mux.c b/board/siemens/rut/mux.c index d80120bbdd..894a9bf1e3 100644 --- a/board/siemens/rut/mux.c +++ b/board/siemens/rut/mux.c @@ -8,7 +8,7 @@ * Based on: * u-boot:/board/ti/am335x/mux.c * - * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ */ #include <common.h> diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 4bbe3f62fa..0061437211 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -236,6 +236,11 @@ M: Stefan Roese <sr@denx.de> S: Maintained F: configs/icnova-a20-swac_defconfig +ICnova-A20-ADB4006 BOARD +M: Ludwig Kormann <ludwig.kormann@ict42.de> +S: Maintained +F: configs/icnova-a20-adb4006_defconfig + ITEAD IBOX BOARD M: Marcus Cooper <codekipper@gmail.com> S: Maintained diff --git a/board/sunxi/board.c b/board/sunxi/board.c index 39ecbe988f..8c12c8dead 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -34,6 +34,7 @@ #include <asm/global_data.h> #include <linux/delay.h> #include <linux/printk.h> +#include <linux/types.h> #ifndef CONFIG_ARM64 #include <asm/armv7.h> #endif @@ -568,7 +569,8 @@ void sunxi_board_init(void) #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \ defined CONFIG_AXP221_POWER || defined CONFIG_AXP305_POWER || \ - defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER + defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER || \ + defined CONFIG_AXP313_POWER power_failed = axp_init(); if (IS_ENABLED(CONFIG_AXP_DISABLE_BOOT_ON_POWERON) && !power_failed) { @@ -581,50 +583,46 @@ void sunxi_board_init(void) } } -#if defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || \ - defined CONFIG_AXP818_POWER +#ifdef CONFIG_AXP_DCDC1_VOLT power_failed |= axp_set_dcdc1(CONFIG_AXP_DCDC1_VOLT); + power_failed |= axp_set_dcdc5(CONFIG_AXP_DCDC5_VOLT); #endif -#if !defined(CONFIG_AXP305_POWER) +#ifdef CONFIG_AXP_DCDC2_VOLT power_failed |= axp_set_dcdc2(CONFIG_AXP_DCDC2_VOLT); power_failed |= axp_set_dcdc3(CONFIG_AXP_DCDC3_VOLT); #endif -#if !defined(CONFIG_AXP209_POWER) && !defined(CONFIG_AXP818_POWER) +#ifdef CONFIG_AXP_DCDC4_VOLT power_failed |= axp_set_dcdc4(CONFIG_AXP_DCDC4_VOLT); #endif -#if defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || \ - defined CONFIG_AXP818_POWER - power_failed |= axp_set_dcdc5(CONFIG_AXP_DCDC5_VOLT); -#endif -#if defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || \ - defined CONFIG_AXP818_POWER +#ifdef CONFIG_AXP_ALDO1_VOLT power_failed |= axp_set_aldo1(CONFIG_AXP_ALDO1_VOLT); #endif -#if !defined(CONFIG_AXP305_POWER) +#ifdef CONFIG_AXP_ALDO2_VOLT power_failed |= axp_set_aldo2(CONFIG_AXP_ALDO2_VOLT); #endif -#if !defined(CONFIG_AXP152_POWER) && !defined(CONFIG_AXP305_POWER) +#ifdef CONFIG_AXP_ALDO3_VOLT power_failed |= axp_set_aldo3(CONFIG_AXP_ALDO3_VOLT); #endif -#ifdef CONFIG_AXP209_POWER +#ifdef CONFIG_AXP_ALDO4_VOLT power_failed |= axp_set_aldo4(CONFIG_AXP_ALDO4_VOLT); #endif -#if defined(CONFIG_AXP221_POWER) || defined(CONFIG_AXP809_POWER) || \ - defined(CONFIG_AXP818_POWER) +#ifdef CONFIG_AXP_DLDO1_VOLT power_failed |= axp_set_dldo(1, CONFIG_AXP_DLDO1_VOLT); power_failed |= axp_set_dldo(2, CONFIG_AXP_DLDO2_VOLT); -#if !defined CONFIG_AXP809_POWER +#endif +#ifdef CONFIG_AXP_DLDO3_VOLT power_failed |= axp_set_dldo(3, CONFIG_AXP_DLDO3_VOLT); power_failed |= axp_set_dldo(4, CONFIG_AXP_DLDO4_VOLT); #endif +#ifdef CONFIG_AXP_ELDO1_VOLT power_failed |= axp_set_eldo(1, CONFIG_AXP_ELDO1_VOLT); power_failed |= axp_set_eldo(2, CONFIG_AXP_ELDO2_VOLT); power_failed |= axp_set_eldo(3, CONFIG_AXP_ELDO3_VOLT); #endif -#ifdef CONFIG_AXP818_POWER +#ifdef CONFIG_AXP_FLDO1_VOLT power_failed |= axp_set_fldo(1, CONFIG_AXP_FLDO1_VOLT); power_failed |= axp_set_fldo(2, CONFIG_AXP_FLDO2_VOLT); power_failed |= axp_set_fldo(3, CONFIG_AXP_FLDO3_VOLT); @@ -633,7 +631,7 @@ void sunxi_board_init(void) #if defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER power_failed |= axp_set_sw(IS_ENABLED(CONFIG_AXP_SW_ON)); #endif -#endif +#endif /* CONFIG_AXPxxx_POWER */ printf("DRAM:"); gd->ram_size = sunxi_dram_init(); printf(" %d MiB\n", (int)(gd->ram_size >> 20)); @@ -941,7 +939,7 @@ int board_fit_config_name_match(const char *name) #ifdef CONFIG_PINE64_DT_SELECTION if (strstr(best_dt_name, "-pine64-plus")) { /* Differentiate the Pine A64 boards by their DRAM size. */ - if ((gd->ram_size == 512 * 1024 * 1024)) + if (gd->ram_size == SZ_512M) best_dt_name = "sun50i-a64-pine64"; } #endif diff --git a/board/tcl/sl50/board.c b/board/tcl/sl50/board.c index 839a692ce8..3f7d42f3eb 100644 --- a/board/tcl/sl50/board.c +++ b/board/tcl/sl50/board.c @@ -4,7 +4,7 @@ * * Board functions for TCL SL50 board * - * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ */ #include <common.h> diff --git a/board/tcl/sl50/board.h b/board/tcl/sl50/board.h index b8b9ed7e71..e6246772a5 100644 --- a/board/tcl/sl50/board.h +++ b/board/tcl/sl50/board.h @@ -4,7 +4,7 @@ * * TCL SL50 boards information header * - * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ */ #ifndef _BOARD_H_ diff --git a/board/tcl/sl50/mux.c b/board/tcl/sl50/mux.c index b0a1dad3aa..ab9088145a 100644 --- a/board/tcl/sl50/mux.c +++ b/board/tcl/sl50/mux.c @@ -2,7 +2,7 @@ /* * mux.c * - * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ */ #include <common.h> diff --git a/board/theobroma-systems/ringneck_px30/ringneck-px30.c b/board/theobroma-systems/ringneck_px30/ringneck-px30.c index bb1bb4acf5..537ce0d1d1 100644 --- a/board/theobroma-systems/ringneck_px30/ringneck-px30.c +++ b/board/theobroma-systems/ringneck_px30/ringneck-px30.c @@ -16,12 +16,14 @@ #include <usb.h> #include <dm/pinctrl.h> #include <dm/uclass-internal.h> +#include <asm/gpio.h> #include <asm/io.h> #include <asm/setup.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/hardware.h> #include <asm/arch-rockchip/periph.h> #include <asm/arch-rockchip/misc.h> +#include <linux/delay.h> #include <power/regulator.h> #include <u-boot/sha256.h> @@ -169,3 +171,54 @@ int misc_init_r(void) return 0; } + +#define STM32_RST 100 /* GPIO3_A4 */ +#define STM32_BOOT 101 /* GPIO3_A5 */ + +void spl_board_init(void) +{ + /* + * Glitches on STM32_BOOT and STM32_RST lines during poweroff or power + * on may put the STM32 companion microcontroller into DFU mode, let's + * always reset it into normal mode instead. + * Toggling the STM32_RST line is safe to do with the ATtiny companion + * microcontroller variant because it will not trigger an MCU reset + * since only a UPDI reset command will. Since a UPDI reset is difficult + * to mistakenly trigger, glitches to the lines are theoretically also + * incapable of triggering an actual ATtiny reset. + */ + int ret; + + ret = gpio_request(STM32_RST, "STM32_RST"); + if (ret) { + debug("Failed to request STM32_RST\n"); + return; + } + + ret = gpio_request(STM32_BOOT, "STM32_BOOT"); + if (ret) { + debug("Failed to request STM32_BOOT\n"); + return; + } + + /* Rely on HW pull-down for inactive level */ + ret = gpio_direction_input(STM32_BOOT); + if (ret) { + debug("Failed to configure STM32_BOOT as input\n"); + return; + } + + ret = gpio_direction_output(STM32_RST, 0); + if (ret) { + debug("Failed to configure STM32_RST as output low\n"); + return; + } + + mdelay(1); + + ret = gpio_direction_output(STM32_RST, 1); + if (ret) { + debug("Failed to configure STM32_RST as output high\n"); + return; + } +} diff --git a/board/ti/am335x/Makefile b/board/ti/am335x/Makefile index 3ccf66be5b..2b1e21a178 100644 --- a/board/ti/am335x/Makefile +++ b/board/ti/am335x/Makefile @@ -2,7 +2,7 @@ # # Makefile # -# Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ +# Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ ifeq ($(CONFIG_$(SPL_)SKIP_LOWLEVEL_INIT),) obj-y := mux.o diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c index ecb9fa02de..34f987c2b7 100644 --- a/board/ti/am335x/board.c +++ b/board/ti/am335x/board.c @@ -4,7 +4,7 @@ * * Board functions for TI AM335X based boards * - * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ */ #include <common.h> diff --git a/board/ti/am335x/board.h b/board/ti/am335x/board.h index c2962111c1..1284c160d8 100644 --- a/board/ti/am335x/board.h +++ b/board/ti/am335x/board.h @@ -4,7 +4,7 @@ * * TI AM335x boards information header * - * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ */ #ifndef _BOARD_H_ diff --git a/board/ti/am335x/mux.c b/board/ti/am335x/mux.c index 7d31adec14..0bad154f86 100644 --- a/board/ti/am335x/mux.c +++ b/board/ti/am335x/mux.c @@ -1,7 +1,7 @@ /* * mux.c * - * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as diff --git a/board/ti/am43xx/Makefile b/board/ti/am43xx/Makefile index 8dc1d89e3a..b618f632ef 100644 --- a/board/ti/am43xx/Makefile +++ b/board/ti/am43xx/Makefile @@ -2,7 +2,7 @@ # # Makefile # -# Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ +# Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ ifeq ($(CONFIG_$(SPL_)SKIP_LOWLEVEL_INIT),) obj-y := mux.o diff --git a/board/ti/am43xx/board.c b/board/ti/am43xx/board.c index 58bfe7cd45..ea0d0b9208 100644 --- a/board/ti/am43xx/board.c +++ b/board/ti/am43xx/board.c @@ -4,7 +4,7 @@ * * Board functions for TI AM43XX based boards * - * Copyright (C) 2013, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2013, Texas Instruments, Incorporated - https://www.ti.com/ */ #include <common.h> diff --git a/board/ti/am43xx/board.h b/board/ti/am43xx/board.h index 06b737445d..37a169aaf7 100644 --- a/board/ti/am43xx/board.h +++ b/board/ti/am43xx/board.h @@ -5,7 +5,7 @@ * TI AM437x boards information header * Derived from AM335x board. * - * Copyright (C) 2013, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2013, Texas Instruments, Incorporated - https://www.ti.com/ */ #ifndef _BOARD_H_ diff --git a/board/ti/am43xx/mux.c b/board/ti/am43xx/mux.c index f59e93a0eb..463f1cc717 100644 --- a/board/ti/am43xx/mux.c +++ b/board/ti/am43xx/mux.c @@ -2,7 +2,7 @@ /* * mux.c * - * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ */ #include <common.h> diff --git a/board/ti/am57xx/board.c b/board/ti/am57xx/board.c index 9ea507a8e9..b004a89bb3 100644 --- a/board/ti/am57xx/board.c +++ b/board/ti/am57xx/board.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com * * Author: Felipe Balbi <balbi@ti.com> * diff --git a/board/ti/am57xx/mux_data.h b/board/ti/am57xx/mux_data.h index 54b7050a45..f2f428ef9b 100644 --- a/board/ti/am57xx/mux_data.h +++ b/board/ti/am57xx/mux_data.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com * * Author: Felipe Balbi <balbi@ti.com> * diff --git a/board/ti/am65x/Kconfig b/board/ti/am65x/Kconfig index 5fd19d652a..78c7040c3d 100644 --- a/board/ti/am65x/Kconfig +++ b/board/ti/am65x/Kconfig @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0+ # -# Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/ +# Copyright (C) 2017-2018 Texas Instruments Incorporated - https://www.ti.com/ # Lokesh Vutla <lokeshvutla@ti.com> choice diff --git a/board/ti/am65x/Makefile b/board/ti/am65x/Makefile index 94dddfcc4a..079a86dae7 100644 --- a/board/ti/am65x/Makefile +++ b/board/ti/am65x/Makefile @@ -1,5 +1,5 @@ # -# Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/ +# Copyright (C) 2017-2018 Texas Instruments Incorporated - https://www.ti.com/ # Lokesh Vutla <lokeshvutla@ti.com> # # SPDX-License-Identifier: GPL-2.0+ diff --git a/board/ti/am65x/evm.c b/board/ti/am65x/evm.c index 97a70954b2..975eb17946 100644 --- a/board/ti/am65x/evm.c +++ b/board/ti/am65x/evm.c @@ -2,7 +2,7 @@ /* * Board specific initialization for AM654 EVM * - * Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2017-2018 Texas Instruments Incorporated - https://www.ti.com/ * Lokesh Vutla <lokeshvutla@ti.com> * */ diff --git a/board/ti/common/Makefile b/board/ti/common/Makefile index 3172d87b46..26bf12e2e6 100644 --- a/board/ti/common/Makefile +++ b/board/ti/common/Makefile @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-2.0+ -# Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/ +# Copyright (C) 2015-2016 Texas Instruments Incorporated - https://www.ti.com/ obj-${CONFIG_TI_I2C_BOARD_DETECT} += board_detect.o obj-${CONFIG_CMD_EXTENSION} += cape_detect.o diff --git a/board/ti/common/board_detect.c b/board/ti/common/board_detect.c index ac39b25cd4..0ec6d1aaf4 100644 --- a/board/ti/common/board_detect.c +++ b/board/ti/common/board_detect.c @@ -2,7 +2,7 @@ /* * Library to support early TI EVM EEPROM handling * - * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2015-2016 Texas Instruments Incorporated - https://www.ti.com/ * Lokesh Vutla * Steve Kipisz */ diff --git a/board/ti/common/board_detect.h b/board/ti/common/board_detect.h index de7cb52dfc..ca1aa80f2f 100644 --- a/board/ti/common/board_detect.h +++ b/board/ti/common/board_detect.h @@ -2,7 +2,7 @@ /* * Library to support early TI EVM EEPROM handling * - * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2015-2016 Texas Instruments Incorporated - https://www.ti.com */ #ifndef __BOARD_DETECT_H diff --git a/board/ti/j721e/Kconfig b/board/ti/j721e/Kconfig index e6cb21f77b..9505330ef3 100644 --- a/board/ti/j721e/Kconfig +++ b/board/ti/j721e/Kconfig @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0+ # -# Copyright (C) 2018-2019 Texas Instruments Incorporated - http://www.ti.com/ +# Copyright (C) 2018-2019 Texas Instruments Incorporated - https://www.ti.com/ # Lokesh Vutla <lokeshvutla@ti.com> choice diff --git a/board/ti/j721e/Makefile b/board/ti/j721e/Makefile index 97535f5d86..6e91054675 100644 --- a/board/ti/j721e/Makefile +++ b/board/ti/j721e/Makefile @@ -1,5 +1,5 @@ # -# Copyright (C) 2018-2019 Texas Instruments Incorporated - http://www.ti.com/ +# Copyright (C) 2018-2019 Texas Instruments Incorporated - https://www.ti.com/ # Lokesh Vutla <lokeshvutla@ti.com> # # SPDX-License-Identifier: GPL-2.0+ diff --git a/board/ti/j721e/evm.c b/board/ti/j721e/evm.c index de9034206a..9d80dd6f58 100644 --- a/board/ti/j721e/evm.c +++ b/board/ti/j721e/evm.c @@ -2,7 +2,7 @@ /* * Board specific initialization for J721E EVM * - * Copyright (C) 2018-2019 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018-2019 Texas Instruments Incorporated - https://www.ti.com/ * Lokesh Vutla <lokeshvutla@ti.com> * */ diff --git a/board/ti/j721s2/evm.c b/board/ti/j721s2/evm.c index 7a91138109..db71739077 100644 --- a/board/ti/j721s2/evm.c +++ b/board/ti/j721s2/evm.c @@ -2,7 +2,7 @@ /* * Board specific initialization for J721S2 EVM * - * Copyright (C) 2021 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/ * David Huang <d-huang@ti.com> * */ diff --git a/board/vscom/baltos/Makefile b/board/vscom/baltos/Makefile index 3ccf66be5b..2b1e21a178 100644 --- a/board/vscom/baltos/Makefile +++ b/board/vscom/baltos/Makefile @@ -2,7 +2,7 @@ # # Makefile # -# Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ +# Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ ifeq ($(CONFIG_$(SPL_)SKIP_LOWLEVEL_INIT),) obj-y := mux.o diff --git a/board/vscom/baltos/board.c b/board/vscom/baltos/board.c index 8f23cda8e4..bc7dc5888f 100644 --- a/board/vscom/baltos/board.c +++ b/board/vscom/baltos/board.c @@ -4,7 +4,7 @@ * * Board functions for TI AM335X based boards * - * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ */ #include <common.h> diff --git a/board/vscom/baltos/board.h b/board/vscom/baltos/board.h index 630c9bba73..db6e19123a 100644 --- a/board/vscom/baltos/board.h +++ b/board/vscom/baltos/board.h @@ -4,7 +4,7 @@ * * TI AM335x boards information header * - * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ */ #ifndef _BOARD_H_ diff --git a/board/vscom/baltos/mux.c b/board/vscom/baltos/mux.c index e01899c83a..7b99cf0e18 100644 --- a/board/vscom/baltos/mux.c +++ b/board/vscom/baltos/mux.c @@ -1,7 +1,7 @@ /* * mux.c * - * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as diff --git a/boot/bootdev-uclass.c b/boot/bootdev-uclass.c index 44ae98a926..4926a50da8 100644 --- a/boot/bootdev-uclass.c +++ b/boot/bootdev-uclass.c @@ -784,7 +784,7 @@ static int bootdev_hunt_drv(struct bootdev_hunter *info, uint seq, bool show) if (info->hunt) { ret = info->hunt(info, show); log_debug(" - hunt result %d\n", ret); - if (ret) + if (ret && ret != -ENOENT) return ret; } std->hunters_used |= BIT(seq); diff --git a/boot/bootflow.c b/boot/bootflow.c index 6922e7e0c4..1ea2966ae9 100644 --- a/boot/bootflow.c +++ b/boot/bootflow.c @@ -467,7 +467,8 @@ void bootflow_free(struct bootflow *bflow) free(bflow->name); free(bflow->subdir); free(bflow->fname); - free(bflow->buf); + if (!(bflow->flags & BOOTFLOWF_STATIC_BUF)) + free(bflow->buf); free(bflow->os_name); free(bflow->fdt_fname); free(bflow->bootmeth_priv); diff --git a/boot/bootmeth_efi.c b/boot/bootmeth_efi.c index ae936c8daa..9ba7734911 100644 --- a/boot/bootmeth_efi.c +++ b/boot/bootmeth_efi.c @@ -160,6 +160,7 @@ static int efiload_read_file(struct bootflow *bflow, ulong addr) if (ret) return log_msg_ret("read", ret); bflow->buf = map_sysmem(addr, bflow->size); + bflow->flags |= BOOTFLOWF_STATIC_BUF; set_efi_bootdev(desc, bflow); diff --git a/boot/expo.c b/boot/expo.c index 139d684f8e..cadb6a0ad6 100644 --- a/boot/expo.c +++ b/boot/expo.c @@ -190,10 +190,12 @@ int expo_render(struct expo *exp) struct udevice *dev = exp->display; struct video_priv *vid_priv = dev_get_uclass_priv(dev); struct scene *scn = NULL; + enum colour_idx back; u32 colour; int ret; - colour = video_index_to_colour(vid_priv, VID_WHITE); + back = CONFIG_IS_ENABLED(SYS_WHITE_ON_BLACK) ? VID_BLACK : VID_WHITE; + colour = video_index_to_colour(vid_priv, back); ret = video_fill(dev, colour); if (ret) return log_msg_ret("fill", ret); diff --git a/boot/fdt_support.c b/boot/fdt_support.c index 5e49078f8c..b15d07765f 100644 --- a/boot/fdt_support.c +++ b/boot/fdt_support.c @@ -2095,7 +2095,7 @@ int fdt_overlay_apply_verbose(void *fdt, void *fdto) printf("failed on fdt_overlay_apply(): %s\n", fdt_strerror(err)); if (!has_symbols) { - printf("base fdt does did not have a /__symbols__ node\n"); + printf("base fdt does not have a /__symbols__ node\n"); printf("make sure you've compiled with -@\n"); } } diff --git a/cmd/bootflow.c b/cmd/bootflow.c index ad39ebe437..3aeb40d690 100644 --- a/cmd/bootflow.c +++ b/cmd/bootflow.c @@ -89,6 +89,44 @@ static void show_footer(int count, int num_valid) num_valid); } +/** + * bootflow_handle_menu() - Handle running the menu and updating cur bootflow + * + * This shows the menu, allows the user to select something and then prints + * what happened + * + * @std: bootstd information + * @text_mode: true to run the menu in text mode + * @bflowp: Returns selected bootflow, on success + * Return: 0 on success (a bootflow was selected), -EAGAIN if nothing was + * chosen, other -ve value on other error + */ +__maybe_unused static int bootflow_handle_menu(struct bootstd_priv *std, + bool text_mode, + struct bootflow **bflowp) +{ + struct bootflow *bflow; + int ret; + + ret = bootflow_menu_run(std, text_mode, &bflow); + if (ret) { + if (ret == -EAGAIN) { + printf("Nothing chosen\n"); + std->cur_bootflow = NULL; + } else { + printf("Menu failed (err=%d)\n", ret); + } + + return ret; + } + + printf("Selected: %s\n", bflow->os_name ? bflow->os_name : bflow->name); + std->cur_bootflow = bflow; + *bflowp = bflow; + + return 0; +} + static int do_bootflow_scan(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { @@ -455,18 +493,9 @@ static int do_bootflow_menu(struct cmd_tbl *cmdtp, int flag, int argc, if (ret) return CMD_RET_FAILURE; - ret = bootflow_menu_run(std, text_mode, &bflow); - if (ret) { - if (ret == -EAGAIN) - printf("Nothing chosen\n"); - else { - printf("Menu failed (err=%d)\n", ret); - return CMD_RET_FAILURE; - } - } - - printf("Selected: %s\n", bflow->os_name ? bflow->os_name : bflow->name); - std->cur_bootflow = bflow; + ret = bootflow_handle_menu(std, text_mode, &bflow); + if (ret) + return CMD_RET_FAILURE; return 0; } diff --git a/cmd/remoteproc.c b/cmd/remoteproc.c index ca3b436242..ea8724a187 100644 --- a/cmd/remoteproc.c +++ b/cmd/remoteproc.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * (C) Copyright 2015 - * Texas Instruments Incorporated - http://www.ti.com/ + * Texas Instruments Incorporated - https://www.ti.com/ */ #include <common.h> #include <command.h> @@ -604,7 +604,7 @@ static int do_spi_flash(struct cmd_tbl *cmdtp, int flag, int argc, ret = do_spi_flash_read_write(argc, argv); else if (strcmp(cmd, "erase") == 0) ret = do_spi_flash_erase(argc, argv); - else if (strcmp(cmd, "protect") == 0) + else if (IS_ENABLED(CONFIG_SPI_FLASH_LOCK) && strcmp(cmd, "protect") == 0) ret = do_spi_protect(argc, argv); else if (IS_ENABLED(CONFIG_CMD_SF_TEST) && !strcmp(cmd, "test")) ret = do_spi_flash_test(argc, argv); @@ -629,8 +629,10 @@ U_BOOT_LONGHELP(sf, "sf update addr offset|partition len - erase and write `len' bytes from memory\n" " at `addr' to flash at `offset'\n" " or to start of mtd `partition'\n" +#ifdef CONFIG_SPI_FLASH_LOCK "sf protect lock/unlock sector len - protect/unprotect 'len' bytes starting\n" " at address 'sector'" +#endif #ifdef CONFIG_CMD_SF_TEST "\nsf test offset len - run a very basic destructive test" #endif diff --git a/cmd/ti/Makefile b/cmd/ti/Makefile index 87f85b2c23..5f9c64f598 100644 --- a/cmd/ti/Makefile +++ b/cmd/ti/Makefile @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-2.0+ -# Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ +# Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ obj-$(CONFIG_CMD_DDR3) += ddr3.o obj-$(CONFIG_CMD_PD) += pd.o @@ -2,7 +2,7 @@ /** * ufs.c - UFS specific U-Boot commands * - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com * */ #include <common.h> diff --git a/common/bootstage.c b/common/bootstage.c index a68d883c68..0e6d80718f 100644 --- a/common/bootstage.c +++ b/common/bootstage.c @@ -137,7 +137,7 @@ ulong bootstage_add_record(enum bootstage_id id, const char *name, rec->flags = flags; rec->id = id; } else { - log_warning("Bootstage space exhasuted\n"); + log_warning("Bootstage space exhausted\n"); } } diff --git a/common/spl/Makefile b/common/spl/Makefile index 4f8eb2ec0c..4809f9c3ec 100644 --- a/common/spl/Makefile +++ b/common/spl/Makefile @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0+ # # (C) Copyright 2012 -# Texas Instruments Incorporated - http://www.ti.com/ +# Texas Instruments Incorporated - https://www.ti.com/ # Aneesh V <aneesh@ti.com> # Based on common/Makefile. # diff --git a/configs/ci20_mmc_defconfig b/configs/ci20_mmc_defconfig index 6621ca9add..bf522e1f2f 100644 --- a/configs/ci20_mmc_defconfig +++ b/configs/ci20_mmc_defconfig @@ -47,7 +47,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_VERSION_VARIABLE=y -# CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set CONFIG_JZ4780_EFUSE=y CONFIG_MMC=y diff --git a/configs/eDPU_defconfig b/configs/eDPU_defconfig index f51df7861a..238f91cf6b 100644 --- a/configs/eDPU_defconfig +++ b/configs/eDPU_defconfig @@ -81,6 +81,7 @@ CONFIG_PINCTRL_ARMADA_37XX=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y # CONFIG_SCSI is not set +CONFIG_DEFAULT_ENV_IS_RW=y CONFIG_MVEBU_A3700_UART=y CONFIG_MVEBU_A3700_SPI=y CONFIG_SYSINFO=y diff --git a/configs/icnova-a20-adb4006_defconfig b/configs/icnova-a20-adb4006_defconfig new file mode 100644 index 0000000000..22cbb612e3 --- /dev/null +++ b/configs/icnova-a20-adb4006_defconfig @@ -0,0 +1,21 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-icnova-a20-adb4006" +CONFIG_SPL=y +CONFIG_MACH_SUN7I=y +CONFIG_DRAM_CLK=384 +CONFIG_AHCI=y +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_I2C=y +CONFIG_SCSI_AHCI=y +CONFIG_SYS_64BIT_LBA=y +CONFIG_SYS_I2C_MVTWSI=y +CONFIG_SYS_I2C_SLAVE=0x7f +CONFIG_SYS_I2C_SPEED=400000 +CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y +CONFIG_SUN7I_GMAC=y +CONFIG_AXP_ALDO4_VOLT=2800 +CONFIG_SCSI=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_OHCI_HCD=y diff --git a/configs/mk808_defconfig b/configs/mk808_defconfig index bf851cbd85..70b103261f 100644 --- a/configs/mk808_defconfig +++ b/configs/mk808_defconfig @@ -70,7 +70,6 @@ CONFIG_TPL_OF_PLATDATA=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set CONFIG_TPL_DM=y -# CONFIG_DM_WARN is not set CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y CONFIG_TPL_REGMAP=y diff --git a/configs/mvebu_db-88f3720_defconfig b/configs/mvebu_db-88f3720_defconfig index 829567014f..51518cf8e3 100644 --- a/configs/mvebu_db-88f3720_defconfig +++ b/configs/mvebu_db-88f3720_defconfig @@ -69,6 +69,7 @@ CONFIG_PHY=y CONFIG_MVEBU_COMPHY_SUPPORT=y CONFIG_PINCTRL=y CONFIG_PINCTRL_ARMADA_37XX=y +CONFIG_DEFAULT_ENV_IS_RW=y CONFIG_MVEBU_A3700_UART=y CONFIG_MVEBU_A3700_SPI=y CONFIG_USB=y diff --git a/configs/mvebu_espressobin-88f3720_defconfig b/configs/mvebu_espressobin-88f3720_defconfig index 6c68c239e2..227607acbc 100644 --- a/configs/mvebu_espressobin-88f3720_defconfig +++ b/configs/mvebu_espressobin-88f3720_defconfig @@ -88,6 +88,7 @@ CONFIG_MVEBU_COMPHY_SUPPORT=y CONFIG_PINCTRL=y CONFIG_PINCTRL_ARMADA_37XX=y CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DEFAULT_ENV_IS_RW=y CONFIG_MVEBU_A3700_UART=y CONFIG_MVEBU_A3700_SPI=y CONFIG_USB=y diff --git a/configs/neu2-io-rv1126_defconfig b/configs/neu2-io-rv1126_defconfig index f02c38c566..2fb5a84e76 100644 --- a/configs/neu2-io-rv1126_defconfig +++ b/configs/neu2-io-rv1126_defconfig @@ -17,7 +17,6 @@ CONFIG_FIT_VERBOSE=y CONFIG_DEFAULT_FDT_FILE="rv1126-edgeble-neu2-io.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y -CONFIG_MISC_INIT_R=y CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set diff --git a/configs/nsa325_defconfig b/configs/nsa325_defconfig index 539fcc4ac6..1f05d3b693 100644 --- a/configs/nsa325_defconfig +++ b/configs/nsa325_defconfig @@ -56,7 +56,6 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_VERSION_VARIABLE=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y -# CONFIG_DM_WARN is not set CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_LBA48=y diff --git a/configs/pogo_v4_defconfig b/configs/pogo_v4_defconfig index ff6411d894..101f20f115 100644 --- a/configs/pogo_v4_defconfig +++ b/configs/pogo_v4_defconfig @@ -56,7 +56,6 @@ CONFIG_VERSION_VARIABLE=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y -# CONFIG_DM_WARN is not set CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=1 CONFIG_LBA48=y diff --git a/configs/quartzpro64-rk3588_defconfig b/configs/quartzpro64-rk3588_defconfig new file mode 100644 index 0000000000..85af4c4ff9 --- /dev/null +++ b/configs/quartzpro64-rk3588_defconfig @@ -0,0 +1,71 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 +CONFIG_ARCH_ROCKCHIP=y +CONFIG_TEXT_BASE=0x00a00000 +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000 +CONFIG_DEFAULT_DEVICE_TREE="rk3588-quartzpro64" +CONFIG_ROCKCHIP_RK3588=y +CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y +CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK_R_ADDR=0x600000 +CONFIG_TARGET_QUARTZPRO64_RK3588=y +CONFIG_SPL_STACK=0x400000 +CONFIG_DEBUG_UART_BASE=0xFEB50000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SYS_LOAD_ADDR=0xc00800 +CONFIG_DEBUG_UART=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-quartzpro64.dtb" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x4000000 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK_R=y +CONFIG_SPL_ATF=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_REGULATOR=y +# CONFIG_SPL_DOS_PARTITION is not set +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_LIVE=y +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_SPL_REGMAP=y +CONFIG_SPL_SYSCON=y +CONFIG_SPL_CLK=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_MISC=y +CONFIG_SUPPORT_EMMC_RPMB=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_PHY_REALTEK=y +CONFIG_DWC_ETH_QOS=y +CONFIG_DWC_ETH_QOS_ROCKCHIP=y +CONFIG_REGULATOR_PWM=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_SPL_RAM=y +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550_MEM32=y +CONFIG_SYSRESET=y +CONFIG_ERRNO_STR=y diff --git a/configs/ringneck-px30_defconfig b/configs/ringneck-px30_defconfig index b4666d0e90..b314636b4d 100644 --- a/configs/ringneck-px30_defconfig +++ b/configs/ringneck-px30_defconfig @@ -38,6 +38,7 @@ CONFIG_SPL_PAD_TO=0x0 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x4000000 CONFIG_SPL_BSS_MAX_SIZE=0x4000 +CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set @@ -53,6 +54,7 @@ CONFIG_SPL_ATF=y # CONFIG_CMD_LZMADEC is not set # CONFIG_CMD_UNZIP is not set CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig index 3d5df307d4..f4dbbf36d7 100644 --- a/configs/stm32mp15_dhcom_basic_defconfig +++ b/configs/stm32mp15_dhcom_basic_defconfig @@ -25,6 +25,8 @@ CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0xc2000000 CONFIG_SYS_MEMTEST_START=0xc0000000 CONFIG_SYS_MEMTEST_END=0xc4000000 +CONFIG_HAS_BOARD_SIZE_LIMIT=y +CONFIG_BOARD_SIZE_LIMIT=1441792 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0xc1000000 @@ -76,7 +78,10 @@ CONFIG_CMD_REMOTEPROC=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_CMD_DHCP6=y +CONFIG_CMD_TFTPPUT=y CONFIG_SYS_DISABLE_AUTOLOAD=y +CONFIG_CMD_WGET=y CONFIG_CMD_BOOTCOUNT=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y @@ -101,6 +106,8 @@ CONFIG_IP_DEFRAG=y CONFIG_TFTP_TSIZE=y CONFIG_USE_SERVERIP=y CONFIG_SERVERIP="192.168.1.1" +CONFIG_PROT_TCP_SACK=y +CONFIG_IPV6=y CONFIG_STM32_ADC=y CONFIG_SPL_BLOCK_CACHE=y CONFIG_BOOTCOUNT_LIMIT=y diff --git a/configs/stm32mp15_dhcor_basic_defconfig b/configs/stm32mp15_dhcor_basic_defconfig index 50a8882a07..d4ead98826 100644 --- a/configs/stm32mp15_dhcor_basic_defconfig +++ b/configs/stm32mp15_dhcor_basic_defconfig @@ -23,6 +23,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y # CONFIG_ARMV7_VIRT is not set CONFIG_SYS_LOAD_ADDR=0xc2000000 +CONFIG_HAS_BOARD_SIZE_LIMIT=y +CONFIG_BOARD_SIZE_LIMIT=1441792 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0xc1000000 @@ -74,7 +76,10 @@ CONFIG_CMD_REMOTEPROC=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_CMD_DHCP6=y +CONFIG_CMD_TFTPPUT=y CONFIG_SYS_DISABLE_AUTOLOAD=y +CONFIG_CMD_WGET=y CONFIG_CMD_BOOTCOUNT=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y @@ -99,6 +104,8 @@ CONFIG_IP_DEFRAG=y CONFIG_TFTP_TSIZE=y CONFIG_USE_SERVERIP=y CONFIG_SERVERIP="192.168.1.1" +CONFIG_PROT_TCP_SACK=y +CONFIG_IPV6=y CONFIG_STM32_ADC=y CONFIG_SPL_BLOCK_CACHE=y CONFIG_BOOTCOUNT_LIMIT=y diff --git a/configs/uDPU_defconfig b/configs/uDPU_defconfig index 988f9ed0d8..d3f146674e 100644 --- a/configs/uDPU_defconfig +++ b/configs/uDPU_defconfig @@ -81,6 +81,7 @@ CONFIG_PINCTRL_ARMADA_37XX=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y # CONFIG_SCSI is not set +CONFIG_DEFAULT_ENV_IS_RW=y CONFIG_MVEBU_A3700_UART=y CONFIG_MVEBU_A3700_SPI=y CONFIG_SYSINFO=y diff --git a/configs/xilinx_versal_mini_defconfig b/configs/xilinx_versal_mini_defconfig index d6d6dc1664..222da5aaa3 100644 --- a/configs/xilinx_versal_mini_defconfig +++ b/configs/xilinx_versal_mini_defconfig @@ -59,7 +59,6 @@ CONFIG_SYS_ALT_MEMTEST=y # CONFIG_CMD_SLEEP is not set CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set -# CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set # CONFIG_MMC is not set CONFIG_ARM_DCC=y diff --git a/configs/xilinx_versal_mini_emmc0_defconfig b/configs/xilinx_versal_mini_emmc0_defconfig index 858bb35e00..1d73790c0e 100644 --- a/configs/xilinx_versal_mini_emmc0_defconfig +++ b/configs/xilinx_versal_mini_emmc0_defconfig @@ -57,7 +57,6 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_OF_EMBED=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set -# CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ZYNQ=y diff --git a/configs/xilinx_versal_mini_emmc1_defconfig b/configs/xilinx_versal_mini_emmc1_defconfig index 2488edea41..747f20d319 100644 --- a/configs/xilinx_versal_mini_emmc1_defconfig +++ b/configs/xilinx_versal_mini_emmc1_defconfig @@ -57,7 +57,6 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_OF_EMBED=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set -# CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ZYNQ=y diff --git a/configs/xilinx_versal_mini_ospi_defconfig b/configs/xilinx_versal_mini_ospi_defconfig index 389ca50703..96be5b92b9 100644 --- a/configs/xilinx_versal_mini_ospi_defconfig +++ b/configs/xilinx_versal_mini_ospi_defconfig @@ -51,12 +51,12 @@ CONFIG_SYS_PROMPT="Versal> " # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set # CONFIG_NET is not set -# CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set # CONFIG_MMC is not set CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_SOFT_RESET=y CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y +# CONFIG_SPI_FLASH_LOCK is not set CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_ISSI=y CONFIG_SPI_FLASH_MACRONIX=y diff --git a/configs/xilinx_versal_mini_qspi_defconfig b/configs/xilinx_versal_mini_qspi_defconfig index 5724aa3040..7181b89a65 100644 --- a/configs/xilinx_versal_mini_qspi_defconfig +++ b/configs/xilinx_versal_mini_qspi_defconfig @@ -53,7 +53,6 @@ CONFIG_SYS_PROMPT="Versal> " # CONFIG_CMD_SETEXPR is not set # CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG is not set # CONFIG_NET is not set -# CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set # CONFIG_GPIO is not set # CONFIG_I2C is not set @@ -61,6 +60,7 @@ CONFIG_SYS_PROMPT="Versal> " # CONFIG_MMC is not set CONFIG_DM_SPI_FLASH=y # CONFIG_SPI_FLASH_SMART_HWCAPS is not set +# CONFIG_SPI_FLASH_LOCK is not set # CONFIG_SPI_FLASH_UNLOCK_ALL is not set CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_ISSI=y diff --git a/configs/xilinx_versal_net_mini_defconfig b/configs/xilinx_versal_net_mini_defconfig index 3f45630a11..7dac1ec54e 100644 --- a/configs/xilinx_versal_net_mini_defconfig +++ b/configs/xilinx_versal_net_mini_defconfig @@ -62,7 +62,6 @@ CONFIG_CMD_CACHE=y CONFIG_OF_EMBED=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set -# CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set # CONFIG_GPIO is not set # CONFIG_I2C is not set diff --git a/configs/xilinx_versal_net_mini_emmc_defconfig b/configs/xilinx_versal_net_mini_emmc_defconfig index 1d79eff331..fc88eee10a 100644 --- a/configs/xilinx_versal_net_mini_emmc_defconfig +++ b/configs/xilinx_versal_net_mini_emmc_defconfig @@ -51,7 +51,6 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_OF_EMBED=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set -# CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set CONFIG_MMC_HS200_SUPPORT=y CONFIG_MMC_SDHCI=y diff --git a/configs/xilinx_versal_net_mini_ospi_defconfig b/configs/xilinx_versal_net_mini_ospi_defconfig index 0656b23ae1..1ba6e0871b 100644 --- a/configs/xilinx_versal_net_mini_ospi_defconfig +++ b/configs/xilinx_versal_net_mini_ospi_defconfig @@ -50,12 +50,12 @@ CONFIG_SYS_PROMPT="Versal NET> " # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set # CONFIG_NET is not set -# CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set # CONFIG_MMC is not set CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_SOFT_RESET=y CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y +# CONFIG_SPI_FLASH_LOCK is not set CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_ISSI=y CONFIG_SPI_FLASH_MACRONIX=y diff --git a/configs/xilinx_versal_net_mini_qspi_defconfig b/configs/xilinx_versal_net_mini_qspi_defconfig index c0e9ba9f76..c9497bb6c2 100644 --- a/configs/xilinx_versal_net_mini_qspi_defconfig +++ b/configs/xilinx_versal_net_mini_qspi_defconfig @@ -52,7 +52,6 @@ CONFIG_SYS_PROMPT="Versal NET> " # CONFIG_CMD_SETEXPR is not set # CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG is not set # CONFIG_NET is not set -# CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set # CONFIG_GPIO is not set # CONFIG_I2C is not set @@ -60,6 +59,7 @@ CONFIG_SYS_PROMPT="Versal NET> " # CONFIG_MMC is not set CONFIG_DM_SPI_FLASH=y # CONFIG_SPI_FLASH_SMART_HWCAPS is not set +# CONFIG_SPI_FLASH_LOCK is not set # CONFIG_SPI_FLASH_UNLOCK_ALL is not set CONFIG_SPI_FLASH_ISSI=y CONFIG_SPI_FLASH_MACRONIX=y diff --git a/configs/xilinx_versal_net_virt_defconfig b/configs/xilinx_versal_net_virt_defconfig index ccc9431ca8..0553ac6b17 100644 --- a/configs/xilinx_versal_net_virt_defconfig +++ b/configs/xilinx_versal_net_virt_defconfig @@ -85,6 +85,7 @@ CONFIG_MMC_IO_VOLTAGE=y CONFIG_MMC_UHS_SUPPORT=y CONFIG_MMC_HS400_SUPPORT=y CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ADMA=y CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_ZYNQ_SDHCI_MIN_FREQ=100000 CONFIG_MTD=y diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig index b588887fa3..6a2c03ccdd 100644 --- a/configs/xilinx_versal_virt_defconfig +++ b/configs/xilinx_versal_virt_defconfig @@ -6,6 +6,7 @@ CONFIG_ARCH_VERSAL=y CONFIG_TEXT_BASE=0x8000000 CONFIG_SYS_MALLOC_F_LEN=0x100000 CONFIG_NR_DRAM_BANKS=36 +CONFIG_SF_DEFAULT_SPEED=30000000 CONFIG_DEFAULT_DEVICE_TREE="xilinx-versal-virt" CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_DM_RESET=y diff --git a/configs/xilinx_zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig index 817fb4142d..c3ee9beaef 100644 --- a/configs/xilinx_zynq_virt_defconfig +++ b/configs/xilinx_zynq_virt_defconfig @@ -126,6 +126,8 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_SPI_FLASH_WINBOND=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_SPI_FLASH_MTD=y CONFIG_PHY_MARVELL=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y diff --git a/configs/xilinx_zynqmp_mini_defconfig b/configs/xilinx_zynqmp_mini_defconfig index fc768b613a..694fa1123e 100644 --- a/configs/xilinx_zynqmp_mini_defconfig +++ b/configs/xilinx_zynqmp_mini_defconfig @@ -55,7 +55,6 @@ CONFIG_CMD_CACHE=y CONFIG_OF_EMBED=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set -# CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set # CONFIG_DM_MAILBOX is not set # CONFIG_MMC is not set diff --git a/configs/xilinx_zynqmp_mini_emmc0_defconfig b/configs/xilinx_zynqmp_mini_emmc0_defconfig index 72b1ad4660..f81b772c4c 100644 --- a/configs/xilinx_zynqmp_mini_emmc0_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc0_defconfig @@ -66,7 +66,6 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set -# CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set CONFIG_SPL_DM_SEQ_ALIAS=y # CONFIG_DM_MAILBOX is not set diff --git a/configs/xilinx_zynqmp_mini_emmc1_defconfig b/configs/xilinx_zynqmp_mini_emmc1_defconfig index 310aad445a..6501ec3a06 100644 --- a/configs/xilinx_zynqmp_mini_emmc1_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc1_defconfig @@ -66,7 +66,6 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set -# CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set CONFIG_SPL_DM_SEQ_ALIAS=y # CONFIG_DM_MAILBOX is not set diff --git a/configs/xilinx_zynqmp_mini_nand_defconfig b/configs/xilinx_zynqmp_mini_nand_defconfig index ce224f80ec..bfe93dc965 100644 --- a/configs/xilinx_zynqmp_mini_nand_defconfig +++ b/configs/xilinx_zynqmp_mini_nand_defconfig @@ -51,7 +51,6 @@ CONFIG_SYS_PBSIZE=1049 CONFIG_OF_EMBED=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set -# CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set # CONFIG_DM_MAILBOX is not set # CONFIG_MMC is not set diff --git a/configs/xilinx_zynqmp_mini_nand_single_defconfig b/configs/xilinx_zynqmp_mini_nand_single_defconfig index ce23cb1d01..91f5aa24bd 100644 --- a/configs/xilinx_zynqmp_mini_nand_single_defconfig +++ b/configs/xilinx_zynqmp_mini_nand_single_defconfig @@ -51,7 +51,6 @@ CONFIG_SYS_PBSIZE=1049 CONFIG_OF_EMBED=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set -# CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set # CONFIG_DM_MAILBOX is not set # CONFIG_MMC is not set diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig index b044743474..afbf6f6934 100644 --- a/configs/xilinx_zynqmp_mini_qspi_defconfig +++ b/configs/xilinx_zynqmp_mini_qspi_defconfig @@ -69,7 +69,6 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set -# CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set CONFIG_SPL_DM_SEQ_ALIAS=y # CONFIG_FIRMWARE is not set @@ -79,6 +78,7 @@ CONFIG_SPL_DM_SEQ_ALIAS=y # CONFIG_DM_MAILBOX is not set # CONFIG_MMC is not set # CONFIG_SPI_FLASH_SMART_HWCAPS is not set +# CONFIG_SPI_FLASH_LOCK is not set # CONFIG_SPI_FLASH_UNLOCK_ALL is not set CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_ISSI=y diff --git a/configs/xtfpga_defconfig b/configs/xtfpga_defconfig index cbe7cdb829..fc5b66695d 100644 --- a/configs/xtfpga_defconfig +++ b/configs/xtfpga_defconfig @@ -32,7 +32,6 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_VERSION_VARIABLE=y -# CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set # CONFIG_DM_STDIO is not set # CONFIG_DM_SEQ_ALIAS is not set diff --git a/configs/zynq_cse_nand_defconfig b/configs/zynq_cse_nand_defconfig index 2eb45e1242..f7b75812b4 100644 --- a/configs/zynq_cse_nand_defconfig +++ b/configs/zynq_cse_nand_defconfig @@ -71,7 +71,6 @@ CONFIG_OF_EMBED=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set -# CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set CONFIG_SPL_DM_SEQ_ALIAS=y # CONFIG_MMC is not set diff --git a/configs/zynq_cse_nor_defconfig b/configs/zynq_cse_nor_defconfig index c5a28f28b9..2a50f38998 100644 --- a/configs/zynq_cse_nor_defconfig +++ b/configs/zynq_cse_nor_defconfig @@ -70,7 +70,6 @@ CONFIG_OF_EMBED=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set -# CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set CONFIG_SPL_DM_SEQ_ALIAS=y # CONFIG_MMC is not set diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig index 9a2770af20..db1fc532d1 100644 --- a/configs/zynq_cse_qspi_defconfig +++ b/configs/zynq_cse_qspi_defconfig @@ -79,7 +79,6 @@ CONFIG_OF_EMBED=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set -# CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set CONFIG_SPL_DM_SEQ_ALIAS=y # CONFIG_MMC is not set diff --git a/doc/README.davinci b/doc/README.davinci index f368f99a41..ea81279a0f 100644 --- a/doc/README.davinci +++ b/doc/README.davinci @@ -70,7 +70,7 @@ http://www.logicpd.com/products/development-kits/zoom-omap-l138-evm-development- 2) TI OMAP-L138 LCDK http://focus.ti.com/docs/prod/folders/print/omap-l138.html -http://www.ti.com/tool/TMDXLCDK138 +https://www.ti.com/tool/TMDXLCDK138 Davinci special defines ======================= diff --git a/doc/README.omap3 b/doc/README.omap3 index 3a1ac8101d..d1e6be94a1 100644 --- a/doc/README.omap3 +++ b/doc/README.omap3 @@ -163,8 +163,8 @@ Links [1] OMAP3: -http://www.ti.com/omap3 (high volume) and -http://www.ti.com/omap35x (broad market) +https://www.ti.com/omap3 (high volume) and +https://www.ti.com/omap35x (broad market) [2] OMAP3530 BeagleBoard: diff --git a/doc/README.serial_dt_baud b/doc/README.serial_dt_baud new file mode 100644 index 0000000000..f8768d0e1b --- /dev/null +++ b/doc/README.serial_dt_baud @@ -0,0 +1,41 @@ +Fetch serial baudrate from DT +----------------------------- + +To support fetching of baudrate from DT, the following is done:- + +The baudrate configured in Kconfig symbol CONFIG_BAUDRATE is taken by default by serial. +If change of baudrate is required then the Kconfig symbol CONFIG_BAUDRATE needs to +changed and U-Boot recompilation is required or the U-Boot environment needs to be updated. + +To avoid this, add support to fetch the baudrate directly from the device tree file and +update the environment. + +The default environment stores the default baudrate value. When default baudrate and dtb +baudrate are not same glitches are seen on the serial. +So, the environment also needs to be updated with the dtb baudrate to avoid the glitches on +the serial which is enabled by OF_SERIAL_BAUD. + +The Kconfig SPL_ENV_SUPPORT needs to be enabled to allow patching in SPL. + +The Kconfig DEFAULT_ENV_IS_RW which is enabled by OF_SERIAL_BAUD with making the environment +writable. + +The ofnode_read_baud() function parses and fetches the baudrate value from the DT. This value +is validated and updated to baudrate during serial init. Padding is added at the end of the +default environment and the dt baudrate is updated with the latest value. + +Example:- + +The serial port options are of the form "bbbbpnf", where "bbbb" is the baud rate, "p" is parity ("n", "o", or "e"), +"n" is number of bits, and "f" is flow control ("r" for RTS or omit it). Default is "115200n8". + +chosen { + bootargs = "earlycon console=ttyPS0,115200 clk_ignore_unused root=/dev/ram0 rw init_fatal_sh=1"; + stdout-path = "serial0:115200n8"; + }; + +From the chosen node, stdout-path property is obtained as string. + + stdout-path = "serial0:115200n8"; + +The string is parsed to get the baudrate 115200. This string is converted to integer and updated to the environment. diff --git a/doc/arch/arm64.ffa.rst b/doc/arch/arm64.ffa.rst index 4ecdc31716..f966f8ba6a 100644 --- a/doc/arch/arm64.ffa.rst +++ b/doc/arch/arm64.ffa.rst @@ -40,7 +40,7 @@ The U-Boot FF-A support provides the following parts: - Sandbox FF-A test cases. FF-A and SMC specifications -------------------------------------------- +--------------------------- The current implementation of the U-Boot FF-A support relies on `FF-A v1.0 specification`_ and uses SMC32 calling convention which @@ -56,12 +56,12 @@ Hypervisors are supported if they are configured to trap SMC calls. The FF-A support uses 64-bit registers as per `SMC Calling Convention v1.2 specification`_. Supported hardware --------------------------------- +------------------ Aarch64 plaforms Configuration ----------------------- +------------- CONFIG_ARM_FFA_TRANSPORT Enables the FF-A support. Turn this on if you want to use FF-A @@ -70,7 +70,7 @@ CONFIG_ARM_FFA_TRANSPORT When using sandbox, the sandbox FF-A emulator and FF-A sandbox driver will be used. FF-A ABIs under the hood ---------------------------------------- +------------------------ Invoking an FF-A ABI involves providing to the secure world/hypervisor the expected arguments from the ABI. @@ -89,7 +89,7 @@ The driver reads the response and processes it accordingly. This methodology applies to all the FF-A ABIs. FF-A bus discovery on Arm 64-bit platforms ---------------------------------------------- +------------------------------------------ When CONFIG_ARM_FFA_TRANSPORT is enabled, the FF-A bus is considered as an architecture feature and discovered using ARM_SMCCC_FEATURES mechanism. @@ -136,7 +136,7 @@ When one of the above actions fails, probing fails and the driver stays not acti and can be probed again if needed. Requirements for clients -------------------------------------- +------------------------ When using the FF-A bus with EFI, clients must query the SPs they are looking for during EFI boot-time mode using the service UUID. @@ -159,13 +159,13 @@ the 32-bit or 64-bit version of FFA_MSG_SEND_DIRECT_{REQ, RESP}. The calling convention between U-Boot and the secure world stays the same: SMC32. Requirements for user drivers -------------------------------------- +----------------------------- Users who want to implement their custom FF-A device driver while reusing the FF-A Uclass can do so by implementing their own invoke_ffa_fn() in the user driver. The bus driver layer ------------------------------- +-------------------- FF-A support comes on top of the SMCCC layer and is implemented by the FF-A Uclass drivers/firmware/arm-ffa/arm-ffa-uclass.c @@ -210,7 +210,7 @@ The following features are provided: - FF-A bus can be compiled and used without EFI Relationship between the sandbox emulator and the FF-A device ---------------------------------------------------------------- +------------------------------------------------------------- :: @@ -222,7 +222,7 @@ Relationship between the sandbox emulator and the FF-A device ffa 0 [ ] sandbox_arm_ffa `-- sandbox-arm-ffa The armffa command ------------------------------------ +------------------ armffa is a command showcasing how to use the FF-A bus and how to invoke the driver operations. diff --git a/doc/board/AndesTech/ae350.rst b/doc/board/AndesTech/ae350.rst index 42a2b4d0b5..99622fd325 100644 --- a/doc/board/AndesTech/ae350.rst +++ b/doc/board/AndesTech/ae350.rst @@ -1,7 +1,7 @@ .. SPDX-License-Identifier: GPL-2.0+ AE350 -====== +===== AE350 is the mainline SoC produced by Andes Technology using AndesV5 CPU core based on RISC-V architecture. diff --git a/doc/board/actions/cubieboard7.rst b/doc/board/actions/cubieboard7.rst index 74f2b12e41..1f73fc40f8 100644 --- a/doc/board/actions/cubieboard7.rst +++ b/doc/board/actions/cubieboard7.rst @@ -20,7 +20,7 @@ Though, one can enter ADFU mode and flash debian image(from host machine) where getting into u-boot prompt is easy. Enter ADFU Mode ----------------- +--------------- Before write the firmware, let the development board entering the ADFU mode: insert one end of the USB cable to the PC, press and hold the ADFU button, and then connect @@ -28,7 +28,7 @@ the other end of the USB cable to the Mini USB port of the development board, re the ADFU button, after connecting it will enter the ADFU mode. Check whether entered ADFU Mode --------------------------------- +------------------------------- The user needs to run the following command on the PC side to check if the ADFU device is detected. ID realted to "Actions Semiconductor Co., Ltd" means that diff --git a/doc/board/actions/index.rst b/doc/board/actions/index.rst index c596879158..e925fcd0f6 100644 --- a/doc/board/actions/index.rst +++ b/doc/board/actions/index.rst @@ -2,7 +2,7 @@ .. Copyright (C) 2020 Amit Singh Tomar <amittomer25@gmail.com> Actions -======== +======= .. toctree:: :maxdepth: 2 diff --git a/doc/board/armltd/index.rst b/doc/board/armltd/index.rst index fc1d75aac2..052a9698f4 100644 --- a/doc/board/armltd/index.rst +++ b/doc/board/armltd/index.rst @@ -1,7 +1,7 @@ .. SPDX-License-Identifier: GPL-2.0 Arm Ltd -============= +======= .. toctree:: :maxdepth: 2 diff --git a/doc/board/mediatek/index.rst b/doc/board/mediatek/index.rst index 38cd8cb5b2..c55d5aeb5c 100644 --- a/doc/board/mediatek/index.rst +++ b/doc/board/mediatek/index.rst @@ -1,7 +1,7 @@ .. SPDX-License-Identifier: GPL-2.0+ Mediatek -========= +======== .. toctree:: :maxdepth: 2 diff --git a/doc/board/nxp/imx8mm_evk.rst b/doc/board/nxp/imx8mm_evk.rst index 327ce6e49c..bb11029fbc 100644 --- a/doc/board/nxp/imx8mm_evk.rst +++ b/doc/board/nxp/imx8mm_evk.rst @@ -36,7 +36,7 @@ Get the ddr firmware $ cp firmware-imx-8.9/firmware/ddr/synopsys/lpddr4*.bin $(builddir) Build U-Boot for sd card --------------------------- +------------------------ .. code-block:: bash @@ -54,8 +54,8 @@ Boot ---- Set Boot switch to SD boot -Build U-Boot for qspi flash card ------------------------------------- +Build U-Boot for qspi flash card +-------------------------------- .. code-block:: bash @@ -81,7 +81,8 @@ From sd card to memory $ sf write $loadaddr 0x00 <size_of_flash.bin_in_hex> Boot from QSPI Flash ------------------------ +-------------------- + Set Boot Switch to QSPI Flash Pin configuration for imx8mm_revC evk to boot from qspi flash diff --git a/doc/board/nxp/ls1046ardb.rst b/doc/board/nxp/ls1046ardb.rst index 49b4842b30..8c0bc82dde 100644 --- a/doc/board/nxp/ls1046ardb.rst +++ b/doc/board/nxp/ls1046ardb.rst @@ -54,7 +54,7 @@ LS1046ARDB board Overview - ARM JTAG support Memory map from core's view ----------------------------- +--------------------------- ================== ================== ================ ===== Start Address End Address Description Size diff --git a/doc/board/nxp/mx6ul_14x14_evk.rst b/doc/board/nxp/mx6ul_14x14_evk.rst index 3e57ba1ee8..c135a21bf5 100644 --- a/doc/board/nxp/mx6ul_14x14_evk.rst +++ b/doc/board/nxp/mx6ul_14x14_evk.rst @@ -4,7 +4,7 @@ mx6ul_14x14_evk =============== How to use U-Boot on Freescale MX6UL 14x14 EVK ------------------------------------------------ +---------------------------------------------- - Build U-Boot for MX6UL 14x14 EVK: diff --git a/doc/board/openpiton/riscv64.rst b/doc/board/openpiton/riscv64.rst index 3a97793f07..c379fbf9ff 100644 --- a/doc/board/openpiton/riscv64.rst +++ b/doc/board/openpiton/riscv64.rst @@ -11,14 +11,14 @@ OpenPiton has been verified in both ASIC and multiple Xilinx FPGA prototypes running full-stack Debian linux. RISC-V Standard Bootflow -------------------------- +------------------------ Currently, OpenPiton implements RISC-V standard bootflow in the following steps mover.S -> u-boot-spl -> opensbi -> u-boot -> Linux This board supports S-mode u-boot as well as M-mode SPL Building OpenPition ---------------------- +------------------- If you'd like to build OpenPiton, please go to OpenPiton github repo (at https://github.com/PrincetonUniversity/openpiton) to build from the latest diff --git a/doc/board/purism/librem5.rst b/doc/board/purism/librem5.rst index fb050c6302..a7975e1659 100644 --- a/doc/board/purism/librem5.rst +++ b/doc/board/purism/librem5.rst @@ -1,7 +1,7 @@ .. SPDX-License-Identifier: GPL-2.0+ Librem5 -========== +======= U-Boot for the Purism Librem5 phone diff --git a/doc/board/qualcomm/sdm845.rst b/doc/board/qualcomm/sdm845.rst index d3f218e835..a65f00df39 100644 --- a/doc/board/qualcomm/sdm845.rst +++ b/doc/board/qualcomm/sdm845.rst @@ -2,10 +2,11 @@ .. sectionauthor:: Dzmitry Sankouski <dsankouski@gmail.com> Snapdragon 845 -================ +============== About this ---------- + This document describes the information about Qualcomm Snapdragon 845 supported boards and it's usage steps. @@ -17,8 +18,10 @@ Qualcomm's UEFI-based ABL (Android) Bootloader. Installation ------------ + Build ^^^^^ + Setup ``CROSS_COMPILE`` for aarch64 and build U-Boot for your board:: $ export CROSS_COMPILE=<aarch64 toolchain prefix> @@ -29,10 +32,12 @@ This will build ``u-boot.bin`` in the configured output directory. Generate FIT image ^^^^^^^^^^^^^^^^^^ + See doc/uImage.FIT for more details Pack android boot image ^^^^^^^^^^^^^^^^^^^^^^^ + We'll assemble android boot image with ``u-boot.bin`` instead of linux kernel, and FIT image instead of ``initramfs``. Android bootloader expect gzipped kernel with appended dtb, so let's mimic linux to satisfy stock bootloader. diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst index ffbebd0bb3..18d0b6f089 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -116,6 +116,7 @@ List of mainline supported Rockchip boards: - Edgeble Neural Compute Module 6A SoM - Neu6a (neu6a-io-rk3588) - Edgeble Neural Compute Module 6B SoM - Neu6b (neu6b-io-rk3588) - FriendlyElec NanoPC-T6 (nanopc-t6-rk3588) + - Pine64 QuartzPro64 (quartzpro64-rk3588) - Radxa ROCK 5A (rock5a-rk3588s) - Radxa ROCK 5B (rock5b-rk3588) - Xunlong Orange Pi 5 (orangepi-5-rk3588s) diff --git a/doc/board/samsung/index.rst b/doc/board/samsung/index.rst index c904372dff..971805e201 100644 --- a/doc/board/samsung/index.rst +++ b/doc/board/samsung/index.rst @@ -1,7 +1,7 @@ .. SPDX-License-Identifier: GPL-2.0+ Samsung -======== +======= .. toctree:: :maxdepth: 2 diff --git a/doc/board/st/st-dt.rst b/doc/board/st/st-dt.rst index 67e16ef165..2a285c8180 100644 --- a/doc/board/st/st-dt.rst +++ b/doc/board/st/st-dt.rst @@ -2,7 +2,7 @@ .. sectionauthor:: Patrick Delaunay <patrick.delaunay@foss.st.com> U-Boot device tree bindings ----------------------------- +--------------------------- The U-Boot specific bindings are defined in the U-Boot directory: doc/device-tree-bindings diff --git a/doc/board/st/stm32_MCU.rst b/doc/board/st/stm32_MCU.rst index 7ff7c730fa..61650bc801 100644 --- a/doc/board/st/stm32_MCU.rst +++ b/doc/board/st/stm32_MCU.rst @@ -2,7 +2,7 @@ .. sectionauthor:: Patrice Chotard <patrice.chotardy@foss.st.com> STM32 MCU boards -================= +================ This is a quick instruction for setup STM32 MCU boards. diff --git a/doc/board/starfive/visionfive2.rst b/doc/board/starfive/visionfive2.rst index 9ee758e56c..6cb033ead0 100644 --- a/doc/board/starfive/visionfive2.rst +++ b/doc/board/starfive/visionfive2.rst @@ -4,7 +4,8 @@ StarFive VisionFive2 ==================== JH7110 RISC-V SoC ---------------------- +----------------- + The JH7110 is 4+1 64-bit RISC-V SoC from StarFive. The StarFive VisionFive2 development platform is based on JH7110 and capable diff --git a/doc/board/thead/index.rst b/doc/board/thead/index.rst index 41566d3a36..2c4b3fb8cb 100644 --- a/doc/board/thead/index.rst +++ b/doc/board/thead/index.rst @@ -1,7 +1,7 @@ .. SPDX-License-Identifier: GPL-2.0+ T-HEAD -======== +====== .. toctree:: :maxdepth: 1 diff --git a/doc/board/ti/am335x_evm.rst b/doc/board/ti/am335x_evm.rst index 2ba651eb6d..7a3125d705 100644 --- a/doc/board/ti/am335x_evm.rst +++ b/doc/board/ti/am335x_evm.rst @@ -59,7 +59,7 @@ from Texas Instruments. The tools used to generate boot images for secure devices are part of a secure development package (SECDEV) that can be downloaded from: - http://www.ti.com/mysecuresoftware (login required) + https://www.ti.com/mysecuresoftware (login required) The secure development package is access controlled due to NDA and export control restrictions. Access must be requested and granted by TI before the @@ -84,8 +84,7 @@ bootable image was not created. Within the SECDEV package exists an image creation script: -.. prompt:: bash - :prompts: $ +.. prompt:: bash $ ${TI_SECURE_DEV_PKG}/scripts/create-boot-image.sh @@ -97,8 +96,7 @@ possible. The script is basically the only required interface to the TI SECDEV package for creating a bootable SPL image for secure TI devices. -.. prompt:: bash - :prompts: $ +.. prompt:: bash $ create-boot-image.sh \ <IMAGE_FLAG> <INPUT_FILE> <OUTPUT_FILE> <SPL_LOAD_ADDR> @@ -184,8 +182,7 @@ The exact details of the how the images are secured is handled by the SECDEV package. Within the SECDEV package exists a script to process an input binary image: -.. prompt:: bash - :prompts: $ +.. prompt:: bash $ ${TI_SECURE_DEV_PKG}/scripts/secure-binary-image.sh @@ -206,8 +203,7 @@ only accessible when the ARM core is operating in the secure mode). Invoking the secure-binary-image script for Secure Devices ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ -.. prompt:: bash - :prompts: $ +.. prompt:: bash $ secure-binary-image.sh <INPUT_FILE> <OUTPUT_FILE> @@ -247,8 +243,7 @@ into memory, then written to NAND. 2. Flashing NAND via MMC/SD -.. prompt:: bash - :prompts: => +.. prompt:: bash => # select BOOTSEL to MMC/SD boot and boot from MMC/SD card mmc rescan @@ -334,8 +329,7 @@ had a FAT partition (such as on a Beaglebone Black) it is not enough to write garbage into the area, you must delete it from the partition table first. -.. prompt:: bash - :prompts: => +.. prompt:: bash => # Ensure we are able to talk with this mmc device mmc rescan @@ -366,8 +360,7 @@ the FAT filesystem (only the uImage MUST be for this to function afterwards) along with a Falcon Mode aware MLO and the FAT partition has already been created and marked bootable: -.. prompt:: bash - :prompts: => +.. prompt:: bash => mmc rescan # Load kernel and device tree into memory, perform export @@ -386,8 +379,7 @@ This will print a number of lines and then end with something like: So then you: -.. prompt:: bash - :prompts: => +.. prompt:: bash => fatwrite mmc 0:1 0x80f80000 args 8928 @@ -400,8 +392,7 @@ already located on the NAND somewhere (such as filesystem or mtd partition) along with a Falcon Mode aware MLO written to the correct locations for booting and mtdparts have been configured correctly for the board: -.. prompt:: bash - :prompts: => +.. prompt:: bash => nand read ${loadaddr} kernel load nand rootfs ${fdtaddr} /boot/am335x-evm.dtb @@ -425,8 +416,7 @@ The output of the 'dm tree' command shows which driver is bound to which device, so the user can easily configure their platform differently from the command line: -.. prompt:: bash - :prompts: => +.. prompt:: bash => dm tree @@ -444,8 +434,7 @@ the command line: Typically here any network command performed using the usb_ether interface would work, while using other gadgets would fail: -.. prompt:: bash - :prompts: => +.. prompt:: bash => fastboot usb 0 @@ -462,8 +451,7 @@ least from a bootloader point of view). The solution here would be to use the unbind command specifying the class and index parameters (as shown above in the 'dm tree' output) to target the driver to unbind: -.. prompt:: bash - :prompts: => +.. prompt:: bash => unbind ethernet 1 @@ -471,8 +459,7 @@ The output of the 'dm tree' command now shows the availability of the first USB device controller, the fastboot gadget will now be able to bind with it: -.. prompt:: bash - :prompts: => +.. prompt:: bash => dm tree diff --git a/doc/board/ti/am62x_beagleplay.rst b/doc/board/ti/am62x_beagleplay.rst index 39913b29ab..44e728de21 100644 --- a/doc/board/ti/am62x_beagleplay.rst +++ b/doc/board/ti/am62x_beagleplay.rst @@ -55,22 +55,22 @@ Set the variables corresponding to this platform: .. include:: k3.rst :start-after: .. k3_rst_include_start_common_env_vars_defn :end-before: .. k3_rst_include_end_common_env_vars_defn -.. code-block:: bash +.. prompt:: bash $ - $ export UBOOT_CFG_CORTEXR="am62x_evm_r5_defconfig beagleplay_r5.config" - $ export UBOOT_CFG_CORTEXA="am62x_evm_a53_defconfig beagleplay_a53.config" - $ export TFA_BOARD=lite - $ # we dont use any extra TFA parameters - $ unset TFA_EXTRA_ARGS - $ export OPTEE_PLATFORM=k3-am62x - $ export OPTEE_EXTRA_ARGS="CFG_WITH_SOFTWARE_PRNG=y" + export UBOOT_CFG_CORTEXR="am62x_evm_r5_defconfig beagleplay_r5.config" + export UBOOT_CFG_CORTEXA="am62x_evm_a53_defconfig beagleplay_a53.config" + export TFA_BOARD=lite + # we dont use any extra TFA parameters + unset TFA_EXTRA_ARGS + export OPTEE_PLATFORM=k3-am62x + export OPTEE_EXTRA_ARGS="CFG_WITH_SOFTWARE_PRNG=y" .. include:: am62x_sk.rst :start-after: .. am62x_evm_rst_include_start_build_steps :end-before: .. am62x_evm_rst_include_end_build_steps Target Images --------------- +------------- Copy the below images to an SD card and boot: * tiboot3-am62x-gp-evm.bin from R5 build as tiboot3.bin @@ -109,7 +109,7 @@ There are multiple storage media options on BeaglePlay, but primarily: depends on the SD card quality. Flash to uSD card or how to deal with "bricked" Board --------------------------------------------------------- +----------------------------------------------------- When deploying or working on Linux, it's common to use the onboard eMMC. However, avoiding the eMMC and using the uSD card is safer when @@ -174,24 +174,24 @@ boot1 partition depends on A/B update requirements. The following are the steps from Linux shell to program eMMC: -.. code-block:: bash +.. prompt:: bash # - # # Enable Boot0 boot - # mmc bootpart enable 1 2 /dev/mmcblk0 - # mmc bootbus set single_backward x1 x8 /dev/mmcblk0 - # mmc hwreset enable /dev/mmcblk0 + # Enable Boot0 boot + mmc bootpart enable 1 2 /dev/mmcblk0 + mmc bootbus set single_backward x1 x8 /dev/mmcblk0 + mmc hwreset enable /dev/mmcblk0 - # # Clear eMMC boot0 - # echo '0' >> /sys/class/block/mmcblk0boot0/force_ro - # dd if=/dev/zero of=/dev/mmcblk0boot0 count=32 bs=128k - # # Write tiboot3.bin - # dd if=tiboot3.bin of=/dev/mmcblk0boot0 bs=128k + # Clear eMMC boot0 + echo '0' >> /sys/class/block/mmcblk0boot0/force_ro + dd if=/dev/zero of=/dev/mmcblk0boot0 count=32 bs=128k + # Write tiboot3.bin + dd if=tiboot3.bin of=/dev/mmcblk0boot0 bs=128k - # # Copy the rest of the boot binaries - # mount /dev/mmcblk0p1 /boot/firmware - # cp tispl.bin /boot/firmware - # cp u-boot.img /boot/firmware - # sync + # Copy the rest of the boot binaries + mount /dev/mmcblk0p1 /boot/firmware + cp tispl.bin /boot/firmware + cp u-boot.img /boot/firmware + sync .. warning :: diff --git a/doc/board/ti/am62x_sk.rst b/doc/board/ti/am62x_sk.rst index d7437c6d22..b12dc85f06 100644 --- a/doc/board/ti/am62x_sk.rst +++ b/doc/board/ti/am62x_sk.rst @@ -2,7 +2,7 @@ .. sectionauthor:: Vignesh Raghavendra <vigneshr@ti.com> AM62 Platforms -=============== +============== Introduction: ------------- @@ -76,15 +76,15 @@ Set the variables corresponding to this platform: .. include:: ../ti/k3.rst :start-after: .. k3_rst_include_start_common_env_vars_defn :end-before: .. k3_rst_include_end_common_env_vars_defn -.. code-block:: bash +.. prompt:: bash $ - $ export UBOOT_CFG_CORTEXR=am62x_evm_r5_defconfig - $ export UBOOT_CFG_CORTEXA=am62x_evm_a53_defconfig - $ export TFA_BOARD=lite - $ # we dont use any extra TFA parameters - $ unset TFA_EXTRA_ARGS - $ export OPTEE_PLATFORM=k3-am62x - $ export OPTEE_EXTRA_ARGS="CFG_WITH_SOFTWARE_PRNG=y" + export UBOOT_CFG_CORTEXR=am62x_evm_r5_defconfig + export UBOOT_CFG_CORTEXA=am62x_evm_a53_defconfig + export TFA_BOARD=lite + # we dont use any extra TFA parameters + unset TFA_EXTRA_ARGS + export OPTEE_PLATFORM=k3-am62x + export OPTEE_EXTRA_ARGS="CFG_WITH_SOFTWARE_PRNG=y" .. am62x_evm_rst_include_start_build_steps @@ -117,7 +117,8 @@ Set the variables corresponding to this platform: .. am62x_evm_rst_include_end_build_steps Target Images --------------- +------------- + In order to boot we need tiboot3.bin, tispl.bin and u-boot.img. Each SoC variant (GP, HS-FS, HS-SE) requires a different source for these files. @@ -270,6 +271,6 @@ detailed setup information. To start OpenOCD and connect to the board -.. code-block:: bash +.. prompt:: bash $ openocd -f board/ti_am625evm.cfg diff --git a/doc/board/ti/am64x_evm.rst b/doc/board/ti/am64x_evm.rst index db27461cb1..6ae35b3fee 100644 --- a/doc/board/ti/am64x_evm.rst +++ b/doc/board/ti/am64x_evm.rst @@ -65,16 +65,16 @@ Set the variables corresponding to this platform: .. include:: k3.rst :start-after: .. k3_rst_include_start_common_env_vars_defn :end-before: .. k3_rst_include_end_common_env_vars_defn -.. code-block:: bash +.. prompt:: bash $ - $ export UBOOT_CFG_CORTEXR=am64x_evm_r5_defconfig - $ export UBOOT_CFG_CORTEXA=am64x_evm_a53_defconfig - $ export TFA_BOARD=lite - $ # we dont use any extra TFA parameters - $ unset TFA_EXTRA_ARGS - $ export OPTEE_PLATFORM=k3-am64x - $ # we dont use any extra TFA parameters - $ unset OPTEE_EXTRA_ARGS + export UBOOT_CFG_CORTEXR=am64x_evm_r5_defconfig + export UBOOT_CFG_CORTEXA=am64x_evm_a53_defconfig + export TFA_BOARD=lite + # we dont use any extra TFA parameters + unset TFA_EXTRA_ARGS + export OPTEE_PLATFORM=k3-am64x + # we dont use any extra TFA parameters + unset OPTEE_EXTRA_ARGS .. am64x_evm_rst_include_start_build_steps @@ -107,7 +107,8 @@ Set the variables corresponding to this platform: .. am64x_evm_rst_include_end_build_steps Target Images --------------- +------------- + In order to boot we need tiboot3.bin, tispl.bin and u-boot.img. Each SoC variant (GP, HS-FS, HS-SE) requires a different source for these files. diff --git a/doc/board/ti/am65x_evm.rst b/doc/board/ti/am65x_evm.rst index 7cebb1ca62..89011c08dd 100644 --- a/doc/board/ti/am65x_evm.rst +++ b/doc/board/ti/am65x_evm.rst @@ -22,7 +22,7 @@ cores, voltage domains and peripherals: 3. MAIN domain: * Quad core 64-bit ARM Cortex-A53 -More info can be found in TRM: http://www.ti.com/lit/pdf/spruid7 +More info can be found in TRM: https://www.ti.com/lit/pdf/spruid7 Platform information: @@ -75,16 +75,16 @@ Set the variables corresponding to this platform: .. include:: k3.rst :start-after: .. k3_rst_include_start_common_env_vars_defn :end-before: .. k3_rst_include_end_common_env_vars_defn -.. code-block:: bash +.. prompt:: bash $ - $ export UBOOT_CFG_CORTEXR=am65x_evm_r5_defconfig - $ export UBOOT_CFG_CORTEXA=am65x_evm_a53_defconfig - $ export TFA_BOARD=generic - $ # we dont use any extra TFA parameters - $ unset TFA_EXTRA_ARGS - $ export OPTEE_PLATFORM=k3-am65x - $ # we dont use any extra OP-TEE parameters - $ unset OPTEE_EXTRA_ARGS + export UBOOT_CFG_CORTEXR=am65x_evm_r5_defconfig + export UBOOT_CFG_CORTEXA=am65x_evm_a53_defconfig + export TFA_BOARD=generic + # we dont use any extra TFA parameters + unset TFA_EXTRA_ARGS + export OPTEE_PLATFORM=k3-am65x + # we dont use any extra OP-TEE parameters + unset OPTEE_EXTRA_ARGS .. am65x_evm_rst_include_start_build_steps @@ -117,7 +117,8 @@ Set the variables corresponding to this platform: .. am65x_evm_rst_include_end_build_steps Target Images --------------- +------------- + In order to boot we need tiboot3.bin, sysfw.itb, tispl.bin and u-boot.img. Each SoC variant (GP and HS) requires a different source for these files. @@ -159,32 +160,32 @@ The following commands can be used to download tiboot3.bin, tispl.bin, u-boot.img, and sysfw.itb from an SD card and write them to the eMMC boot0 partition at respective addresses. -.. code-block:: text +.. prompt:: bash => - => mmc dev 0 1 - => fatload mmc 1 ${loadaddr} tiboot3.bin - => mmc write ${loadaddr} 0x0 0x400 - => fatload mmc 1 ${loadaddr} tispl.bin - => mmc write ${loadaddr} 0x400 0x1000 - => fatload mmc 1 ${loadaddr} u-boot.img - => mmc write ${loadaddr} 0x1400 0x2000 - => fatload mmc 1 ${loadaddr} sysfw.itb - => mmc write ${loadaddr} 0x3600 0x800 + mmc dev 0 1 + fatload mmc 1 ${loadaddr} tiboot3.bin + mmc write ${loadaddr} 0x0 0x400 + fatload mmc 1 ${loadaddr} tispl.bin + mmc write ${loadaddr} 0x400 0x1000 + fatload mmc 1 ${loadaddr} u-boot.img + mmc write ${loadaddr} 0x1400 0x2000 + fatload mmc 1 ${loadaddr} sysfw.itb + mmc write ${loadaddr} 0x3600 0x800 To give the ROM access to the boot partition, the following commands must be used for the first time: -.. code-block:: text +.. prompt:: bash => - => mmc partconf 0 1 1 1 - => mmc bootbus 0 1 0 0 + mmc partconf 0 1 1 1 + mmc bootbus 0 1 0 0 To create a software partition for the rootfs, the following command can be used: -.. code-block:: text +.. prompt:: bash => - => gpt write mmc 0 ${partitions} + gpt write mmc 0 ${partitions} eMMC layout: @@ -194,11 +195,11 @@ eMMC layout: Kernel image and DT are expected to be present in the /boot folder of rootfs. To boot kernel from eMMC, use the following commands: -.. code-block:: text +.. prompt:: bash => - => setenv mmcdev 0 - => setenv bootpart 0 - => boot + setenv mmcdev 0 + setenv bootpart 0 + boot OSPI: ----- @@ -210,17 +211,17 @@ Below commands can be used to download tiboot3.bin, tispl.bin, u-boot.img, and sysfw.itb over tftp and then flash those to OSPI at their respective addresses. -.. code-block:: text +.. prompt:: bash => - => sf probe - => tftp ${loadaddr} tiboot3.bin - => sf update $loadaddr 0x0 $filesize - => tftp ${loadaddr} tispl.bin - => sf update $loadaddr 0x80000 $filesize - => tftp ${loadaddr} u-boot.img - => sf update $loadaddr 0x280000 $filesize - => tftp ${loadaddr} sysfw.itb - => sf update $loadaddr 0x6C0000 $filesize + sf probe + tftp ${loadaddr} tiboot3.bin + sf update $loadaddr 0x0 $filesize + tftp ${loadaddr} tispl.bin + sf update $loadaddr 0x80000 $filesize + tftp ${loadaddr} u-boot.img + sf update $loadaddr 0x280000 $filesize + tftp ${loadaddr} sysfw.itb + sf update $loadaddr 0x6C0000 $filesize Flash layout for OSPI: @@ -233,10 +234,10 @@ ospi.rootfs just like in SD card case. U-Boot looks for UBI volume named To boot kernel from OSPI, at the U-Boot prompt: -.. code-block:: text +.. prompt:: bash => - => setenv boot ubi - => boot + setenv boot ubi + boot UART: ----- @@ -280,19 +281,19 @@ is fully loaded (from sysfw.itb) and started. Example bash script sequence for running on a Linux host PC feeding all boot artifacts needed to the device: -.. code-block:: text +.. prompt:: bash $ - MCU_DEV=/dev/ttyUSB1 - MAIN_DEV=/dev/ttyUSB0 + MCU_DEV=/dev/ttyUSB1 + MAIN_DEV=/dev/ttyUSB0 - stty -F $MCU_DEV 115200 cs8 -cstopb -parenb - stty -F $MAIN_DEV 115200 cs8 -cstopb -parenb + stty -F $MCU_DEV 115200 cs8 -cstopb -parenb + stty -F $MAIN_DEV 115200 cs8 -cstopb -parenb - sb --xmodem tiboot3.bin > $MCU_DEV < $MCU_DEV - sb --ymodem sysfw.itb > $MCU_DEV < $MCU_DEV - sb --ymodem tispl.bin > $MAIN_DEV < $MAIN_DEV - sleep 1 - sb --xmodem u-boot.img > $MAIN_DEV < $MAIN_DEV + sb --xmodem tiboot3.bin > $MCU_DEV < $MCU_DEV + sb --ymodem sysfw.itb > $MCU_DEV < $MCU_DEV + sb --ymodem tispl.bin > $MAIN_DEV < $MAIN_DEV + sleep 1 + sb --xmodem u-boot.img > $MAIN_DEV < $MAIN_DEV Debugging U-Boot ---------------- @@ -314,6 +315,6 @@ detailed setup information. To start OpenOCD and connect to the board -.. code-block:: bash +.. prompt:: bash $ openocd -f board/ti_am654evm.cfg diff --git a/doc/board/ti/dra7xx_evm.rst b/doc/board/ti/dra7xx_evm.rst index 4503b5e922..8e5d95535f 100644 --- a/doc/board/ti/dra7xx_evm.rst +++ b/doc/board/ti/dra7xx_evm.rst @@ -71,8 +71,7 @@ example we load MLO and u-boot.img from the build into DDR and then use 'mmc bootbus' to set the required rate (see TRM) and 'mmc partconfig' to set boot0 as the boot device. -.. prompt:: bash - :prompts: => +.. prompt:: bash => setenv autoload no usb start diff --git a/doc/board/ti/j7200_evm.rst b/doc/board/ti/j7200_evm.rst index bcf8dc1c5f..d4a823fa26 100644 --- a/doc/board/ti/j7200_evm.rst +++ b/doc/board/ti/j7200_evm.rst @@ -64,16 +64,16 @@ Set the variables corresponding to this platform: .. include:: k3.rst :start-after: .. k3_rst_include_start_common_env_vars_defn :end-before: .. k3_rst_include_end_common_env_vars_defn -.. code-block:: bash +.. prompt:: bash $ - $ export UBOOT_CFG_CORTEXR=j7200_evm_r5_defconfig - $ export UBOOT_CFG_CORTEXA=j7200_evm_a72_defconfig - $ export TFA_BOARD=generic - $ # we dont use any extra TFA parameters - $ unset TFA_EXTRA_ARGS - $ export OPTEE_PLATFORM=k3-j7200 - $ # we dont use any extra OP-TEE parameters - $ unset OPTEE_EXTRA_ARGS + export UBOOT_CFG_CORTEXR=j7200_evm_r5_defconfig + export UBOOT_CFG_CORTEXA=j7200_evm_a72_defconfig + export TFA_BOARD=generic + # we dont use any extra TFA parameters + unset TFA_EXTRA_ARGS + export OPTEE_PLATFORM=k3-j7200 + # we dont use any extra OP-TEE parameters + unset OPTEE_EXTRA_ARGS .. j7200_evm_rst_include_start_build_steps @@ -106,7 +106,8 @@ Set the variables corresponding to this platform: .. j7200_evm_rst_include_end_build_steps Target Images --------------- +------------- + In order to boot we need tiboot3.bin, tispl.bin and u-boot.img. Each SoC variant (GP, HS-FS, HS-SE) requires a different source for these files. @@ -225,6 +226,6 @@ detailed setup information. To start OpenOCD and connect to the board -.. code-block:: bash +.. prompt:: bash $ openocd -f board/ti_j7200evm.cfg diff --git a/doc/board/ti/j721e_evm.rst b/doc/board/ti/j721e_evm.rst index cadaac0178..113475d7c9 100644 --- a/doc/board/ti/j721e_evm.rst +++ b/doc/board/ti/j721e_evm.rst @@ -27,7 +27,7 @@ specific processing cores and peripherals: * 2 x C66x Digital signal processor sub system * C71x Digital signal processor sub-system with MMA. -More info can be found in TRM: http://www.ti.com/lit/pdf/spruil1 +More info can be found in TRM: https://www.ti.com/lit/pdf/spruil1 Platform information: @@ -69,16 +69,16 @@ Set the variables corresponding to this platform: .. include:: k3.rst :start-after: .. k3_rst_include_start_common_env_vars_defn :end-before: .. k3_rst_include_end_common_env_vars_defn -.. code-block:: bash +.. prompt:: bash $ - $ export UBOOT_CFG_CORTEXR=j721e_evm_r5_defconfig - $ export UBOOT_CFG_CORTEXA=j721e_evm_a72_defconfig - $ export TFA_BOARD=generic - $ # we dont use any extra TFA parameters - $ unset TFA_EXTRA_ARGS - $ export OPTEE_PLATFORM=k3-j721e - $ # we dont use any extra OP-TEE parameters - $ unset OPTEE_EXTRA_ARGS + export UBOOT_CFG_CORTEXR=j721e_evm_r5_defconfig + export UBOOT_CFG_CORTEXA=j721e_evm_a72_defconfig + export TFA_BOARD=generic + # we dont use any extra TFA parameters + unset TFA_EXTRA_ARGS + export OPTEE_PLATFORM=k3-j721e + # we dont use any extra OP-TEE parameters + unset OPTEE_EXTRA_ARGS .. j721e_evm_rst_include_start_build_steps @@ -111,7 +111,8 @@ Set the variables corresponding to this platform: .. j721e_evm_rst_include_end_build_steps Target Images --------------- +------------- + In order to boot we need tiboot3.bin, sysfw.itb, tispl.bin and u-boot.img. Each SoC variant (GP, HS-FS and HS-SE) requires a different source for these files. @@ -202,17 +203,17 @@ Below commands can be used to download tiboot3.bin, tispl.bin, u-boot.img, and sysfw.itb over tftp and then flash those to OSPI at their respective addresses. -.. code-block:: text +.. prompt:: bash => - => sf probe - => tftp ${loadaddr} tiboot3.bin - => sf update $loadaddr 0x0 $filesize - => tftp ${loadaddr} tispl.bin - => sf update $loadaddr 0x80000 $filesize - => tftp ${loadaddr} u-boot.img - => sf update $loadaddr 0x280000 $filesize - => tftp ${loadaddr} sysfw.itb - => sf update $loadaddr 0x6C0000 $filesize + sf probe + tftp ${loadaddr} tiboot3.bin + sf update $loadaddr 0x0 $filesize + tftp ${loadaddr} tispl.bin + sf update $loadaddr 0x80000 $filesize + tftp ${loadaddr} u-boot.img + sf update $loadaddr 0x280000 $filesize + tftp ${loadaddr} sysfw.itb + sf update $loadaddr 0x6C0000 $filesize Flash layout for OSPI: @@ -254,6 +255,6 @@ detailed setup information. To start OpenOCD and connect to the board -.. code-block:: bash +.. prompt:: bash $ openocd -f board/ti_j721eevm.cfg diff --git a/doc/board/ti/j721s2_evm.rst b/doc/board/ti/j721s2_evm.rst index fec2acabe8..f5c48c96a8 100644 --- a/doc/board/ti/j721s2_evm.rst +++ b/doc/board/ti/j721s2_evm.rst @@ -6,6 +6,7 @@ J721S2 and AM68 Platforms Introduction: ------------- + The J721S2 family of SoCs are part of K3 Multicore SoC architecture platform targeting automotive applications. They are designed as a low power, high performance and highly integrated device architecture, adding significant @@ -38,6 +39,7 @@ Platform information: Boot Flow: ---------- + Below is the pictorial representation of boot flow: .. image:: img/boot_diagram_k3_current.svg @@ -60,6 +62,7 @@ Sources: Build procedure: ---------------- + 0. Setup the environment variables: .. include:: k3.rst @@ -75,15 +78,15 @@ Set the variables corresponding to this platform: .. include:: k3.rst :start-after: .. k3_rst_include_start_common_env_vars_defn :end-before: .. k3_rst_include_end_common_env_vars_defn -.. code-block:: bash +.. prompt:: bash $ - $ export UBOOT_CFG_CORTEXR=j721s2_evm_r5_defconfig - $ export UBOOT_CFG_CORTEXA=j721s2_evm_a72_defconfig - $ export TFA_BOARD=generic - $ export TFA_EXTRA_ARGS="K3_USART=0x8" - $ # The following is not a typo, j784s4 is the OP-TEE platform for j721s2 - $ export OPTEE_PLATFORM=k3-j784s4 - $ export OPTEE_EXTRA_ARGS="CFG_CONSOLE_UART=0x8" + export UBOOT_CFG_CORTEXR=j721s2_evm_r5_defconfig + export UBOOT_CFG_CORTEXA=j721s2_evm_a72_defconfig + export TFA_BOARD=generic + export TFA_EXTRA_ARGS="K3_USART=0x8" + # The following is not a typo, j784s4 is the OP-TEE platform for j721s2 + export OPTEE_PLATFORM=k3-j784s4 + export OPTEE_EXTRA_ARGS="CFG_CONSOLE_UART=0x8" .. j721s2_evm_rst_include_start_build_steps @@ -120,7 +123,8 @@ Set the variables corresponding to this platform: .. j721s2_evm_rst_include_end_build_steps Target Images --------------- +------------- + In order to boot we need tiboot3.bin, tispl.bin and u-boot.img. Each SoC variant (GP, HS-FS, HS-SE) requires a different source for these files. @@ -296,7 +300,7 @@ Debugging U-Boot on J721S2-EVM To start OpenOCD and connect to the board -.. code-block:: bash +.. prompt:: bash $ openocd -f board/ti_j721s2evm.cfg diff --git a/doc/board/ti/k3.rst b/doc/board/ti/k3.rst index 89d70db886..5167925c9c 100644 --- a/doc/board/ti/k3.rst +++ b/doc/board/ti/k3.rst @@ -197,7 +197,7 @@ All of that to say you will need both a 32bit and 64bit cross compiler .. k3_rst_include_end_common_env_vars_desc .. k3_rst_include_start_common_env_vars_defn -.. prompt:: bash +.. prompt:: bash $ export CC32=arm-linux-gnueabihf- export CC64=aarch64-linux-gnu- @@ -238,7 +238,7 @@ other build sources. we shall use the following, in the build descriptions below .. k3_rst_include_end_board_env_vars_desc Building tiboot3.bin -^^^^^^^^^^^^^^^^^^^^^ +^^^^^^^^^^^^^^^^^^^^ 1. To generate the U-Boot SPL for the wakeup domain, use the following commands, substituting :code:`{SOC}` for the name of your device (eg: @@ -247,7 +247,7 @@ Building tiboot3.bin uses the split binary flow) .. k3_rst_include_start_build_steps_spl_r5 -.. prompt:: bash +.. prompt:: bash $ # inside u-boot source make $UBOOT_CFG_CORTEXR @@ -273,7 +273,7 @@ domain of your K3 SoC. UBoot SPL will only look for and load the files with these names. Building tispl.bin -^^^^^^^^^^^^^^^^^^^ +^^^^^^^^^^^^^^^^^^ The `tispl.bin` is a standard fitImage combining the firmware need for the main domain to function properly as well as Device Management (DM) @@ -283,7 +283,7 @@ firmware if your device using a split firmware. application cores on the main domain. .. k3_rst_include_start_build_steps_tfa -.. prompt:: bash +.. prompt:: bash $ # inside trusted-firmware-a source make CROSS_COMPILE=$CC64 ARCH=aarch64 PLAT=k3 SPD=opteed $TFA_EXTRA_ARGS \ @@ -299,7 +299,7 @@ use the `lite` option. using the TrustZone technology built into the core. .. k3_rst_include_start_build_steps_optee -.. prompt:: bash +.. prompt:: bash $ # inside optee_os source make CROSS_COMPILE=$CC32 CROSS_COMPILE64=$CC64 CFG_ARM64_core=y $OPTEE_EXTRA_ARGS \ @@ -311,7 +311,7 @@ use the `lite` option. 64bit core in the main domain. .. k3_rst_include_start_build_steps_uboot -.. prompt:: bash +.. prompt:: bash $ # inside u-boot source make $UBOOT_CFG_CORTEXA @@ -410,14 +410,14 @@ and the same can be extended to other platforms be passing to mkimage for signing the fitImage and embedding the key in the u-boot dtb. - .. prompt:: bash + .. prompt:: bash $ mkimage -r -f fitImage.its -k $UBOOT_PATH/board/ti/keys -K $UBOOT_PATH/build/a72/dts/dt.dtb For signing a secondary platform, pass the -K parameter to that DTB - .. prompt:: bash + .. prompt:: bash $ mkimage -f fitImage.its -k $UBOOT_PATH/board/ti/keys -K $UBOOT_PATH/build/a72/arch/arm/dts/k3-j721e-sk.dtb @@ -476,8 +476,7 @@ then the saveenv command and can be used across various bootmodes too. **Writing to MMC/EMMC** -.. prompt:: bash - :prompts: => +.. prompt:: bash => env export -t $loadaddr <list of variables> fatwrite mmc ${mmcdev} ${loadaddr} ${bootenvfile} ${filesize} @@ -490,8 +489,7 @@ mmcdev) and set the environments. If manually needs to be done then the environment can be read from the filesystem and then imported -.. prompt:: bash - :prompts: => +.. prompt:: bash => fatload mmc ${mmcdev} ${loadaddr} ${bootenvfile} env import -t ${loadaddr} ${filesize} @@ -551,7 +549,7 @@ Refer to the release notes corresponding to the `OpenOCD version box support by OpenOCD. The board-specific documentation will cover the details and any adapter/dongle recommendations. -.. prompt:: bash +.. prompt:: bash $ openocd -v @@ -569,7 +567,7 @@ systems, but equivalent instructions should exist for systems with other package managers. Please refer to the `OpenOCD Documentation <https://openocd.org/>`_ for more recent installation steps. -.. prompt:: bash +.. prompt:: bash $ # Check the packages to be installed: needs deb-src in sources.list sudo apt build-dep openocd @@ -599,7 +597,7 @@ The step is not necessary if the distribution supports the OpenOCD, but if building from a source, ensure that the udev rules are installed correctly to ensure a sane system. -.. prompt:: bash +.. prompt:: bash $ # Go to the OpenOCD source directory cd openocd @@ -617,7 +615,7 @@ Step 2: Setup GDB Most systems come with gdb-multiarch package. -.. prompt:: bash +.. prompt:: bash $ # Install gdb-multiarch package sudo apt-get install gdb-multiarch @@ -833,7 +831,7 @@ Startup OpenOCD to debug the platform as follows: .. k3_rst_include_start_openocd_cfg_XDS110 -.. prompt:: bash +.. prompt:: bash $ openocd -f board/{board_of_choice}.cfg @@ -847,7 +845,7 @@ Startup OpenOCD to debug the platform as follows: <https://github.com/openocd-org/openocd/blob/master/tcl/target/ti_k3.cfg#L59>`_ to decide if the SoC is supported or not. -.. prompt:: bash +.. prompt:: bash $ openocd -f openocd_connect.cfg @@ -922,13 +920,13 @@ To debug using this server, use GDB directly or your preferred GDB-based IDE. To start up GDB in the terminal, run the following command. -.. prompt:: bash +.. prompt:: bash $ gdb-multiarch To connect to your desired core, run the following command within GDB: -.. code-block:: bash +.. prompt:: bash (gdb) target extended-remote localhost:{port for desired core} @@ -945,13 +943,13 @@ To load symbols: * Prior to relocation: -.. code-block:: bash +.. prompt:: bash (gdb) symbol-file {path to elf file} * After relocation: -.. code-block:: bash +.. prompt:: bash (gdb) # Drop old symbol file symbol-file @@ -962,7 +960,7 @@ To load symbols: In the above example of AM625, -.. code-block:: bash +.. prompt:: bash (gdb) target extended-remote localhost:3338 <- R5F (Wakeup Domain) target extended-remote localhost:3334 <- A53 (Main Domain) @@ -982,7 +980,7 @@ breakpoints. To exit the debug loop added above, add any breakpoints needed and run the following GDB commands to step out of the debug loop set in the ``board_init_f`` function. -.. code-block:: bash +.. prompt:: bash (gdb) set x = 0 continue diff --git a/doc/board/ti/ks2_evm.rst b/doc/board/ti/ks2_evm.rst index 0a789037a6..16c2e57d09 100644 --- a/doc/board/ti/ks2_evm.rst +++ b/doc/board/ti/ks2_evm.rst @@ -17,17 +17,17 @@ Documentation for this board can be found at: The K2HK board is based on Texas Instruments Keystone2 family of SoCs: K2H, K2K. More details on these SoCs are available at company websites: -K2K: http://www.ti.com/product/tci6638k2k -K2H: http://www.ti.com/product/tci6638k2h +K2K: https://www.ti.com/product/tci6638k2k +K2H: https://www.ti.com/product/tci6638k2h The K2E SoC details are available at - http://www.ti.com/lit/ds/symlink/66ak2e05.pdf + https://www.ti.com/lit/ds/symlink/66ak2e05.pdf The K2L SoC details are available at - http://www.ti.com/lit/ds/symlink/tci6630k2l.pdf + https://www.ti.com/lit/ds/symlink/tci6630k2l.pdf The K2G SoC details are available at - http://www.ti.com/lit/ds/symlink/66ak2g02.pdf + https://www.ti.com/lit/ds/symlink/66ak2g02.pdf Board Configuration ------------------- @@ -122,8 +122,7 @@ Don't forget to add CROSS_COMPILE. To build u-boot.bin, u-boot-spi.gph, MLO: -.. prompt:: bash - :prompts: $ +.. prompt:: bash $ make k2hk_evm_defconfig make @@ -197,8 +196,7 @@ instructions: 4. Free Run the target as described earlier (step 4) to get U-Boot prompt 5. At the U-Boot console type following to setup U-Boot environment variables. -.. prompt:: bash - :prompts: => +.. prompt:: bash => setenv addr_uboot 0x87000000 setenv filesize <size in hex of u-boot-spi.gph rounded to hex 0x10000> @@ -226,8 +224,7 @@ instructions: 4. Free Run the target as described earlier (step 4) to get U-Boot prompt 5. At the U-Boot console type following to setup U-Boot environment variables. -.. prompt:: bash - :prompts: => +.. prompt:: bash => setenv filesize <size in hex of MLO rounded to hex 0x10000> run burn_uboot_nand @@ -249,10 +246,10 @@ Open BMC and regular UART terminals. 1. On the regular UART port start xmodem transfer of the u-boot.bin 2. Using BMC terminal set the ARM-UART bootmode and reboot the EVM -.. prompt:: bash +.. prompt:: bash BMC> - BMC> bootmode #4 - MBC> reboot + bootmode #4 + reboot 3. When xmodem is complete you should see the U-Boot starts on the UART port diff --git a/doc/board/xilinx/xilinx.rst b/doc/board/xilinx/xilinx.rst index 8c9afb482d..5464625ac1 100644 --- a/doc/board/xilinx/xilinx.rst +++ b/doc/board/xilinx/xilinx.rst @@ -2,7 +2,7 @@ .. (C) Copyright 2019 Xilinx, Inc. U-Boot device tree bindings ----------------------------- +--------------------------- All the device tree bindings used in U-Boot are specified in Linux kernel. Please refer dt bindings from below specified paths in Linux diff --git a/doc/build/gcc.rst b/doc/build/gcc.rst index 23501dea37..3c64657727 100644 --- a/doc/build/gcc.rst +++ b/doc/build/gcc.rst @@ -66,7 +66,7 @@ For building U-Boot on Alpine Linux at least the following packages are needed: Depending on the build target further packages may be needed: * sandbox with lcd: sdl2-dev -* riscv64 S-mode targests: opensbi +* riscv64 S-mode targets: opensbi * some arm64 targets: arm-trusted-firmware Prerequisites diff --git a/doc/build/source.rst b/doc/build/source.rst index 470f793985..d21ee055f3 100644 --- a/doc/build/source.rst +++ b/doc/build/source.rst @@ -1,5 +1,5 @@ Obtaining the source -===================== +==================== The source of the U-Boot project is maintained in a Git repository. diff --git a/doc/develop/driver-model/ethernet.rst b/doc/develop/driver-model/ethernet.rst index cdbccca34d..73c3a728db 100644 --- a/doc/develop/driver-model/ethernet.rst +++ b/doc/develop/driver-model/ethernet.rst @@ -1,5 +1,5 @@ Ethernet Driver Guide -======================= +===================== The networking stack in Das U-Boot is designed for multiple network devices to be easily added and controlled at runtime. This guide is meant for people @@ -14,7 +14,7 @@ Some drivers are still using the old Ethernet interface, differences between the two and hints about porting will be handled at the end. Driver framework ------------------- +---------------- A network driver following the driver model must declare itself using the UCLASS_ETH .id field in the U-Boot driver struct: @@ -67,7 +67,7 @@ bus. Also it would take care of any special PHY setup (power rails, enable bits for internal PHYs, etc.). Driver methods ----------------- +-------------- The real work will be done in the driver method functions the driver provides by defining the members of struct eth_ops: @@ -158,7 +158,7 @@ So the call graph at this stage would look something like: CONFIG_PHYLIB / CONFIG_CMD_MII --------------------------------- +------------------------------ If your device supports banging arbitrary values on the MII bus (pretty much every device does), you should add support for the mii command. Doing so is @@ -193,7 +193,7 @@ should logically follow. ................................................................ Legacy network drivers ------------------------- +---------------------- !!! WARNING !!! @@ -221,7 +221,7 @@ instructions on how to port this over. For the records, the old way of initialising a network driver is as follows: Old network driver registration -~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ When U-Boot initializes, it will call the common function eth_initialize(). This will in turn call the board-specific board_eth_init() (or if that fails, diff --git a/doc/develop/driver-model/migration.rst b/doc/develop/driver-model/migration.rst index fe1ae210de..03fea943b2 100644 --- a/doc/develop/driver-model/migration.rst +++ b/doc/develop/driver-model/migration.rst @@ -100,7 +100,7 @@ Maintainers should submit patches switching over to using CONFIG_DM_I2C and other base driver model options in time for inclusion in the 2021.10 release. CFG_SYS_TIMER_RATE and CFG_SYS_TIMER_COUNTER --------------------------------------------------- +-------------------------------------------- Deadline: 2023.01 These are legacy options which have been replaced by driver model. diff --git a/doc/develop/driver-model/nvmxip.rst b/doc/develop/driver-model/nvmxip.rst index e85dc220b9..4a7650c8d2 100644 --- a/doc/develop/driver-model/nvmxip.rst +++ b/doc/develop/driver-model/nvmxip.rst @@ -1,7 +1,7 @@ .. SPDX-License-Identifier: GPL-2.0+ NVM XIP Block Storage Emulation Driver -======================================= +====================================== Summary ------- @@ -54,12 +54,12 @@ The NVMXIP Uclass provides the following drivers: The implementation is generic and can be used by different platforms. Supported hardware --------------------------------- +------------------ Any plaform supporting readq(). Configuration ----------------------- +------------- config NVMXIP This option allows the emulation of a block storage device @@ -77,7 +77,7 @@ config NVMXIP_QSPI write their own driver (same as nvmxip_qspi in addition to the custom settings). Device Tree nodes --------------------- +----------------- Multiple QSPI XIP flash devices can be used at the same time by describing them through DT nodes. diff --git a/doc/develop/driver-model/remoteproc-framework.rst b/doc/develop/driver-model/remoteproc-framework.rst index 566495a21c..03a0bd0f4b 100644 --- a/doc/develop/driver-model/remoteproc-framework.rst +++ b/doc/develop/driver-model/remoteproc-framework.rst @@ -1,6 +1,6 @@ .. SPDX-License-Identifier: GPL-2.0+ .. (C) Copyright 2015 -.. Texas Instruments Incorporated - http://www.ti.com/ +.. Texas Instruments Incorporated - https://www.ti.com/ Remote Processor Framework ========================== diff --git a/doc/develop/driver-model/soc-framework.rst b/doc/develop/driver-model/soc-framework.rst index 2609fda644..357e7fc8c9 100644 --- a/doc/develop/driver-model/soc-framework.rst +++ b/doc/develop/driver-model/soc-framework.rst @@ -1,6 +1,6 @@ .. SPDX-License-Identifier: GPL-2.0+ .. (C) Copyright 2020 -.. Texas Instruments Incorporated - http://www.ti.com/ +.. Texas Instruments Incorporated - https://www.ti.com/ SOC ID Framework ================ diff --git a/doc/develop/driver-model/spi-howto.rst b/doc/develop/driver-model/spi-howto.rst index 97fbf750cb..9dc3b9b4aa 100644 --- a/doc/develop/driver-model/spi-howto.rst +++ b/doc/develop/driver-model/spi-howto.rst @@ -218,7 +218,7 @@ DM tells you. The name is not quite right. So in this case we would use: Write of_to_plat() [for device tree only] -------------------------------------------------- +----------------------------------------- This method will convert information in the device tree node into a C structure in your driver (called platform data). If you are not using diff --git a/doc/develop/falcon.rst b/doc/develop/falcon.rst index 2f25fc8532..8a46c0efa1 100644 --- a/doc/develop/falcon.rst +++ b/doc/develop/falcon.rst @@ -220,7 +220,7 @@ setting the GPIO (on twister GPIO 55 is used) to kernel mode. The kernel is loaded directly by the SPL without passing through U-Boot. Example with FDT: a3m071 board -------------------------------- +------------------------------ To boot the Linux kernel from the SPL, the DT blob (fdt) needs to get prepared/patched first. U-Boot usually inserts some dynamic values into diff --git a/doc/develop/release_cycle.rst b/doc/develop/release_cycle.rst index 0e753453b6..600bf62741 100644 --- a/doc/develop/release_cycle.rst +++ b/doc/develop/release_cycle.rst @@ -68,7 +68,7 @@ For the next scheduled release, release candidates were made on:: * U-Boot v2024.01-rc2 was released on Mon 06 November 2023. -.. * U-Boot v2024.01-rc3 was released on Mon 20 November 2023. +* U-Boot v2024.01-rc3 was released on Mon 20 November 2023. .. * U-Boot v2024.01-rc4 was released on Mon 04 December 2023. diff --git a/doc/device-tree-bindings/clock/ti,cdce9xx.txt b/doc/device-tree-bindings/clock/ti,cdce9xx.txt index 0d01f2d5cc..62701d2145 100644 --- a/doc/device-tree-bindings/clock/ti,cdce9xx.txt +++ b/doc/device-tree-bindings/clock/ti,cdce9xx.txt @@ -4,10 +4,10 @@ Reference This binding uses the common clock binding[1]. [1] Documentation/devicetree/bindings/clock/clock-bindings.txt -[2] http://www.ti.com/product/cdce913 -[3] http://www.ti.com/product/cdce925 -[4] http://www.ti.com/product/cdce937 -[5] http://www.ti.com/product/cdce949 +[2] https://www.ti.com/product/cdce913 +[3] https://www.ti.com/product/cdce925 +[4] https://www.ti.com/product/cdce937 +[5] https://www.ti.com/product/cdce949 The driver provides clock sources for each output Y1 through Y5. diff --git a/doc/device-tree-bindings/video/tilcdc/tilcdc.txt b/doc/device-tree-bindings/video/tilcdc/tilcdc.txt index 7bf1bb4448..7600801055 100644 --- a/doc/device-tree-bindings/video/tilcdc/tilcdc.txt +++ b/doc/device-tree-bindings/video/tilcdc/tilcdc.txt @@ -46,7 +46,7 @@ Optional nodes: crossed and LCD_DATA[0:4] is for Red[3:7] and LCD_DATA[11:15] is for Blue[3-7]. For more details see section 3.1.1 in AM335x Silicon Errata: - http://www.ti.com/general/docs/lit/getliterature.tsp?baseLiteratureNumber=sprz360 + https://www.ti.com/general/docs/lit/getliterature.tsp?baseLiteratureNumber=sprz360 Example: diff --git a/doc/usage/cmd/askenv.rst b/doc/usage/cmd/askenv.rst index 347bd59458..b85ceface1 100644 --- a/doc/usage/cmd/askenv.rst +++ b/doc/usage/cmd/askenv.rst @@ -1,7 +1,7 @@ .. SPDX-License-Identifier: GPL-2.0+: askenv command -=============== +============== Synopsis -------- diff --git a/doc/usage/cmd/bootdev.rst b/doc/usage/cmd/bootdev.rst index 6c68d0bf84..fb638b5807 100644 --- a/doc/usage/cmd/bootdev.rst +++ b/doc/usage/cmd/bootdev.rst @@ -76,7 +76,7 @@ name is provided, all hunters are run. bootdev select -~~~~~~~~~~~~~~~~~ +~~~~~~~~~~~~~~ Use this to select a particular bootdev. You can select it by the sequence number or name, as shown in `bootdev list`. @@ -89,7 +89,7 @@ unselected. bootdev info -~~~~~~~~~~~~~~~ +~~~~~~~~~~~~ This shows information on the current bootdev, with the format looking like this: diff --git a/doc/usage/cmd/bootflow.rst b/doc/usage/cmd/bootflow.rst index 9c5ea9c5d8..2198ff6049 100644 --- a/doc/usage/cmd/bootflow.rst +++ b/doc/usage/cmd/bootflow.rst @@ -15,6 +15,7 @@ Synopis bootflow read bootflow boot bootflow cmdline [set|get|clear|delete|auto] <param> [<value>] + bootfloe menu [-t] Description ----------- @@ -24,6 +25,9 @@ locate bootflows, list them and boot them. See :doc:`../../develop/bootstd` for more information. +Note that `CONFIG_BOOTSTD_FULL` (which enables `CONFIG_CMD_BOOTFLOW_FULL) must +be enabled to obtain full functionality with this command. Otherwise, it only +supports `bootflow scan` which scans and boots the first available bootflow. bootflow scan ~~~~~~~~~~~~~ @@ -247,6 +251,16 @@ can be used to set the early console (or console) to a suitable value so that output appears on the serial port. This is only supported by the 16550 serial driver so far. +bootflow menu +~~~~~~~~~~~~~ + +This shows a menu with available bootflows. The user can select a particular +bootflow, which then becomes the current one. + +The `-t` flag requests a text menu. Otherwise, if a display is available, a +graphical menu is shown. + + Example ------- @@ -658,6 +672,56 @@ Now the buffer can be accessed:: 77b7e4e0: 320fc000 08e8ba0f c031300f b8d0000f ...2.....01..... 77b7e4f0: 00000020 6ad8000f 00858d10 50000002 ......j.......P +This shows using a text menu to boot an OS:: + + => bootflow scan + => bootfl list + => bootfl menu -t + U-Boot : Boot Menu + + UP and DOWN to choose, ENTER to select + + > 0 mmc1 mmc1.bootdev.whole + 1 mmc1 Fedora-Workstation-armhfp-31-1.9 (5.3.7-301.fc31.armv7hl) + 2 mmc1 mmc1.bootdev.part_1 + 3 mmc4 mmc4.bootdev.whole + 4 mmc4 Armbian + 5 mmc4 mmc4.bootdev.part_1 + 6 mmc5 mmc5.bootdev.whole + 7 mmc5 ChromeOS + 8 mmc5 ChromeOS + U-Boot : Boot Menu + + UP and DOWN to choose, ENTER to select + + 0 mmc1 mmc1.bootdev.whole + > 1 mmc1 Fedora-Workstation-armhfp-31-1.9 (5.3.7-301.fc31.armv7hl) + 2 mmc1 mmc1.bootdev.part_1 + 3 mmc4 mmc4.bootdev.whole + 4 mmc4 Armbian + 5 mmc4 mmc4.bootdev.part_1 + 6 mmc5 mmc5.bootdev.whole + 7 mmc5 ChromeOS + 8 mmc5 ChromeOS + U-Boot : Boot Menu + + Selected: Fedora-Workstation-armhfp-31-1.9 (5.3.7-301.fc31.armv7hl) + => bootfl boot + ** Booting bootflow 'mmc1.bootdev.part_1' with extlinux + Ignoring unknown command: ui + Ignoring malformed menu command: autoboot + Ignoring malformed menu command: hidden + Ignoring unknown command: totaltimeout + Fedora-Workstation-armhfp-31-1.9 Boot Options. + 1: Fedora-Workstation-armhfp-31-1.9 (5.3.7-301.fc31.armv7hl) + Enter choice: 1 + 1: Fedora-Workstation-armhfp-31-1.9 (5.3.7-301.fc31.armv7hl) + Retrieving file: /vmlinuz-5.3.7-301.fc31.armv7hl + Retrieving file: /initramfs-5.3.7-301.fc31.armv7hl.img + append: ro root=UUID=9732b35b-4cd5-458b-9b91-80f7047e0b8a rhgb quiet LANG=en_US.UTF-8 cma=192MB cma=256MB + Retrieving file: /dtb-5.3.7-301.fc31.armv7hl/sandbox.dtb + ... + Return value ------------ @@ -667,6 +731,9 @@ return to U-Boot. If something about the U-Boot processing fails, then the return value $? is 1. If the boot succeeds but for some reason the Operating System returns, then $? is 0, indicating success. +For `bootflow menu` the return value is $? is 0 (true) if an option was choses, +else 1. + For other subcommands, the return value $? is always 0 (true). diff --git a/doc/usage/cmd/cat.rst b/doc/usage/cmd/cat.rst index 5ef4731fe3..5aaf497f27 100644 --- a/doc/usage/cmd/cat.rst +++ b/doc/usage/cmd/cat.rst @@ -1,7 +1,7 @@ .. SPDX-License-Identifier: GPL-2.0+: cat command -=============== +=========== Synopsis -------- diff --git a/doc/usage/cmd/coninfo.rst b/doc/usage/cmd/coninfo.rst index f913148c44..76cb6c3329 100644 --- a/doc/usage/cmd/coninfo.rst +++ b/doc/usage/cmd/coninfo.rst @@ -21,7 +21,7 @@ environment variables stdin, stdout, stderr which contain a comma separated list of device names. Example --------- +------- .. code-block:: console diff --git a/doc/usage/cmd/mmc.rst b/doc/usage/cmd/mmc.rst index c0924ba576..8394f647e8 100644 --- a/doc/usage/cmd/mmc.rst +++ b/doc/usage/cmd/mmc.rst @@ -1,7 +1,7 @@ .. SPDX-License-Identifier: GPL-2.0+: mmc command -============ +=========== Synopsis -------- diff --git a/doc/usage/cmd/part.rst b/doc/usage/cmd/part.rst index 8a594aaff2..eee5225cad 100644 --- a/doc/usage/cmd/part.rst +++ b/doc/usage/cmd/part.rst @@ -1,7 +1,7 @@ .. SPDX-License-Identifier: GPL-2.0+: part command -=============== +============ Synopis ------- diff --git a/doc/usage/cmd/qfw.rst b/doc/usage/cmd/qfw.rst index ec13e0967a..e734b26671 100644 --- a/doc/usage/cmd/qfw.rst +++ b/doc/usage/cmd/qfw.rst @@ -15,7 +15,7 @@ Synopsis Description ----------- -The *qfw* command is used to retrieve information form the QEMU firmware. +The *qfw* command is used to retrieve information from the QEMU firmware. The *qfw list* sub-command displays the QEMU firmware files. diff --git a/doc/usage/cmd/wdt.rst b/doc/usage/cmd/wdt.rst index 8d80433c1f..8bb8b36178 100644 --- a/doc/usage/cmd/wdt.rst +++ b/doc/usage/cmd/wdt.rst @@ -1,7 +1,7 @@ .. SPDX-License-Identifier: GPL-2.0+: wdt command -============ +=========== Synopsis -------- diff --git a/doc/usage/cmd/xxd.rst b/doc/usage/cmd/xxd.rst index 0de1223dce..13bb4389cc 100644 --- a/doc/usage/cmd/xxd.rst +++ b/doc/usage/cmd/xxd.rst @@ -1,7 +1,7 @@ .. SPDX-License-Identifier: GPL-2.0+: xxd command -=============== +=========== Synopsis -------- diff --git a/doc/usage/fit/beaglebone_vboot.rst b/doc/usage/fit/beaglebone_vboot.rst index 0580ee10bd..a102be187b 100644 --- a/doc/usage/fit/beaglebone_vboot.rst +++ b/doc/usage/fit/beaglebone_vboot.rst @@ -86,7 +86,7 @@ c. You will now have a U-Boot image:: Step 2: Build Linux --------------------- +------------------- a. Find the kernel image ('Image') and device tree (.dtb) file you plan to use. In our case it is am335x-boneblack.dtb and it is built with the kernel. diff --git a/doc/usage/measured_boot.rst b/doc/usage/measured_boot.rst index 0aad590859..9691904a9d 100644 --- a/doc/usage/measured_boot.rst +++ b/doc/usage/measured_boot.rst @@ -1,7 +1,7 @@ .. SPDX-License-Identifier: GPL-2.0+ Measured Boot -===================== +============= U-Boot can perform a measured boot, the process of hashing various components of the boot process, extending the results in the TPM and logging the @@ -16,7 +16,7 @@ TPM PCRs match the contents of the event log. This can further be checked against the hash results of previous boots. Requirements ---------------------- +------------ * A hardware TPM 2.0 supported by the U-Boot drivers * CONFIG_TPM=y diff --git a/drivers/ata/sata.c b/drivers/ata/sata.c index be1ee01b29..784d9bbeac 100644 --- a/drivers/ata/sata.c +++ b/drivers/ata/sata.c @@ -61,7 +61,7 @@ int sata_rescan(bool verbose) ret = uclass_find_first_device(UCLASS_AHCI, &dev); if (ret || !dev) { printf("Cannot find SATA device (err=%d)\n", ret); - return -ENOSYS; + return -ENOENT; } ret = device_remove(dev, DM_REMOVE_NORMAL); diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index 26bf429acb..af27ceb27d 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -27,7 +27,6 @@ obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/ obj-$(CONFIG_ARCH_SOCFPGA) += altera/ obj-$(CONFIG_ARCH_STM32) += stm32/ obj-$(CONFIG_ARCH_STM32MP) += stm32/ -obj-$(CONFIG_ARCH_SUNXI) += sunxi/ obj-$(CONFIG_CLK_AT91) += at91/ obj-$(CONFIG_CLK_BCM6345) += clk_bcm6345.o obj-$(CONFIG_CLK_BOSTON) += clk_boston.o @@ -43,6 +42,7 @@ obj-$(CONFIG_CLK_OWL) += owl/ obj-$(CONFIG_CLK_RENESAS) += renesas/ obj-$(CONFIG_$(SPL_TPL_)CLK_SCMI) += clk_scmi.o obj-$(CONFIG_CLK_SIFIVE) += sifive/ +obj-$(CONFIG_CLK_SUNXI) += sunxi/ obj-$(CONFIG_CLK_UNIPHIER) += uniphier/ obj-$(CONFIG_CLK_VERSACLOCK) += clk_versaclock.o obj-$(CONFIG_CLK_VERSAL) += clk_versal.o diff --git a/drivers/clk/clk-cdce9xx.c b/drivers/clk/clk-cdce9xx.c index f23465d7e1..b8700f517f 100644 --- a/drivers/clk/clk-cdce9xx.c +++ b/drivers/clk/clk-cdce9xx.c @@ -2,7 +2,7 @@ /* * Texas Instruments CDCE913/925/937/949 clock synthesizer driver * - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/ * Tero Kristo <t-kristo@ti.com> * * Based on Linux kernel clk-cdce925.c. diff --git a/drivers/clk/ti/clk-k3-pll.c b/drivers/clk/ti/clk-k3-pll.c index c1158c1329..8323e6e691 100644 --- a/drivers/clk/ti/clk-k3-pll.c +++ b/drivers/clk/ti/clk-k3-pll.c @@ -2,7 +2,7 @@ /* * Texas Instruments K3 SoC PLL clock driver * - * Copyright (C) 2020-2021 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/ * Tero Kristo <t-kristo@ti.com> */ diff --git a/drivers/clk/ti/clk-k3.c b/drivers/clk/ti/clk-k3.c index 10f7240f77..eb76195bd7 100644 --- a/drivers/clk/ti/clk-k3.c +++ b/drivers/clk/ti/clk-k3.c @@ -2,7 +2,7 @@ /* * Texas Instruments K3 clock driver * - * Copyright (C) 2020-2021 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/ * Tero Kristo <t-kristo@ti.com> */ diff --git a/drivers/clk/ti/clk-sci.c b/drivers/clk/ti/clk-sci.c index 8fc3254c99..9e5760d335 100644 --- a/drivers/clk/ti/clk-sci.c +++ b/drivers/clk/ti/clk-sci.c @@ -2,7 +2,7 @@ /* * Texas Instruments System Control Interface (TI SCI) clock driver * - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ * Andreas Dannenberg <dannenberg@ti.com> * * Loosely based on Linux kernel sci-clk.c... diff --git a/drivers/core/Kconfig b/drivers/core/Kconfig index 209d90e01f..1081d61fcf 100644 --- a/drivers/core/Kconfig +++ b/drivers/core/Kconfig @@ -48,7 +48,6 @@ config VPL_DM config DM_WARN bool "Enable warnings in driver model" depends on DM - default y help Enable this to see warnings related to driver model. diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c index 29a4294510..f72ea416cf 100644 --- a/drivers/core/ofnode.c +++ b/drivers/core/ofnode.c @@ -991,6 +991,24 @@ ofnode ofnode_get_chosen_node(const char *name) return ofnode_path(prop); } +int ofnode_read_baud(void) +{ + const char *str, *p; + u32 baud; + + str = ofnode_read_chosen_string("stdout-path"); + if (!str) + return -EINVAL; + + /* Parse string serial0:115200n8 */ + p = strchr(str, ':'); + if (!p) + return -EINVAL; + + baud = dectoul(p + 1, NULL); + return baud; +} + const void *ofnode_read_aliases_prop(const char *propname, int *sizep) { ofnode node; diff --git a/drivers/dma/ti/k3-psil-am64.c b/drivers/dma/ti/k3-psil-am64.c index 15742c3723..6180e2a199 100644 --- a/drivers/dma/ti/k3-psil-am64.c +++ b/drivers/dma/ti/k3-psil-am64.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com * Author: Peter Ujfalusi <peter.ujfalusi@ti.com> */ diff --git a/drivers/dma/ti/k3-psil-am654.c b/drivers/dma/ti/k3-psil-am654.c index d16c07566b..ce86600e55 100644 --- a/drivers/dma/ti/k3-psil-am654.c +++ b/drivers/dma/ti/k3-psil-am654.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com * Author: Peter Ujfalusi <peter.ujfalusi@ti.com> */ diff --git a/drivers/dma/ti/k3-psil-priv.h b/drivers/dma/ti/k3-psil-priv.h index 28078c6bd8..563bc57e20 100644 --- a/drivers/dma/ti/k3-psil-priv.h +++ b/drivers/dma/ti/k3-psil-priv.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com */ #ifndef K3_PSIL_PRIV_H_ diff --git a/drivers/dma/ti/k3-psil.c b/drivers/dma/ti/k3-psil.c index f23c8ca2b7..963321aa1e 100644 --- a/drivers/dma/ti/k3-psil.c +++ b/drivers/dma/ti/k3-psil.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com * Author: Peter Ujfalusi <peter.ujfalusi@ti.com> */ diff --git a/drivers/dma/ti/k3-psil.h b/drivers/dma/ti/k3-psil.h index 1e0fe06c0a..af60a9924e 100644 --- a/drivers/dma/ti/k3-psil.h +++ b/drivers/dma/ti/k3-psil.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com */ #ifndef K3_PSIL_H_ diff --git a/drivers/dma/ti/k3-udma-hwdef.h b/drivers/dma/ti/k3-udma-hwdef.h index 5d50bbcb03..3d6b4d10ff 100644 --- a/drivers/dma/ti/k3-udma-hwdef.h +++ b/drivers/dma/ti/k3-udma-hwdef.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com * * * This program is free software; you can redistribute it and/or modify diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c index 9273c70e9d..8a62d63dfe 100644 --- a/drivers/dma/ti/k3-udma.c +++ b/drivers/dma/ti/k3-udma.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com * Author: Peter Ujfalusi <peter.ujfalusi@ti.com> */ #define pr_fmt(fmt) "udma: " fmt diff --git a/drivers/firmware/firmware-zynqmp.c b/drivers/firmware/firmware-zynqmp.c index 43fb7fa778..8ea15c7ed3 100644 --- a/drivers/firmware/firmware-zynqmp.c +++ b/drivers/firmware/firmware-zynqmp.c @@ -203,6 +203,8 @@ int zynqmp_pm_feature(const u32 api_id) /* Check feature check API version */ ret = xilinx_pm_request(PM_FEATURE_CHECK, api_id, 0, 0, 0, ret_payload); + if (ret) + return ret; /* Return feature check version */ return ret_payload[1] & FIRMWARE_VERSION_MASK; diff --git a/drivers/firmware/scmi/sandbox-scmi_agent.c b/drivers/firmware/scmi/sandbox-scmi_agent.c index 9f5f497e0a..d131809626 100644 --- a/drivers/firmware/scmi/sandbox-scmi_agent.c +++ b/drivers/firmware/scmi/sandbox-scmi_agent.c @@ -576,7 +576,7 @@ static int sandbox_scmi_pwd_attribs(struct udevice *dev, struct scmi_msg *msg) domain_id = *(u32 *)msg->in_msg; out = (struct scmi_pwd_attrs_out *)msg->out_msg; - if (domain_id > ARRAY_SIZE(scmi_pwdom)) { + if (domain_id >= ARRAY_SIZE(scmi_pwdom)) { out->status = SCMI_NOT_FOUND; return 0; @@ -613,7 +613,7 @@ static int sandbox_scmi_pwd_state_set(struct udevice *dev, struct scmi_msg *msg) in = (struct scmi_pwd_state_set_in *)msg->in_msg; status = (s32 *)msg->out_msg; - if (in->domain_id > ARRAY_SIZE(scmi_pwdom)) { + if (in->domain_id >= ARRAY_SIZE(scmi_pwdom)) { *status = SCMI_NOT_FOUND; return 0; @@ -653,7 +653,7 @@ static int sandbox_scmi_pwd_state_get(struct udevice *dev, struct scmi_msg *msg) domain_id = *(u32 *)msg->in_msg; out = (struct scmi_pwd_state_get_out *)msg->out_msg; - if (domain_id > ARRAY_SIZE(scmi_pwdom)) { + if (domain_id >= ARRAY_SIZE(scmi_pwdom)) { out->status = SCMI_NOT_FOUND; return 0; @@ -686,7 +686,7 @@ static int sandbox_scmi_pwd_name_get(struct udevice *dev, struct scmi_msg *msg) domain_id = *(u32 *)msg->in_msg; out = (struct scmi_pwd_name_get_out *)msg->out_msg; - if (domain_id > ARRAY_SIZE(scmi_pwdom)) { + if (domain_id >= ARRAY_SIZE(scmi_pwdom)) { out->status = SCMI_NOT_FOUND; return 0; diff --git a/drivers/firmware/ti_sci.c b/drivers/firmware/ti_sci.c index 166bd78ca5..6e9f93e9a3 100644 --- a/drivers/firmware/ti_sci.c +++ b/drivers/firmware/ti_sci.c @@ -3,7 +3,7 @@ * Texas Instruments System Control Interface Protocol Driver * Based on drivers/firmware/ti_sci.c from Linux. * - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ * Lokesh Vutla <lokeshvutla@ti.com> */ diff --git a/drivers/firmware/ti_sci.h b/drivers/firmware/ti_sci.h index 101210eb21..bb8bc7beea 100644 --- a/drivers/firmware/ti_sci.h +++ b/drivers/firmware/ti_sci.h @@ -6,7 +6,7 @@ * The system works in a message response protocol * See: http://processors.wiki.ti.com/index.php/TISCI for details * - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ * Based on drivers/firmware/ti_sci.h from Linux. * */ diff --git a/drivers/firmware/ti_sci_static_data.h b/drivers/firmware/ti_sci_static_data.h index 1a461fab61..567ce8911a 100644 --- a/drivers/firmware/ti_sci_static_data.h +++ b/drivers/firmware/ti_sci_static_data.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: BSD-3-Clause */ /* - * Copyright (C) 2021 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/ * */ diff --git a/drivers/gpio/pcf8575_gpio.c b/drivers/gpio/pcf8575_gpio.c index d5930d941f..f38e215c4d 100644 --- a/drivers/gpio/pcf8575_gpio.c +++ b/drivers/gpio/pcf8575_gpio.c @@ -2,7 +2,7 @@ /* * PCF8575 I2C GPIO EXPANDER DRIVER * - * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com/ * * Vignesh R <vigneshr@ti.com> * diff --git a/drivers/mailbox/k3-sec-proxy.c b/drivers/mailbox/k3-sec-proxy.c index e0a18d8a97..05f6b1795d 100644 --- a/drivers/mailbox/k3-sec-proxy.c +++ b/drivers/mailbox/k3-sec-proxy.c @@ -2,7 +2,7 @@ /* * Texas Instruments' K3 Secure proxy Driver * - * Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2017-2018 Texas Instruments Incorporated - https://www.ti.com/ * Lokesh Vutla <lokeshvutla@ti.com> */ diff --git a/drivers/memory/ti-gpmc.c b/drivers/memory/ti-gpmc.c index f511a529b1..775e78c9a5 100644 --- a/drivers/memory/ti-gpmc.c +++ b/drivers/memory/ti-gpmc.c @@ -2,7 +2,7 @@ /* * Texas Instruments GPMC Driver * - * Copyright (C) 2021 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/ */ #include <asm/io.h> diff --git a/drivers/memory/ti-gpmc.h b/drivers/memory/ti-gpmc.h index 90f8e656c8..6fe098af0e 100644 --- a/drivers/memory/ti-gpmc.h +++ b/drivers/memory/ti-gpmc.h @@ -2,7 +2,7 @@ /* * Texas Instruments GPMC Driver * - * Copyright (C) 2021 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/ */ /* GPMC register offsets */ diff --git a/drivers/misc/esm_pmic.c b/drivers/misc/esm_pmic.c index b971f32f6a..a518f75061 100644 --- a/drivers/misc/esm_pmic.c +++ b/drivers/misc/esm_pmic.c @@ -2,7 +2,7 @@ /* * PMIC Error Signal Monitor driver * - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/ * Tero Kristo <t-kristo@ti.com> * */ diff --git a/drivers/misc/k3_avs.c b/drivers/misc/k3_avs.c index 9a088244dd..0d29eff1ac 100644 --- a/drivers/misc/k3_avs.c +++ b/drivers/misc/k3_avs.c @@ -2,7 +2,7 @@ /* * Texas Instruments' K3 Clas 0 Adaptive Voltage Scaling driver * - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/ * Tero Kristo <t-kristo@ti.com> * */ diff --git a/drivers/misc/k3_esm.c b/drivers/misc/k3_esm.c index 41faeb3d85..f6ac18bdc7 100644 --- a/drivers/misc/k3_esm.c +++ b/drivers/misc/k3_esm.c @@ -2,7 +2,7 @@ /* * Texas Instruments' K3 Error Signalling Module driver * - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/ * Tero Kristo <t-kristo@ti.com> * */ diff --git a/drivers/misc/rockchip-otp.c b/drivers/misc/rockchip-otp.c index 4814e0e501..4f757083a1 100644 --- a/drivers/misc/rockchip-otp.c +++ b/drivers/misc/rockchip-otp.c @@ -61,11 +61,20 @@ #define RK3588_OTPC_INT_ST 0x0084 #define RK3588_RD_DONE BIT(1) +#define RV1126_OTP_NVM_CEB 0x00 +#define RV1126_OTP_NVM_RSTB 0x04 +#define RV1126_OTP_NVM_ST 0x18 +#define RV1126_OTP_NVM_RADDR 0x1C +#define RV1126_OTP_NVM_RSTART 0x20 +#define RV1126_OTP_NVM_RDATA 0x24 +#define RV1126_OTP_READ_ST 0x30 + struct rockchip_otp_plat { void __iomem *base; }; struct rockchip_otp_data { + int (*init)(struct udevice *dev); int (*read)(struct udevice *dev, int offset, void *buf, int size); int offset; int size; @@ -232,6 +241,48 @@ static int rockchip_rk3588_otp_read(struct udevice *dev, int offset, return 0; } +static int rockchip_rv1126_otp_init(struct udevice *dev) +{ + struct rockchip_otp_plat *otp = dev_get_plat(dev); + int ret; + + writel(0x0, otp->base + RV1126_OTP_NVM_CEB); + ret = rockchip_otp_poll_timeout(otp, 0x1, RV1126_OTP_NVM_ST); + + if (ret) + return ret; + + writel(0x1, otp->base + RV1126_OTP_NVM_RSTB); + ret = rockchip_otp_poll_timeout(otp, 0x4, RV1126_OTP_NVM_ST); + + if (ret) + return ret; + + return 0; +} + +static int rockchip_rv1126_otp_read(struct udevice *dev, int offset, void *buf, + int size) +{ + struct rockchip_otp_plat *otp = dev_get_plat(dev); + u32 status = 0; + u8 *buffer = buf; + int ret = 0; + + while (size--) { + writel(offset++, otp->base + RV1126_OTP_NVM_RADDR); + writel(0x1, otp->base + RV1126_OTP_NVM_RSTART); + ret = readl_poll_timeout(otp->base + RV1126_OTP_READ_ST, + status, !status, OTPC_TIMEOUT); + if (ret) + return ret; + + *buffer++ = (u8)(readl(otp->base + RV1126_OTP_NVM_RDATA) & 0xFF); + } + + return 0; +} + static int rockchip_otp_read(struct udevice *dev, int offset, void *buf, int size) { @@ -286,6 +337,20 @@ static int rockchip_otp_of_to_plat(struct udevice *dev) return 0; } +static int rockchip_otp_probe(struct udevice *dev) +{ + struct rockchip_otp_data *data; + + data = (struct rockchip_otp_data *)dev_get_driver_data(dev); + if (!data) + return -EINVAL; + + if (data->init) + return data->init(dev); + + return 0; +} + static const struct rockchip_otp_data px30_data = { .read = rockchip_px30_otp_read, .size = 0x40, @@ -304,6 +369,12 @@ static const struct rockchip_otp_data rk3588_data = { .block_size = 4, }; +static const struct rockchip_otp_data rv1126_data = { + .init = rockchip_rv1126_otp_init, + .read = rockchip_rv1126_otp_read, + .size = 0x40, +}; + static const struct udevice_id rockchip_otp_ids[] = { { .compatible = "rockchip,px30-otp", @@ -321,6 +392,10 @@ static const struct udevice_id rockchip_otp_ids[] = { .compatible = "rockchip,rk3588-otp", .data = (ulong)&rk3588_data, }, + { + .compatible = "rockchip,rv1126-otp", + .data = (ulong)&rv1126_data, + }, {} }; @@ -331,4 +406,5 @@ U_BOOT_DRIVER(rockchip_otp) = { .of_to_plat = rockchip_otp_of_to_plat, .plat_auto = sizeof(struct rockchip_otp_plat), .ops = &rockchip_otp_ops, + .probe = rockchip_otp_probe, }; diff --git a/drivers/mmc/am654_sdhci.c b/drivers/mmc/am654_sdhci.c index fd667aeafd..05595bdac3 100644 --- a/drivers/mmc/am654_sdhci.c +++ b/drivers/mmc/am654_sdhci.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ * * Texas Instruments' K3 SD Host Controller Interface */ diff --git a/drivers/mmc/renesas-sdhi.c b/drivers/mmc/renesas-sdhi.c index 8cd501c5f7..97aaf1e4ec 100644 --- a/drivers/mmc/renesas-sdhi.c +++ b/drivers/mmc/renesas-sdhi.c @@ -318,7 +318,7 @@ static unsigned int renesas_sdhi_init_tuning(struct tmio_sd_priv *priv) RENESAS_SDHI_SCC_DTCNTL_TAPNUM_MASK; } -static void renesas_sdhi_reset_tuning(struct tmio_sd_priv *priv) +static void renesas_sdhi_reset_tuning(struct tmio_sd_priv *priv, bool clk_disable) { u32 reg; @@ -350,6 +350,12 @@ static void renesas_sdhi_reset_tuning(struct tmio_sd_priv *priv) reg = tmio_sd_readl(priv, RENESAS_SDHI_SCC_RVSCNTL); reg &= ~RENESAS_SDHI_SCC_RVSCNTL_RVSEN; tmio_sd_writel(priv, reg, RENESAS_SDHI_SCC_RVSCNTL); + + if (clk_disable) { + reg = tmio_sd_readl(priv, TMIO_SD_CLKCTL); + reg &= ~TMIO_SD_CLKCTL_SCLKEN; + tmio_sd_writel(priv, reg, TMIO_SD_CLKCTL); + } } static int renesas_sdhi_hs400(struct udevice *dev) @@ -629,7 +635,7 @@ int renesas_sdhi_execute_tuning(struct udevice *dev, uint opcode) out: if (ret < 0) { dev_warn(dev, "Tuning procedure failed\n"); - renesas_sdhi_reset_tuning(priv); + renesas_sdhi_reset_tuning(priv, true); } return ret; @@ -668,7 +674,7 @@ static int renesas_sdhi_set_ios(struct udevice *dev) (mmc->selected_mode != UHS_SDR104) && (mmc->selected_mode != MMC_HS_200) && (mmc->selected_mode != MMC_HS_400)) { - renesas_sdhi_reset_tuning(priv); + renesas_sdhi_reset_tuning(priv, mmc->clk_disable); } #endif @@ -1095,7 +1101,7 @@ static int renesas_sdhi_probe(struct udevice *dev) CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) || \ CONFIG_IS_ENABLED(MMC_HS400_SUPPORT) if (priv->caps & TMIO_SD_CAP_RCAR_UHS) - renesas_sdhi_reset_tuning(priv); + renesas_sdhi_reset_tuning(priv, true); #endif return 0; diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c index 4d6351bf27..714706d241 100644 --- a/drivers/mmc/sunxi_mmc.c +++ b/drivers/mmc/sunxi_mmc.c @@ -25,10 +25,14 @@ #include <asm/io.h> #include <asm/arch/clock.h> #include <asm/arch/cpu.h> +#if !CONFIG_IS_ENABLED(DM_MMC) #include <asm/arch/mmc.h> +#endif #include <linux/delay.h> #include <sunxi_gpio.h> +#include "sunxi_mmc.h" + #ifndef CCM_MMC_CTRL_MODE_SEL_NEW #define CCM_MMC_CTRL_MODE_SEL_NEW 0 #endif @@ -701,13 +705,13 @@ static const struct udevice_id sunxi_mmc_ids[] = { { .compatible = "allwinner,sun7i-a20-mmc" }, { .compatible = "allwinner,sun8i-a83t-emmc" }, { .compatible = "allwinner,sun9i-a80-mmc" }, + { .compatible = "allwinner,sun20i-d1-mmc" }, { .compatible = "allwinner,sun50i-a64-mmc" }, { .compatible = "allwinner,sun50i-a64-emmc" }, { .compatible = "allwinner,sun50i-h6-mmc" }, { .compatible = "allwinner,sun50i-h6-emmc" }, { .compatible = "allwinner,sun50i-a100-mmc" }, { .compatible = "allwinner,sun50i-a100-emmc" }, - { .compatible = "allwinner,sun20i-d1-mmc" }, { /* sentinel */ } }; diff --git a/drivers/mmc/sunxi_mmc.h b/drivers/mmc/sunxi_mmc.h new file mode 100644 index 0000000000..f4ae5a790c --- /dev/null +++ b/drivers/mmc/sunxi_mmc.h @@ -0,0 +1,138 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2007-2011 + * Allwinner Technology Co., Ltd. <www.allwinnertech.com> + * Aaron <leafy.myeh@allwinnertech.com> + * + * MMC register definition for allwinner sunxi platform. + */ + +#ifndef _SUNXI_MMC_H +#define _SUNXI_MMC_H + +#include <linux/types.h> + +struct sunxi_mmc { + u32 gctrl; /* 0x00 global control */ + u32 clkcr; /* 0x04 clock control */ + u32 timeout; /* 0x08 time out */ + u32 width; /* 0x0c bus width */ + u32 blksz; /* 0x10 block size */ + u32 bytecnt; /* 0x14 byte count */ + u32 cmd; /* 0x18 command */ + u32 arg; /* 0x1c argument */ + u32 resp0; /* 0x20 response 0 */ + u32 resp1; /* 0x24 response 1 */ + u32 resp2; /* 0x28 response 2 */ + u32 resp3; /* 0x2c response 3 */ + u32 imask; /* 0x30 interrupt mask */ + u32 mint; /* 0x34 masked interrupt status */ + u32 rint; /* 0x38 raw interrupt status */ + u32 status; /* 0x3c status */ + u32 ftrglevel; /* 0x40 FIFO threshold watermark*/ + u32 funcsel; /* 0x44 function select */ + u32 cbcr; /* 0x48 CIU byte count */ + u32 bbcr; /* 0x4c BIU byte count */ + u32 dbgc; /* 0x50 debug enable */ + u32 res0; /* 0x54 reserved */ + u32 a12a; /* 0x58 Auto command 12 argument */ + u32 ntsr; /* 0x5c New timing set register */ + u32 res1[8]; + u32 dmac; /* 0x80 internal DMA control */ + u32 dlba; /* 0x84 internal DMA descr list base address */ + u32 idst; /* 0x88 internal DMA status */ + u32 idie; /* 0x8c internal DMA interrupt enable */ + u32 chda; /* 0x90 */ + u32 cbda; /* 0x94 */ + u32 res2[26]; +#if defined(CONFIG_SUNXI_GEN_SUN6I) || defined(CONFIG_SUN50I_GEN_H6) || defined(CONFIG_SUNXI_GEN_NCAT2) + u32 res3[17]; + u32 samp_dl; + u32 res4[46]; +#endif + u32 fifo; /* 0x100 / 0x200 FIFO access address */ +}; + +#define SUNXI_MMC_CLK_POWERSAVE (0x1 << 17) +#define SUNXI_MMC_CLK_ENABLE (0x1 << 16) +#define SUNXI_MMC_CLK_DIVIDER_MASK (0xff) + +#define SUNXI_MMC_GCTRL_SOFT_RESET (0x1 << 0) +#define SUNXI_MMC_GCTRL_FIFO_RESET (0x1 << 1) +#define SUNXI_MMC_GCTRL_DMA_RESET (0x1 << 2) +#define SUNXI_MMC_GCTRL_RESET (SUNXI_MMC_GCTRL_SOFT_RESET|\ + SUNXI_MMC_GCTRL_FIFO_RESET|\ + SUNXI_MMC_GCTRL_DMA_RESET) +#define SUNXI_MMC_GCTRL_DMA_ENABLE (0x1 << 5) +#define SUNXI_MMC_GCTRL_ACCESS_BY_AHB (0x1 << 31) + +#define SUNXI_MMC_CMD_RESP_EXPIRE (0x1 << 6) +#define SUNXI_MMC_CMD_LONG_RESPONSE (0x1 << 7) +#define SUNXI_MMC_CMD_CHK_RESPONSE_CRC (0x1 << 8) +#define SUNXI_MMC_CMD_DATA_EXPIRE (0x1 << 9) +#define SUNXI_MMC_CMD_WRITE (0x1 << 10) +#define SUNXI_MMC_CMD_AUTO_STOP (0x1 << 12) +#define SUNXI_MMC_CMD_WAIT_PRE_OVER (0x1 << 13) +#define SUNXI_MMC_CMD_SEND_INIT_SEQ (0x1 << 15) +#define SUNXI_MMC_CMD_UPCLK_ONLY (0x1 << 21) +#define SUNXI_MMC_CMD_START (0x1 << 31) + +#define SUNXI_MMC_RINT_RESP_ERROR (0x1 << 1) +#define SUNXI_MMC_RINT_COMMAND_DONE (0x1 << 2) +#define SUNXI_MMC_RINT_DATA_OVER (0x1 << 3) +#define SUNXI_MMC_RINT_TX_DATA_REQUEST (0x1 << 4) +#define SUNXI_MMC_RINT_RX_DATA_REQUEST (0x1 << 5) +#define SUNXI_MMC_RINT_RESP_CRC_ERROR (0x1 << 6) +#define SUNXI_MMC_RINT_DATA_CRC_ERROR (0x1 << 7) +#define SUNXI_MMC_RINT_RESP_TIMEOUT (0x1 << 8) +#define SUNXI_MMC_RINT_DATA_TIMEOUT (0x1 << 9) +#define SUNXI_MMC_RINT_VOLTAGE_CHANGE_DONE (0x1 << 10) +#define SUNXI_MMC_RINT_FIFO_RUN_ERROR (0x1 << 11) +#define SUNXI_MMC_RINT_HARD_WARE_LOCKED (0x1 << 12) +#define SUNXI_MMC_RINT_START_BIT_ERROR (0x1 << 13) +#define SUNXI_MMC_RINT_AUTO_COMMAND_DONE (0x1 << 14) +#define SUNXI_MMC_RINT_END_BIT_ERROR (0x1 << 15) +#define SUNXI_MMC_RINT_SDIO_INTERRUPT (0x1 << 16) +#define SUNXI_MMC_RINT_CARD_INSERT (0x1 << 30) +#define SUNXI_MMC_RINT_CARD_REMOVE (0x1 << 31) +#define SUNXI_MMC_RINT_INTERRUPT_ERROR_BIT \ + (SUNXI_MMC_RINT_RESP_ERROR | \ + SUNXI_MMC_RINT_RESP_CRC_ERROR | \ + SUNXI_MMC_RINT_DATA_CRC_ERROR | \ + SUNXI_MMC_RINT_RESP_TIMEOUT | \ + SUNXI_MMC_RINT_DATA_TIMEOUT | \ + SUNXI_MMC_RINT_VOLTAGE_CHANGE_DONE | \ + SUNXI_MMC_RINT_FIFO_RUN_ERROR | \ + SUNXI_MMC_RINT_HARD_WARE_LOCKED | \ + SUNXI_MMC_RINT_START_BIT_ERROR | \ + SUNXI_MMC_RINT_END_BIT_ERROR) /* 0xbfc2 */ +#define SUNXI_MMC_RINT_INTERRUPT_DONE_BIT \ + (SUNXI_MMC_RINT_AUTO_COMMAND_DONE | \ + SUNXI_MMC_RINT_DATA_OVER | \ + SUNXI_MMC_RINT_COMMAND_DONE | \ + SUNXI_MMC_RINT_VOLTAGE_CHANGE_DONE) + +#define SUNXI_MMC_STATUS_RXWL_FLAG (0x1 << 0) +#define SUNXI_MMC_STATUS_TXWL_FLAG (0x1 << 1) +#define SUNXI_MMC_STATUS_FIFO_EMPTY (0x1 << 2) +#define SUNXI_MMC_STATUS_FIFO_FULL (0x1 << 3) +#define SUNXI_MMC_STATUS_CARD_PRESENT (0x1 << 8) +#define SUNXI_MMC_STATUS_CARD_DATA_BUSY (0x1 << 9) +#define SUNXI_MMC_STATUS_DATA_FSM_BUSY (0x1 << 10) +#define SUNXI_MMC_STATUS_FIFO_LEVEL(reg) (((reg) >> 17) & 0x3fff) + +#define SUNXI_MMC_NTSR_MODE_SEL_NEW (0x1 << 31) + +#define SUNXI_MMC_IDMAC_RESET (0x1 << 0) +#define SUNXI_MMC_IDMAC_FIXBURST (0x1 << 1) +#define SUNXI_MMC_IDMAC_ENABLE (0x1 << 7) + +#define SUNXI_MMC_IDIE_TXIRQ (0x1 << 0) +#define SUNXI_MMC_IDIE_RXIRQ (0x1 << 1) + +#define SUNXI_MMC_COMMON_CLK_GATE (1 << 16) +#define SUNXI_MMC_COMMON_RESET (1 << 18) + +#define SUNXI_MMC_CAL_DL_SW_EN (0x1 << 7) + +#endif /* _SUNXI_MMC_H */ diff --git a/drivers/mtd/hbmc-am654.c b/drivers/mtd/hbmc-am654.c index c86e504da3..8161087b50 100644 --- a/drivers/mtd/hbmc-am654.c +++ b/drivers/mtd/hbmc-am654.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 // -// Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ +// Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/ // Author: Vignesh Raghavendra <vigneshr@ti.com> #include <common.h> diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig index 2b2efc8531..732b076045 100644 --- a/drivers/mtd/spi/Kconfig +++ b/drivers/mtd/spi/Kconfig @@ -134,6 +134,13 @@ config SPI_FLASH_BAR Bank/Extended address registers are used to access the flash which has size > 16MiB in 3-byte addressing. +config SPI_FLASH_LOCK + bool "Enable the Locking feature" + default y + help + Enable the SPI flash lock support. By default this is set to y. + If you intend not to use the lock support you should say n here. + config SPI_FLASH_UNLOCK_ALL bool "Unlock the entire SPI flash on u-boot startup" default y diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index db20feb4da..9a1801ba93 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -1100,6 +1100,7 @@ static int spansion_erase_non_uniform(struct spi_nor *nor, u32 addr, } #endif +#if defined(CONFIG_SPI_FLASH_LOCK) #if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST) /* Write status register and ensure bits in mask match written values */ static int write_sr_and_check(struct spi_nor *nor, u8 status_new, u8 mask) @@ -1387,6 +1388,7 @@ static int stm_is_unlocked(struct spi_nor *nor, loff_t ofs, uint64_t len) return stm_is_unlocked_sr(nor, ofs, len, status); } #endif /* CONFIG_SPI_FLASH_STMICRO */ +#endif static const struct flash_info *spi_nor_read_id(struct spi_nor *nor) { @@ -1462,6 +1464,7 @@ read_err: return ret; } +#if defined(CONFIG_SPI_FLASH_LOCK) #ifdef CONFIG_SPI_FLASH_SST /* * sst26 flash series has its own block protection implementation: @@ -1730,6 +1733,8 @@ sst_write_err: return ret; } #endif +#endif + /* * Write an address range to the nor chip. Data must be written in * FLASH_PAGESIZE chunks. The address range may be any size provided @@ -4104,6 +4109,7 @@ int spi_nor_scan(struct spi_nor *nor) mtd->_read = spi_nor_read; mtd->_write = spi_nor_write; +#if defined(CONFIG_SPI_FLASH_LOCK) #if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST) /* NOR protection support for STmicro/Micron chips and similar */ if (JEDEC_MFR(info) == SNOR_MFR_ST || @@ -4127,7 +4133,7 @@ int spi_nor_scan(struct spi_nor *nor) nor->flash_is_unlocked = sst26_is_unlocked; } #endif - +#endif if (info->flags & USE_FSR) nor->flags |= SNOR_F_USE_FSR; if (info->flags & SPI_NOR_HAS_TB) diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index 77eb9f352c..3cb132dcff 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -3,7 +3,7 @@ * * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc. * Copyright (C) 2016 Jagan Teki <jagan@openedev.com> - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ */ #include <common.h> diff --git a/drivers/mux/mux-uclass.c b/drivers/mux/mux-uclass.c index 8870305313..c98576ceb8 100644 --- a/drivers/mux/mux-uclass.c +++ b/drivers/mux/mux-uclass.c @@ -7,7 +7,7 @@ * Copyright (C) 2017 Axentia Technologies AB * Author: Peter Rosin <peda@axentia.se> * - * Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2017-2018 Texas Instruments Incorporated - https://www.ti.com/ * Jean-Jacques Hiblot <jjhiblot@ti.com> */ diff --git a/drivers/net/phy/et1011c.c b/drivers/net/phy/et1011c.c index fa4831427d..db879bc73f 100644 --- a/drivers/net/phy/et1011c.c +++ b/drivers/net/phy/et1011c.c @@ -3,7 +3,7 @@ * ET1011C PHY driver * * Derived from Linux kernel driver by Chaithrika U S - * Copyright (C) 2013, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2013, Texas Instruments, Incorporated - https://www.ti.com/ */ #include <config.h> #include <phy.h> diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c index 4ba9ee1529..a12f7e32e8 100644 --- a/drivers/net/sun8i_emac.c +++ b/drivers/net/sun8i_emac.c @@ -168,9 +168,7 @@ struct emac_eth_dev { struct clk ephy_clk; struct reset_ctl tx_rst; struct reset_ctl ephy_rst; -#if CONFIG_IS_ENABLED(DM_GPIO) struct gpio_desc reset_gpio; -#endif struct udevice *phy_reg; }; @@ -617,7 +615,6 @@ err_tx_clk: return ret; } -#if CONFIG_IS_ENABLED(DM_GPIO) static int sun8i_mdio_reset(struct mii_dev *bus) { struct udevice *dev = bus->priv; @@ -649,7 +646,6 @@ static int sun8i_mdio_reset(struct mii_dev *bus) return 0; } -#endif static int sun8i_mdio_init(const char *name, struct udevice *priv) { @@ -664,9 +660,7 @@ static int sun8i_mdio_init(const char *name, struct udevice *priv) bus->write = sun8i_mdio_write; snprintf(bus->name, sizeof(bus->name), name); bus->priv = (void *)priv; -#if CONFIG_IS_ENABLED(DM_GPIO) bus->reset = sun8i_mdio_reset; -#endif return mdio_register(bus); } @@ -783,9 +777,7 @@ static int sun8i_emac_eth_of_to_plat(struct udevice *dev) const fdt32_t *reg; int node = dev_of_offset(dev); int offset = 0; -#if CONFIG_IS_ENABLED(DM_GPIO) int reset_flags = GPIOD_IS_OUT; -#endif int ret; pdata->iobase = dev_read_addr(dev); @@ -872,7 +864,6 @@ static int sun8i_emac_eth_of_to_plat(struct udevice *dev) printf("%s: Invalid RX delay value %d\n", __func__, sun8i_pdata->rx_delay_ps); -#if CONFIG_IS_ENABLED(DM_GPIO) if (fdtdec_get_bool(gd->fdt_blob, dev_of_offset(dev), "snps,reset-active-low")) reset_flags |= GPIOD_ACTIVE_LOW; @@ -887,7 +878,6 @@ static int sun8i_emac_eth_of_to_plat(struct udevice *dev) } else if (ret == -ENOENT) { ret = 0; } -#endif return 0; } diff --git a/drivers/net/ti/Kconfig b/drivers/net/ti/Kconfig index 02660e4fbb..c75f418628 100644 --- a/drivers/net/ti/Kconfig +++ b/drivers/net/ti/Kconfig @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0+ # -# Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ +# Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ config DRIVER_TI_CPSW bool "TI Common Platform Ethernet Switch" diff --git a/drivers/net/ti/Makefile b/drivers/net/ti/Makefile index 8d3808bb4b..0ce0cf2828 100644 --- a/drivers/net/ti/Makefile +++ b/drivers/net/ti/Makefile @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0+ # -# Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ +# Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ obj-$(CONFIG_DRIVER_TI_CPSW) += cpsw.o cpsw-common.o cpsw_mdio.o obj-$(CONFIG_DRIVER_TI_EMAC) += davinci_emac.o diff --git a/drivers/net/ti/cpsw.c b/drivers/net/ti/cpsw.c index 877be7fca5..9a5e9642df 100644 --- a/drivers/net/ti/cpsw.c +++ b/drivers/net/ti/cpsw.c @@ -2,7 +2,7 @@ /* * CPSW Ethernet Switch Driver * - * Copyright (C) 2010-2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2010-2018 Texas Instruments Incorporated - https://www.ti.com/ */ #include <common.h> diff --git a/drivers/net/ti/cpsw_mdio.c b/drivers/net/ti/cpsw_mdio.c index ac791faa81..74cc956785 100644 --- a/drivers/net/ti/cpsw_mdio.c +++ b/drivers/net/ti/cpsw_mdio.c @@ -2,7 +2,7 @@ /* * CPSW MDIO generic driver for TI AMxx/K2x/EMAC devices. * - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ */ #include <common.h> diff --git a/drivers/net/ti/cpsw_mdio.h b/drivers/net/ti/cpsw_mdio.h index 9b98763656..ddf65a4686 100644 --- a/drivers/net/ti/cpsw_mdio.h +++ b/drivers/net/ti/cpsw_mdio.h @@ -2,7 +2,7 @@ /* * CPSW MDIO generic driver API for TI AMxx/K2x/EMAC devices. * - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ */ #ifndef CPSW_MDIO_H_ diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile index 5d4de86e71..2e8723186c 100644 --- a/drivers/phy/Makefile +++ b/drivers/phy/Makefile @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0+ # -# Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ +# Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ # Written by Jean-Jacques Hiblot <jjhiblot@ti.com> obj-y += allwinner/ diff --git a/drivers/phy/cadence/phy-cadence-sierra.c b/drivers/phy/cadence/phy-cadence-sierra.c index fc5044fd5d..4bb8a0ca7f 100644 --- a/drivers/phy/cadence/phy-cadence-sierra.c +++ b/drivers/phy/cadence/phy-cadence-sierra.c @@ -7,7 +7,7 @@ * Copyright (c) 2018 Cadence Design Systems * Author: Alan Douglas <adouglas@cadence.com> * - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/ * Jean-Jacques Hiblot <jjhiblot@ti.com> * */ diff --git a/drivers/phy/keystone-usb-phy.c b/drivers/phy/keystone-usb-phy.c index 6799e23237..3bb9c0814c 100644 --- a/drivers/phy/keystone-usb-phy.c +++ b/drivers/phy/keystone-usb-phy.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ * Written by Jean-Jacques Hiblot <jjhiblot@ti.com> */ diff --git a/drivers/phy/nop-phy.c b/drivers/phy/nop-phy.c index d0904f4f07..c53e3216d0 100644 --- a/drivers/phy/nop-phy.c +++ b/drivers/phy/nop-phy.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ * Written by Jean-Jacques Hiblot <jjhiblot@ti.com> */ diff --git a/drivers/phy/omap-usb2-phy.c b/drivers/phy/omap-usb2-phy.c index 2a9604cdcc..d3d38062ec 100644 --- a/drivers/phy/omap-usb2-phy.c +++ b/drivers/phy/omap-usb2-phy.c @@ -2,7 +2,7 @@ /* * OMAP USB2 PHY LAYER * - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com * Written by Jean-Jacques Hiblot <jjhiblot@ti.com> */ diff --git a/drivers/phy/phy-uclass.c b/drivers/phy/phy-uclass.c index 22f2fe9148..0dcfe258bc 100644 --- a/drivers/phy/phy-uclass.c +++ b/drivers/phy/phy-uclass.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ * Written by Jean-Jacques Hiblot <jjhiblot@ti.com> */ diff --git a/drivers/phy/sandbox-phy.c b/drivers/phy/sandbox-phy.c index 7b3d988613..7e123da25f 100644 --- a/drivers/phy/sandbox-phy.c +++ b/drivers/phy/sandbox-phy.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ * Written by Jean-Jacques Hiblot <jjhiblot@ti.com> */ diff --git a/drivers/phy/ti-pipe3-phy.c b/drivers/phy/ti-pipe3-phy.c index 313735844a..29a35ae5ff 100644 --- a/drivers/phy/ti-pipe3-phy.c +++ b/drivers/phy/ti-pipe3-phy.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ * Written by Jean-Jacques Hiblot <jjhiblot@ti.com> */ diff --git a/drivers/phy/ti/phy-j721e-wiz.c b/drivers/phy/ti/phy-j721e-wiz.c index 7261339907..daf62f5ded 100644 --- a/drivers/phy/ti/phy-j721e-wiz.c +++ b/drivers/phy/ti/phy-j721e-wiz.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2017-2018 Texas Instruments Incorporated - https://www.ti.com/ * Jean-Jacques Hiblot <jjhiblot@ti.com> */ diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c index bdf6360f17..37ea93715d 100644 --- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c +++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c @@ -50,7 +50,7 @@ static const char *sunxi_pinctrl_get_pin_name(struct udevice *dev, uint pin_selector) { const struct sunxi_pinctrl_desc *desc = dev_get_priv(dev); - static char pin_name[sizeof("PN31")]; + static char pin_name[sizeof("PN31")] __section(".data"); snprintf(pin_name, sizeof(pin_name), "P%c%d", pin_selector / SUNXI_GPIOS_PER_BANK + desc->first_bank + 'A', diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig index 7f3b990d23..2395720c99 100644 --- a/drivers/power/Kconfig +++ b/drivers/power/Kconfig @@ -101,6 +101,15 @@ config AXP305_POWER Select this to enable support for the axp305 pmic found on most H616 boards. +config AXP313_POWER + bool "axp313 pmic support" + depends on MACH_SUN50I_H616 + select AXP_PMIC_BUS + select CMD_POWEROFF + ---help--- + Select this to enable support for the AXP313 PMIC found on some + H616 boards. + config AXP809_POWER bool "axp809 pmic support" depends on MACH_SUN9I @@ -143,9 +152,10 @@ config AXP_DCDC1_VOLT config AXP_DCDC2_VOLT int "axp pmic dcdc2 voltage" - depends on AXP152_POWER || AXP209_POWER || AXP221_POWER || AXP809_POWER || AXP818_POWER + depends on AXP152_POWER || AXP209_POWER || AXP221_POWER || AXP809_POWER || AXP818_POWER || AXP313_POWER default 900 if AXP818_POWER default 1400 if AXP152_POWER || AXP209_POWER + default 1000 if AXP313_POWER default 1200 if MACH_SUN6I default 1100 if MACH_SUN8I default 0 if MACH_SUN9I @@ -158,13 +168,15 @@ config AXP_DCDC2_VOLT On A80 boards dcdc2 powers the GPU and can be left off. On A83T boards dcdc2 is used for VDD-CPUA(cluster 0) and should be 0.9V. On R40 boards dcdc2 is VDD-CPU and should be 1.1V + On boards using the AXP313 it's often VDD-CPU. config AXP_DCDC3_VOLT int "axp pmic dcdc3 voltage" - depends on AXP152_POWER || AXP209_POWER || AXP221_POWER || AXP809_POWER || AXP818_POWER + depends on AXP152_POWER || AXP209_POWER || AXP221_POWER || AXP809_POWER || AXP818_POWER || AXP313_POWER default 900 if AXP809_POWER || AXP818_POWER default 1500 if AXP152_POWER default 1250 if AXP209_POWER + default 1100 if AXP313_POWER default 1100 if MACH_SUN8I_R40 default 1200 if MACH_SUN6I || MACH_SUN8I ---help--- @@ -177,10 +189,11 @@ config AXP_DCDC3_VOLT On A80 boards dcdc3 is used for VDD-CPUA(cluster 0) and should be 0.9V. On A83T boards dcdc3 is used for VDD-CPUB(cluster 1) and should be 0.9V. On R40 boards dcdc3 is VDD-SYS and VDD-GPU and should be 1.1V. + On boards using the AXP313 it's often VDD-DRAM and should be 1.1V for LPDDR4. config AXP_DCDC4_VOLT int "axp pmic dcdc4 voltage" - depends on AXP152_POWER || AXP221_POWER || AXP809_POWER || AXP818_POWER || AXP305_POWER + depends on AXP152_POWER || AXP221_POWER || AXP809_POWER || AXP305_POWER default 1250 if AXP152_POWER default 1200 if MACH_SUN6I default 0 if MACH_SUN8I diff --git a/drivers/power/Makefile b/drivers/power/Makefile index ba64b2c593..c7ee4595fc 100644 --- a/drivers/power/Makefile +++ b/drivers/power/Makefile @@ -12,6 +12,7 @@ obj-$(CONFIG_AXP152_POWER) += axp152.o obj-$(CONFIG_AXP209_POWER) += axp209.o obj-$(CONFIG_AXP221_POWER) += axp221.o obj-$(CONFIG_AXP305_POWER) += axp305.o +obj-$(CONFIG_AXP313_POWER) += axp313.o obj-$(CONFIG_AXP809_POWER) += axp809.o obj-$(CONFIG_AXP818_POWER) += axp818.o obj-$(CONFIG_EXYNOS_TMU) += exynos-tmu.o diff --git a/drivers/power/axp313.c b/drivers/power/axp313.c new file mode 100644 index 0000000000..bbc9e91111 --- /dev/null +++ b/drivers/power/axp313.c @@ -0,0 +1,134 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * AXP313(a) driver + * + * (C) Copyright 2023 Arm Ltd. + * + * Based on axp305.c + * (C) Copyright 2020 Jernej Skrabec <jernej.skrabec@siol.net> + * (C) Copyright 2014 Hans de Goede <hdegoede@redhat.com> + * (C) Copyright 2013 Oliver Schinagl <oliver@schinagl.nl> + */ + +#include <common.h> +#include <command.h> +#include <errno.h> +#include <asm/arch/pmic_bus.h> +#include <axp_pmic.h> + +enum axp313_reg { + AXP313_CHIP_VERSION = 0x03, + AXP313_OUTPUT_CTRL = 0x10, + AXP313_DCDC1_CTRL = 0x13, + AXP313_SHUTDOWN = 0x1a, +}; + +#define AXP313_CHIP_VERSION_MASK 0xcf +#define AXP313_CHIP_VERSION_AXP1530 0x48 +#define AXP313_CHIP_VERSION_AXP313A 0x4b +#define AXP313_CHIP_VERSION_AXP313B 0x4c + +#define AXP313_DCDC_SPLIT_OFFSET 71 +#define AXP313_DCDC_SPLIT_MVOLT 1200 + +#define AXP313_POWEROFF BIT(7) + +static u8 mvolt_to_cfg(int mvolt, int min, int max, int div) +{ + if (mvolt < min) + mvolt = min; + else if (mvolt > max) + mvolt = max; + + return (mvolt - min) / div; +} + +static int axp_set_dcdc(int dcdc_num, unsigned int mvolt) +{ + int ret; + u8 cfg, enable_mask = 1U << (dcdc_num - 1); + int volt_reg = AXP313_DCDC1_CTRL + dcdc_num - 1; + int max_mV; + + switch (dcdc_num) { + case 1: + case 2: + max_mV = 1540; + break; + case 3: + /* + * The manual defines a different split point, but tests + * show that it's the same 1200mV as for DCDC1/2. + */ + max_mV = 1840; + break; + default: + return -EINVAL; + } + + if (mvolt > AXP313_DCDC_SPLIT_MVOLT) + cfg = AXP313_DCDC_SPLIT_OFFSET + mvolt_to_cfg(mvolt, + AXP313_DCDC_SPLIT_MVOLT + 20, max_mV, 20); + else + cfg = mvolt_to_cfg(mvolt, 500, AXP313_DCDC_SPLIT_MVOLT, 10); + + if (mvolt == 0) + return pmic_bus_clrbits(AXP313_OUTPUT_CTRL, enable_mask); + + debug("DCDC%d: writing 0x%x to reg 0x%x\n", dcdc_num, cfg, volt_reg); + ret = pmic_bus_write(volt_reg, cfg); + if (ret) + return ret; + + return pmic_bus_setbits(AXP313_OUTPUT_CTRL, enable_mask); +} + +int axp_set_dcdc2(unsigned int mvolt) +{ + return axp_set_dcdc(2, mvolt); +} + +int axp_set_dcdc3(unsigned int mvolt) +{ + return axp_set_dcdc(3, mvolt); +} + +int axp_init(void) +{ + u8 axp_chip_id; + int ret; + + ret = pmic_bus_init(); + if (ret) + return ret; + + ret = pmic_bus_read(AXP313_CHIP_VERSION, &axp_chip_id); + if (ret) + return ret; + + axp_chip_id &= AXP313_CHIP_VERSION_MASK; + switch (axp_chip_id) { + case AXP313_CHIP_VERSION_AXP1530: + case AXP313_CHIP_VERSION_AXP313A: + case AXP313_CHIP_VERSION_AXP313B: + break; + default: + debug("unknown PMIC: 0x%x\n", axp_chip_id); + return -EINVAL; + } + + return ret; +} + +#if !CONFIG_IS_ENABLED(ARM_PSCI_FW) && !IS_ENABLED(CONFIG_SYSRESET_CMD_POWEROFF) +int do_poweroff(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) +{ + pmic_bus_write(AXP313_SHUTDOWN, AXP313_POWEROFF); + + /* infinite loop during shutdown */ + while (1) {} + + /* not reached */ + return 0; +} +#endif diff --git a/drivers/power/domain/ti-power-domain.c b/drivers/power/domain/ti-power-domain.c index 9e7151307c..b34c982f4f 100644 --- a/drivers/power/domain/ti-power-domain.c +++ b/drivers/power/domain/ti-power-domain.c @@ -2,7 +2,7 @@ /* * Texas Instruments power domain driver * - * Copyright (C) 2020-2021 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/ * Tero Kristo <t-kristo@ti.com> */ diff --git a/drivers/power/domain/ti-sci-power-domain.c b/drivers/power/domain/ti-sci-power-domain.c index 0140e5e521..8d6abe13db 100644 --- a/drivers/power/domain/ti-sci-power-domain.c +++ b/drivers/power/domain/ti-sci-power-domain.c @@ -2,7 +2,7 @@ /* * Texas Instruments System Control Interface (TI SCI) power domain driver * - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ * Andreas Dannenberg <dannenberg@ti.com> * * Loosely based on Linux kernel ti_sci_pm_domains.c... diff --git a/drivers/power/pmic/axp.c b/drivers/power/pmic/axp.c index 025dac24f2..0e1e45fba7 100644 --- a/drivers/power/pmic/axp.c +++ b/drivers/power/pmic/axp.c @@ -87,6 +87,7 @@ static const struct udevice_id axp_pmic_ids[] = { { .compatible = "x-powers,axp209", .data = AXP209_ID }, { .compatible = "x-powers,axp221", .data = AXP221_ID }, { .compatible = "x-powers,axp223", .data = AXP223_ID }, + { .compatible = "x-powers,axp313a", .data = AXP313_ID }, { .compatible = "x-powers,axp803", .data = AXP803_ID }, { .compatible = "x-powers,axp806", .data = AXP806_ID }, { .compatible = "x-powers,axp809", .data = AXP809_ID }, diff --git a/drivers/power/pmic/pmic_tps62362.c b/drivers/power/pmic/pmic_tps62362.c index 59190d6f67..6426d1488a 100644 --- a/drivers/power/pmic/pmic_tps62362.c +++ b/drivers/power/pmic/pmic_tps62362.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * (C) Copyright 2014 Texas Instruments Incorporated - http://www.ti.com + * (C) Copyright 2014 Texas Instruments Incorporated - https://www.ti.com * Author: Felipe Balbi <balbi@ti.com> */ diff --git a/drivers/power/regulator/axp_regulator.c b/drivers/power/regulator/axp_regulator.c index 02f320eac1..d27e09538e 100644 --- a/drivers/power/regulator/axp_regulator.c +++ b/drivers/power/regulator/axp_regulator.c @@ -173,6 +173,22 @@ static const struct axp_regulator_plat axp22x_regulators[] = { { } }; +/* + * The "dcdc1" regulator has another range, beyond 1.54V up to 3.4V, in + * steps of 100mV. We cannot model this easily, but also don't need that, + * since it's typically only used for ~1.1V anyway, so just ignore it. + * Also the DCDC3 regulator is described wrongly in the (available) manual, + * experiments show that the split point is at 1200mV, as for DCDC1/2. + */ +static const struct axp_regulator_plat axp313_regulators[] = { + { "dcdc1", 0x10, BIT(0), 0x13, 0x7f, 500, 1540, 10, 70 }, + { "dcdc2", 0x10, BIT(1), 0x14, 0x7f, 500, 1540, 10, 70 }, + { "dcdc3", 0x10, BIT(2), 0x15, 0x7f, 500, 1840, 10, 70 }, + { "aldo1", 0x10, BIT(3), 0x16, 0x1f, 500, 3500, 100, NA }, + { "dldo1", 0x10, BIT(4), 0x17, 0x1f, 500, 3500, 100, NA }, + { } +}; + static const struct axp_regulator_plat axp803_regulators[] = { { "dcdc1", 0x10, BIT(0), 0x20, 0x1f, 1600, 3400, 100, NA }, { "dcdc2", 0x10, BIT(1), 0x21, 0x7f, 500, 1300, 10, 70 }, @@ -274,6 +290,7 @@ static const struct axp_regulator_plat *const axp_regulators[] = { [AXP209_ID] = axp20x_regulators, [AXP221_ID] = axp22x_regulators, [AXP223_ID] = axp22x_regulators, + [AXP313_ID] = axp313_regulators, [AXP803_ID] = axp803_regulators, [AXP806_ID] = axp806_regulators, [AXP809_ID] = axp809_regulators, diff --git a/drivers/power/regulator/tps62360_regulator.c b/drivers/power/regulator/tps62360_regulator.c index b9f4504539..7014b1982d 100644 --- a/drivers/power/regulator/tps62360_regulator.c +++ b/drivers/power/regulator/tps62360_regulator.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/ * Tero Kristo <t-kristo@ti.com> */ diff --git a/drivers/ram/k3-am654-ddrss.c b/drivers/ram/k3-am654-ddrss.c index 4a8a6a90bf..cff8ffc892 100644 --- a/drivers/ram/k3-am654-ddrss.c +++ b/drivers/ram/k3-am654-ddrss.c @@ -2,7 +2,7 @@ /* * Texas Instruments' AM654 DDRSS driver * - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ * Lokesh Vutla <lokeshvutla@ti.com> */ diff --git a/drivers/ram/k3-am654-ddrss.h b/drivers/ram/k3-am654-ddrss.h index c87f186291..9d03ae1075 100644 --- a/drivers/ram/k3-am654-ddrss.h +++ b/drivers/ram/k3-am654-ddrss.h @@ -2,7 +2,7 @@ /* * AM654: DDRSS Register definitions and structures. * - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ * Lokesh Vutla <lokeshvutla@ti.com> * */ diff --git a/drivers/ram/k3-ddrss/Makefile b/drivers/ram/k3-ddrss/Makefile index ba5d9a2f4d..823d188717 100644 --- a/drivers/ram/k3-ddrss/Makefile +++ b/drivers/ram/k3-ddrss/Makefile @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0+ # -# Copyright (C) 2019-2022 Texas Instruments Incorporated - http://www.ti.com/ +# Copyright (C) 2019-2022 Texas Instruments Incorporated - https://www.ti.com/ # obj-$(CONFIG_K3_DDRSS) += k3-ddrss.o diff --git a/drivers/ram/k3-ddrss/k3-ddrss.c b/drivers/ram/k3-ddrss/k3-ddrss.c index 5b6089e852..a5c9b82cf1 100644 --- a/drivers/ram/k3-ddrss/k3-ddrss.c +++ b/drivers/ram/k3-ddrss/k3-ddrss.c @@ -2,7 +2,7 @@ /* * Texas Instruments' K3 DDRSS driver * - * Copyright (C) 2020-2021 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/ */ #include <common.h> diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig index 27e4a60ff5..781de530af 100644 --- a/drivers/remoteproc/Kconfig +++ b/drivers/remoteproc/Kconfig @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0+ # # (C) Copyright 2015 -# Texas Instruments Incorporated - http://www.ti.com/ +# Texas Instruments Incorporated - https://www.ti.com/ # menu "Remote Processor drivers" diff --git a/drivers/remoteproc/Makefile b/drivers/remoteproc/Makefile index fbe9c172bc..e09ed1aa4d 100644 --- a/drivers/remoteproc/Makefile +++ b/drivers/remoteproc/Makefile @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0+ # # (C) Copyright 2015 -# Texas Instruments Incorporated - http://www.ti.com/ +# Texas Instruments Incorporated - https://www.ti.com/ # obj-$(CONFIG_$(SPL_)REMOTEPROC) += rproc-uclass.o rproc-elf-loader.o diff --git a/drivers/remoteproc/ipu_rproc.c b/drivers/remoteproc/ipu_rproc.c index b4a06bc955..996e658e87 100644 --- a/drivers/remoteproc/ipu_rproc.c +++ b/drivers/remoteproc/ipu_rproc.c @@ -2,7 +2,7 @@ /* * IPU remoteproc driver for various SoCs * - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/ * Angela Stegmaier <angelabaker@ti.com> * Venkateswara Rao Mandela <venkat.mandela@ti.com> * Keerthy <j-keerthy@ti.com> diff --git a/drivers/remoteproc/k3_system_controller.c b/drivers/remoteproc/k3_system_controller.c index e2affe69c6..071de40fbd 100644 --- a/drivers/remoteproc/k3_system_controller.c +++ b/drivers/remoteproc/k3_system_controller.c @@ -2,7 +2,7 @@ /* * Texas Instruments' K3 System Controller Driver * - * Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2017-2018 Texas Instruments Incorporated - https://www.ti.com/ * Lokesh Vutla <lokeshvutla@ti.com> */ diff --git a/drivers/remoteproc/pru_rproc.c b/drivers/remoteproc/pru_rproc.c index 924070a76b..6ec55e27d9 100644 --- a/drivers/remoteproc/pru_rproc.c +++ b/drivers/remoteproc/pru_rproc.c @@ -2,7 +2,7 @@ /* * PRU-RTU remoteproc driver for various SoCs * - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ * Keerthy <j-keerthy@ti.com> */ diff --git a/drivers/remoteproc/rproc-uclass.c b/drivers/remoteproc/rproc-uclass.c index ece534c3c0..28b362c887 100644 --- a/drivers/remoteproc/rproc-uclass.c +++ b/drivers/remoteproc/rproc-uclass.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * (C) Copyright 2015 - * Texas Instruments Incorporated - http://www.ti.com/ + * Texas Instruments Incorporated - https://www.ti.com/ */ #define LOG_CATEGORY UCLASS_REMOTEPROC diff --git a/drivers/remoteproc/sandbox_testproc.c b/drivers/remoteproc/sandbox_testproc.c index d360cf3169..f76f68ebeb 100644 --- a/drivers/remoteproc/sandbox_testproc.c +++ b/drivers/remoteproc/sandbox_testproc.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * (C) Copyright 2015 - * Texas Instruments Incorporated - http://www.ti.com/ + * Texas Instruments Incorporated - https://www.ti.com/ */ #define pr_fmt(fmt) "%s: " fmt, __func__ #include <common.h> diff --git a/drivers/remoteproc/ti_k3_arm64_rproc.c b/drivers/remoteproc/ti_k3_arm64_rproc.c index 99f11000df..767493c138 100644 --- a/drivers/remoteproc/ti_k3_arm64_rproc.c +++ b/drivers/remoteproc/ti_k3_arm64_rproc.c @@ -2,7 +2,7 @@ /* * Texas Instruments' K3 ARM64 Remoteproc driver * - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ * Lokesh Vutla <lokeshvutla@ti.com> * */ diff --git a/drivers/remoteproc/ti_k3_dsp_rproc.c b/drivers/remoteproc/ti_k3_dsp_rproc.c index 1a2e9dd1f5..576de4bb26 100644 --- a/drivers/remoteproc/ti_k3_dsp_rproc.c +++ b/drivers/remoteproc/ti_k3_dsp_rproc.c @@ -2,7 +2,7 @@ /* * Texas Instruments' K3 DSP Remoteproc driver * - * Copyright (C) 2018-2020 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018-2020 Texas Instruments Incorporated - https://www.ti.com/ * Lokesh Vutla <lokeshvutla@ti.com> * Suman Anna <s-anna@ti.com> */ diff --git a/drivers/remoteproc/ti_power_proc.c b/drivers/remoteproc/ti_power_proc.c index 6887a3c854..f55df4a911 100644 --- a/drivers/remoteproc/ti_power_proc.c +++ b/drivers/remoteproc/ti_power_proc.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * (C) Copyright 2015-2016 - * Texas Instruments Incorporated - http://www.ti.com/ + * Texas Instruments Incorporated - https://www.ti.com/ */ #define pr_fmt(fmt) "%s: " fmt, __func__ #include <common.h> diff --git a/drivers/remoteproc/ti_sci_proc.h b/drivers/remoteproc/ti_sci_proc.h index 36351da63f..167a7143e8 100644 --- a/drivers/remoteproc/ti_sci_proc.h +++ b/drivers/remoteproc/ti_sci_proc.h @@ -2,7 +2,7 @@ /* * Texas Instruments TI-SCI Processor Controller Helper Functions * - * Copyright (C) 2018-2019 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018-2019 Texas Instruments Incorporated - https://www.ti.com/ * Lokesh Vutla <lokeshvutla@ti.com> * Suman Anna <s-anna@ti.com> */ diff --git a/drivers/reset/reset-dra7.c b/drivers/reset/reset-dra7.c index a9589d448d..05101a94f9 100644 --- a/drivers/reset/reset-dra7.c +++ b/drivers/reset/reset-dra7.c @@ -2,7 +2,7 @@ /* * Texas Instruments DRA7 reset driver * - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/ * Author: Keerthy <j-keerthy@ti.com> */ diff --git a/drivers/reset/reset-ti-sci.c b/drivers/reset/reset-ti-sci.c index f35332767b..fd654a08f1 100644 --- a/drivers/reset/reset-ti-sci.c +++ b/drivers/reset/reset-ti-sci.c @@ -2,7 +2,7 @@ /* * Texas Instruments System Control Interface (TI SCI) reset driver * - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ * Andreas Dannenberg <dannenberg@ti.com> * * Loosely based on Linux kernel reset-ti-sci.c... diff --git a/drivers/scsi/scsi.c b/drivers/scsi/scsi.c index 363047d0f7..79ee400d12 100644 --- a/drivers/scsi/scsi.c +++ b/drivers/scsi/scsi.c @@ -292,6 +292,7 @@ static int scsi_read_capacity(struct udevice *dev, struct scsi_cmd *pccb, pccb->cmd[0] = SCSI_RD_CAPAC10; pccb->cmd[1] = pccb->lun << 5; pccb->cmdlen = 10; + pccb->dma_dir = DMA_FROM_DEVICE; pccb->msgout[0] = SCSI_IDENTIFY; /* NOT USED */ pccb->datalen = 8; @@ -368,15 +369,12 @@ static void scsi_setup_test_unit_ready(struct scsi_cmd *pccb) */ static void scsi_init_dev_desc_priv(struct blk_desc *dev_desc) { + memset(dev_desc, 0, sizeof(struct blk_desc)); dev_desc->target = 0xff; dev_desc->lun = 0xff; dev_desc->log2blksz = LOG2_INVALID(typeof(dev_desc->log2blksz)); dev_desc->type = DEV_TYPE_UNKNOWN; - dev_desc->vendor[0] = 0; - dev_desc->product[0] = 0; - dev_desc->revision[0] = 0; - dev_desc->removable = false; #if IS_ENABLED(CONFIG_BOUNCE_BUFFER) dev_desc->bb = true; #endif /* CONFIG_BOUNCE_BUFFER */ @@ -440,6 +438,7 @@ static int scsi_detect_dev(struct udevice *dev, int target, int lun, for (count = 0; count < 3; count++) { pccb->datalen = 0; + pccb->dma_dir = DMA_NONE; scsi_setup_test_unit_ready(pccb); err = scsi_exec(dev, pccb); if (!err) diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 9f0f84c9b4..6628a887de 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -24,6 +24,21 @@ config BAUDRATE in the SPL stage (most drivers) or for choosing a default baudrate in the absence of an environment setting (serial_mxc.c). +config OF_SERIAL_BAUD + bool "Fetch serial baudrate from device tree" + depends on DM_SERIAL && SPL_ENV_SUPPORT + select DEFAULT_ENV_IS_RW + help + Select this to enable fetching and setting of the baudrate + configured in the DT. Replace the default baudrate with the DT + baudrate and also set it to the environment. + +config DEFAULT_ENV_IS_RW + bool "Make default environment as writable" + help + Select this to enable to make default environment writable. This + allows modifying the default environment. + config REQUIRE_SERIAL_CONSOLE bool "Require a serial port for console" # Running without a serial console is not supported by the diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c index df6a387284..e4fa3933bc 100644 --- a/drivers/serial/serial-uclass.c +++ b/drivers/serial/serial-uclass.c @@ -155,12 +155,61 @@ static void serial_find_console_or_panic(void) } #endif /* CONFIG_SERIAL_PRESENT */ +/** + * check_valid_baudrate() - Check whether baudrate is valid or not + * + * @baud: baud rate to check + * Return: 0 if OK, -ve on error + */ +static int check_valid_baudrate(int baud) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(baudrate_table); ++i) { + if (baud == baudrate_table[i]) + return 0; + } + + return -EINVAL; +} + +int fetch_baud_from_dtb(void) +{ + int baud_value, ret; + + baud_value = ofnode_read_baud(); + ret = check_valid_baudrate(baud_value); + if (ret) + return ret; + + return baud_value; +} + /* Called prior to relocation */ int serial_init(void) { #if CONFIG_IS_ENABLED(SERIAL_PRESENT) serial_find_console_or_panic(); gd->flags |= GD_FLG_SERIAL_READY; + + if (IS_ENABLED(CONFIG_OF_SERIAL_BAUD)) { + int ret = 0; + char *ptr = (char*)&default_environment[0]; + + /* + * Fetch the baudrate from the dtb and update the value in the + * default environment. + */ + ret = fetch_baud_from_dtb(); + if (ret != -EINVAL && ret != -EFAULT) { + gd->baudrate = ret; + + while (*ptr != '\0' && *(ptr + 1) != '\0') + ptr++; + ptr += 2; + sprintf(ptr, "baudrate=%d", gd->baudrate); + } + } serial_setbrg(); #endif diff --git a/drivers/serial/serial_omap.c b/drivers/serial/serial_omap.c index 26310b0b74..49ced8f9fa 100644 --- a/drivers/serial/serial_omap.c +++ b/drivers/serial/serial_omap.c @@ -2,7 +2,7 @@ /* * Texas Instruments' OMAP serial driver * - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ * Lokesh Vutla <lokeshvutla@ti.com> */ diff --git a/drivers/soc/soc-uclass.c b/drivers/soc/soc-uclass.c index dfad32d80d..8b3044fed8 100644 --- a/drivers/soc/soc-uclass.c +++ b/drivers/soc/soc-uclass.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * (C) Copyright 2020 - Texas Instruments Incorporated - http://www.ti.com/ + * (C) Copyright 2020 - Texas Instruments Incorporated - https://www.ti.com/ * Dave Gerlach <d-gerlach@ti.com> */ diff --git a/drivers/soc/soc_sandbox.c b/drivers/soc/soc_sandbox.c index 5c82ad84fc..15fdd9930c 100644 --- a/drivers/soc/soc_sandbox.c +++ b/drivers/soc/soc_sandbox.c @@ -2,7 +2,7 @@ /* * Sandbox driver for the SOC uclass * - * (C) Copyright 2020 - Texas Instruments Incorporated - http://www.ti.com/ + * (C) Copyright 2020 - Texas Instruments Incorporated - https://www.ti.com/ * Dave Gerlach <d-gerlach@ti.com> */ diff --git a/drivers/soc/soc_ti_k3.c b/drivers/soc/soc_ti_k3.c index b720131ae5..355a5368dd 100644 --- a/drivers/soc/soc_ti_k3.c +++ b/drivers/soc/soc_ti_k3.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/ * Dave Gerlach <d-gerlach@ti.com> */ diff --git a/drivers/soc/ti/k3-navss-ringacc.c b/drivers/soc/ti/k3-navss-ringacc.c index e02889649b..7a2fbb0db6 100644 --- a/drivers/soc/ti/k3-navss-ringacc.c +++ b/drivers/soc/ti/k3-navss-ringacc.c @@ -2,7 +2,7 @@ /* * TI K3 AM65x NAVSS Ring accelerator Manager (RA) subsystem driver * - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com */ #include <common.h> diff --git a/drivers/spi/cadence_ospi_versal.c b/drivers/spi/cadence_ospi_versal.c index a7685a2f51..e02a3b3de3 100644 --- a/drivers/spi/cadence_ospi_versal.c +++ b/drivers/spi/cadence_ospi_versal.c @@ -44,8 +44,10 @@ int cadence_qspi_apb_dma_read(struct cadence_spi_priv *priv, priv->regbase + CQSPI_REG_INDIR_TRIG_ADDR_RANGE); writel(CQSPI_DFLT_DMA_PERIPH_CFG, priv->regbase + CQSPI_REG_DMA_PERIPH_CFG); - writel((unsigned long)rxbuf, priv->regbase + + writel(lower_32_bits((unsigned long)rxbuf), priv->regbase + CQSPI_DMA_DST_ADDR_REG); + writel(upper_32_bits((unsigned long)rxbuf), priv->regbase + + CQSPI_DMA_DST_ADDR_MSB_REG); writel(priv->trigger_address, priv->regbase + CQSPI_DMA_SRC_RD_ADDR_REG); writel(bytes_to_dma, priv->regbase + diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 9ebc4ed48f..25f5e9fdeb 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2009 Texas Instruments Incorporated - https://www.ti.com/ * * Driver for SPI controller on DaVinci. Based on atmel_spi.c * by Atmel Corporation diff --git a/drivers/spi/omap3_spi.c b/drivers/spi/omap3_spi.c index ff7b55f870..5cce6baa62 100644 --- a/drivers/spi/omap3_spi.c +++ b/drivers/spi/omap3_spi.c @@ -6,7 +6,7 @@ * Copyright (C) 2010 Dirk Behme <dirk.behme@googlemail.com> * * Driver for McSPI controller on OMAP3. Based on davinci_spi.c - * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2009 Texas Instruments Incorporated - https://www.ti.com/ * * Copyright (C) 2007 Atmel Corporation * diff --git a/drivers/spi/spi-mem-nodm.c b/drivers/spi/spi-mem-nodm.c index f9cadcc026..6d9ab61769 100644 --- a/drivers/spi/spi-mem-nodm.c +++ b/drivers/spi/spi-mem-nodm.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ */ #include <errno.h> diff --git a/drivers/spi/zynqmp_gqspi.c b/drivers/spi/zynqmp_gqspi.c index ec59ef5804..a323994fb2 100644 --- a/drivers/spi/zynqmp_gqspi.c +++ b/drivers/spi/zynqmp_gqspi.c @@ -5,6 +5,8 @@ * Xilinx ZynqMP Generic Quad-SPI(QSPI) controller driver(master mode only) */ +#define LOG_CATEGORY UCLASS_SPI + #include <common.h> #include <cpu_func.h> #include <log.h> @@ -192,8 +194,6 @@ static int zynqmp_qspi_of_to_plat(struct udevice *bus) { struct zynqmp_qspi_plat *plat = dev_get_plat(bus); - debug("%s\n", __func__); - plat->regs = (struct zynqmp_qspi_regs *)(dev_read_addr(bus) + GQSPI_REG_OFFSET); plat->dma_regs = (struct zynqmp_qspi_dma_regs *) @@ -250,7 +250,7 @@ static u32 zynqmp_qspi_genfifo_mode(u8 buswidth) case 4: return GQSPI_SPI_MODE_QSPI; default: - debug("Unsupported bus width %u\n", buswidth); + log_warning("Unsupported bus width %u\n", buswidth); return GQSPI_SPI_MODE_SPI; } } @@ -262,6 +262,8 @@ static void zynqmp_qspi_fill_gen_fifo(struct zynqmp_qspi_priv *priv, u32 config_reg, ier; int ret = 0; + log_content("%s, GFIFO_CMD: 0x%X\n", __func__, gqspi_fifo_reg); + writel(gqspi_fifo_reg, ®s->genfifo); config_reg = readl(®s->confr); @@ -278,7 +280,7 @@ static void zynqmp_qspi_fill_gen_fifo(struct zynqmp_qspi_priv *priv, ret = wait_for_bit_le32(®s->isr, GQSPI_IXR_GFEMTY_MASK, 1, GQSPI_TIMEOUT, 1); if (ret) - printf("%s Timeout\n", __func__); + log_warning("%s, Timeout\n", __func__); } @@ -286,6 +288,8 @@ static void zynqmp_qspi_chipselect(struct zynqmp_qspi_priv *priv, int is_on) { u32 gqspi_fifo_reg = 0; + log_debug("%s, assert: %d\r\n", __func__, is_on); + if (is_on) { gqspi_fifo_reg = zynqmp_qspi_bus_select(priv); gqspi_fifo_reg |= GQSPI_SPI_MODE_SPI | @@ -295,8 +299,6 @@ static void zynqmp_qspi_chipselect(struct zynqmp_qspi_priv *priv, int is_on) gqspi_fifo_reg |= GQSPI_IMD_DATA_CS_DEASSERT; } - debug("GFIFO_CMD_CS: 0x%x\n", gqspi_fifo_reg); - zynqmp_qspi_fill_gen_fifo(priv, gqspi_fifo_reg); } @@ -311,8 +313,8 @@ static void zynqmp_qspi_set_tapdelay(struct udevice *bus, u32 baudrateval) clk_rate = plat->frequency; reqhz = (clk_rate / (GQSPI_BAUD_DIV_SHIFT << baudrateval)); - debug("%s, req_hz:%d, clk_rate:%d, baudrateval:%d\n", - __func__, reqhz, clk_rate, baudrateval); + log_debug("%s, clk_rate:%d, baudrateval:%d, bus_clk: %d\n", + __func__, clk_rate, baudrateval, reqhz); if (!(IS_ENABLED(CONFIG_ARCH_VERSAL) || IS_ENABLED(CONFIG_ARCH_VERSAL_NET))) { @@ -362,7 +364,8 @@ static int zynqmp_qspi_set_speed(struct udevice *bus, uint speed) u32 confr; u8 baud_rate_val = 0; - debug("%s\n", __func__); + log_debug("%s, Speed: %d, Max: %d\n", __func__, speed, plat->frequency); + if (speed > plat->frequency) speed = plat->frequency; @@ -383,9 +386,8 @@ static int zynqmp_qspi_set_speed(struct udevice *bus, uint speed) confr &= ~GQSPI_BAUD_DIV_MASK; confr |= (baud_rate_val << 3); writel(confr, ®s->confr); - zynqmp_qspi_set_tapdelay(bus, baud_rate_val); - debug("regs=%p, speed=%d\n", priv->regs, plat->speed_hz); + zynqmp_qspi_set_tapdelay(bus, baud_rate_val); } return 0; @@ -399,8 +401,6 @@ static int zynqmp_qspi_probe(struct udevice *bus) unsigned long clock; int ret; - debug("%s: bus:%p, priv:%p\n", __func__, bus, priv); - priv->regs = plat->regs; priv->dma_regs = plat->dma_regs; priv->io_mode = plat->io_mode; @@ -416,7 +416,6 @@ static int zynqmp_qspi_probe(struct udevice *bus) dev_err(bus, "failed to get rate\n"); return clock; } - debug("%s: CLK %ld\n", __func__, clock); ret = clk_enable(&clk); if (ret) { @@ -429,6 +428,8 @@ static int zynqmp_qspi_probe(struct udevice *bus) /* init the zynq spi hw */ zynqmp_qspi_init_hw(priv); + log_debug("%s, Rerence clock frequency: %ld\n", __func__, clock); + return 0; } @@ -438,7 +439,8 @@ static int zynqmp_qspi_set_mode(struct udevice *bus, uint mode) struct zynqmp_qspi_regs *regs = priv->regs; u32 confr; - debug("%s\n", __func__); + log_debug("%s, 0x%X\n", __func__, mode); + /* Set the SPI Clock phase and polarities */ confr = readl(®s->confr); confr &= ~(GQSPI_CONFIG_CPHA_MASK | GQSPI_CONFIG_CPOL_MASK); @@ -461,16 +463,11 @@ static int zynqmp_qspi_fill_tx_fifo(struct zynqmp_qspi_priv *priv, u32 size) u32 *buf = (u32 *)priv->tx_buf; u32 len = size; - debug("TxFIFO: 0x%x, size: 0x%x\n", readl(®s->isr), - size); - while (size) { ret = wait_for_bit_le32(®s->isr, GQSPI_IXR_TXNFULL_MASK, 1, GQSPI_TIMEOUT, 1); - if (ret) { - printf("%s: Timeout\n", __func__); - return ret; - } + if (ret) + return log_msg_ret("Timeout\n", ret); if (size >= 4) { writel(*buf, ®s->txd0r); @@ -501,10 +498,8 @@ static int zynqmp_qspi_fill_tx_fifo(struct zynqmp_qspi_priv *priv, u32 size) ret = wait_for_bit_le32(®s->isr, GQSPI_IXR_TXFIFOEMPTY_MASK, 1, GQSPI_TIMEOUT, 1); - if (ret) { - printf("%s: Timeout\n", __func__); - return ret; - } + if (ret) + return log_msg_ret("Timeout\n", ret); priv->tx_buf += len; return 0; @@ -516,6 +511,9 @@ static void zynqmp_qspi_genfifo_cmd(struct zynqmp_qspi_priv *priv) u32 gen_fifo_cmd; u8 i, dummy_cycles, addr; + log_debug("%s, opcode: 0x%0X, addr.nbytes: %d, dummy.mbytes: %d\r\n", + __func__, op->cmd.opcode, op->addr.nbytes, op->dummy.nbytes); + /* Send opcode */ gen_fifo_cmd = zynqmp_qspi_bus_select(priv); gen_fifo_cmd |= zynqmp_qspi_genfifo_mode(op->cmd.buswidth); @@ -532,8 +530,6 @@ static void zynqmp_qspi_genfifo_cmd(struct zynqmp_qspi_priv *priv) gen_fifo_cmd |= GQSPI_GFIFO_TX; gen_fifo_cmd |= addr; - debug("GFIFO_CMD_Cmd = 0x%x\n", gen_fifo_cmd); - zynqmp_qspi_fill_gen_fifo(priv, gen_fifo_cmd); } @@ -583,6 +579,8 @@ static int zynqmp_qspi_genfifo_fill_tx(struct zynqmp_qspi_priv *priv) u32 len; int ret = 0; + log_debug("%s, length: %d\r\n", __func__, priv->len); + gen_fifo_cmd = zynqmp_qspi_bus_select(priv); gen_fifo_cmd |= zynqmp_qspi_genfifo_mode(priv->op->data.buswidth); gen_fifo_cmd |= GQSPI_GFIFO_TX | GQSPI_GFIFO_DATA_XFR_MASK; @@ -591,8 +589,6 @@ static int zynqmp_qspi_genfifo_fill_tx(struct zynqmp_qspi_priv *priv) len = zynqmp_qspi_calc_exp(priv, &gen_fifo_cmd); zynqmp_qspi_fill_gen_fifo(priv, gen_fifo_cmd); - debug("GFIFO_CMD_TX:0x%x\n", gen_fifo_cmd); - if (gen_fifo_cmd & GQSPI_GFIFO_EXP_MASK) ret = zynqmp_qspi_fill_tx_fifo(priv, 1 << len); else @@ -608,7 +604,6 @@ static int zynqmp_qspi_start_io(struct zynqmp_qspi_priv *priv, u32 gen_fifo_cmd, u32 *buf) { u32 len; - u32 actuallen = priv->len; u32 config_reg, ier, isr; u32 timeout = GQSPI_TIMEOUT; struct zynqmp_qspi_regs *regs = priv->regs; @@ -623,7 +618,7 @@ static int zynqmp_qspi_start_io(struct zynqmp_qspi_priv *priv, else priv->bytes_to_receive = len; zynqmp_qspi_fill_gen_fifo(priv, gen_fifo_cmd); - debug("GFIFO_CMD_RX:0x%x\n", gen_fifo_cmd); + /* Manual start */ config_reg = readl(®s->confr); config_reg |= GQSPI_STRT_GEN_FIFO; @@ -652,13 +647,8 @@ static int zynqmp_qspi_start_io(struct zynqmp_qspi_priv *priv, } } - debug("buf:0x%lx, rxbuf:0x%lx, *buf:0x%x len: 0x%x\n", - (unsigned long)buf, (unsigned long)priv->rx_buf, - *buf, actuallen); - if (!timeout) { - printf("IO timeout: %d\n", readl(®s->isr)); - return -1; - } + if (!timeout) + return log_msg_retz("Timeout\n", timeout); } return 0; @@ -695,26 +685,18 @@ static int zynqmp_qspi_start_dma(struct zynqmp_qspi_priv *priv, while (priv->len) { zynqmp_qspi_calc_exp(priv, &gen_fifo_cmd); zynqmp_qspi_fill_gen_fifo(priv, gen_fifo_cmd); - - debug("GFIFO_CMD_RX:0x%x\n", gen_fifo_cmd); } ret = wait_for_bit_le32(&dma_regs->dmaisr, GQSPI_DMA_DST_I_STS_DONE, 1, GQSPI_TIMEOUT, 1); - if (ret) { - printf("DMA Timeout:0x%x\n", readl(&dma_regs->dmaisr)); - return -ETIMEDOUT; - } + if (ret) + return log_msg_ret("Timeout:\n", ret); invalidate_dcache_range(addr, addr + size); writel(GQSPI_DMA_DST_I_STS_DONE, &dma_regs->dmaisr); - debug("buf:0x%lx, rxbuf:0x%lx, *buf:0x%x len: 0x%x\n", - (unsigned long)buf, (unsigned long)priv->rx_buf, *buf, - actuallen); - if (buf != priv->rx_buf) memcpy(priv->rx_buf, buf, actuallen); @@ -731,6 +713,8 @@ static int zynqmp_qspi_genfifo_fill_rx(struct zynqmp_qspi_priv *priv) u32 *buf; u32 actuallen = priv->len; + log_debug("%s, length: %d\r\n", __func__, priv->len); + gen_fifo_cmd = zynqmp_qspi_bus_select(priv); gen_fifo_cmd |= zynqmp_qspi_genfifo_mode(priv->op->data.buswidth); gen_fifo_cmd |= GQSPI_GFIFO_RX | GQSPI_GFIFO_DATA_XFR_MASK; diff --git a/drivers/sysreset/sysreset-ti-sci.c b/drivers/sysreset/sysreset-ti-sci.c index 81bfd67ad9..5fc05c46cb 100644 --- a/drivers/sysreset/sysreset-ti-sci.c +++ b/drivers/sysreset/sysreset-ti-sci.c @@ -2,7 +2,7 @@ /* * Texas Instruments System Control Interface (TI SCI) system reset driver * - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ * Andreas Dannenberg <dannenberg@ti.com> */ diff --git a/drivers/thermal/ti-bandgap.c b/drivers/thermal/ti-bandgap.c index 0b533d4c42..0ea17a909d 100644 --- a/drivers/thermal/ti-bandgap.c +++ b/drivers/thermal/ti-bandgap.c @@ -1,7 +1,7 @@ /* * TI Bandgap temperature sensor driver * - * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as diff --git a/drivers/ufs/Makefile b/drivers/ufs/Makefile index 4f3344fd4e..56a4b0776d 100644 --- a/drivers/ufs/Makefile +++ b/drivers/ufs/Makefile @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 # -# Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com +# Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com # obj-$(CONFIG_UFS) += ufs.o ufs-uclass.o diff --git a/drivers/ufs/cdns-platform.c b/drivers/ufs/cdns-platform.c index 8ebcb51634..d1f346937c 100644 --- a/drivers/ufs/cdns-platform.c +++ b/drivers/ufs/cdns-platform.c @@ -2,7 +2,7 @@ /** * cdns-platform.c - Platform driver for Cadence UFSHCI device * - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com */ #include <clk.h> diff --git a/drivers/ufs/ti-j721e-ufs.c b/drivers/ufs/ti-j721e-ufs.c index d875269760..1860e0dca2 100644 --- a/drivers/ufs/ti-j721e-ufs.c +++ b/drivers/ufs/ti-j721e-ufs.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/ */ #include <asm/io.h> diff --git a/drivers/ufs/ufs-uclass.c b/drivers/ufs/ufs-uclass.c index ceea30c4a9..e6478a9209 100644 --- a/drivers/ufs/ufs-uclass.c +++ b/drivers/ufs/ufs-uclass.c @@ -2,7 +2,7 @@ /** * ufs-uclass.c - Universal Flash Subsystem (UFS) Uclass driver * - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com */ #define LOG_CATEGORY UCLASS_UFS diff --git a/drivers/ufs/ufs.c b/drivers/ufs/ufs.c index 7c48d57f99..346f0fd916 100644 --- a/drivers/ufs/ufs.c +++ b/drivers/ufs/ufs.c @@ -5,7 +5,7 @@ * Taken from Linux Kernel v5.2 (drivers/scsi/ufs/ufshcd.c) and ported * to u-boot. * - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com */ #include <bouncebuf.h> diff --git a/drivers/usb/cdns3/cdns3-ti.c b/drivers/usb/cdns3/cdns3-ti.c index 8958f0166b..92a7941ed1 100644 --- a/drivers/usb/cdns3/cdns3-ti.c +++ b/drivers/usb/cdns3/cdns3-ti.c @@ -2,7 +2,7 @@ /** * cdns_ti-ti.c - TI specific Glue layer for Cadence USB Controller * - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com */ #include <common.h> diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index f0c4aab6b9..4b4fcd8a22 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -2,7 +2,7 @@ /** * core.c - DesignWare USB3 DRD Controller Core file * - * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2015 Texas Instruments Incorporated - https://www.ti.com * * Authors: Felipe Balbi <balbi@ti.com>, * Sebastian Andrzej Siewior <bigeasy@linutronix.de> diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index 532746dd88..4162a68229 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -2,7 +2,7 @@ /** * core.h - DesignWare USB3 DRD Core Header * - * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2015 Texas Instruments Incorporated - https://www.ti.com * * Authors: Felipe Balbi <balbi@ti.com>, * Sebastian Andrzej Siewior <bigeasy@linutronix.de> diff --git a/drivers/usb/dwc3/dwc3-omap.c b/drivers/usb/dwc3/dwc3-omap.c index ff4ebfb444..4fadb4a3e2 100644 --- a/drivers/usb/dwc3/dwc3-omap.c +++ b/drivers/usb/dwc3/dwc3-omap.c @@ -2,7 +2,7 @@ /** * dwc3-omap.c - OMAP Specific Glue layer * - * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2015 Texas Instruments Incorporated - https://www.ti.com * * Authors: Felipe Balbi <balbi@ti.com>, * Sebastian Andrzej Siewior <bigeasy@linutronix.de> diff --git a/drivers/usb/dwc3/ep0.c b/drivers/usb/dwc3/ep0.c index 75ac993bc6..1133cf82b1 100644 --- a/drivers/usb/dwc3/ep0.c +++ b/drivers/usb/dwc3/ep0.c @@ -2,7 +2,7 @@ /** * ep0.c - DesignWare USB3 DRD Controller Endpoint 0 Handling * - * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2015 Texas Instruments Incorporated - https://www.ti.com * * Authors: Felipe Balbi <balbi@ti.com>, * Sebastian Andrzej Siewior <bigeasy@linutronix.de> diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index 68cf32cd18..406d36ceaf 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -2,7 +2,7 @@ /** * gadget.c - DesignWare USB3 DRD Controller Gadget Framework Link * - * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2015 Texas Instruments Incorporated - https://www.ti.com * * Authors: Felipe Balbi <balbi@ti.com>, * Sebastian Andrzej Siewior <bigeasy@linutronix.de> diff --git a/drivers/usb/dwc3/gadget.h b/drivers/usb/dwc3/gadget.h index 7806ce59a2..f28a9755dc 100644 --- a/drivers/usb/dwc3/gadget.h +++ b/drivers/usb/dwc3/gadget.h @@ -2,7 +2,7 @@ /** * gadget.h - DesignWare USB3 DRD Gadget Header * - * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2015 Texas Instruments Incorporated - https://www.ti.com * * Authors: Felipe Balbi <balbi@ti.com>, * Sebastian Andrzej Siewior <bigeasy@linutronix.de> diff --git a/drivers/usb/dwc3/io.h b/drivers/usb/dwc3/io.h index 2407f826c1..04791d4c9b 100644 --- a/drivers/usb/dwc3/io.h +++ b/drivers/usb/dwc3/io.h @@ -2,7 +2,7 @@ /** * io.h - DesignWare USB3 DRD IO Header * - * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com * * Authors: Felipe Balbi <balbi@ti.com>, * Sebastian Andrzej Siewior <bigeasy@linutronix.de> diff --git a/drivers/usb/dwc3/linux-compat.h b/drivers/usb/dwc3/linux-compat.h index 3bb0bda5a6..563f8727cd 100644 --- a/drivers/usb/dwc3/linux-compat.h +++ b/drivers/usb/dwc3/linux-compat.h @@ -2,7 +2,7 @@ /** * linux-compat.h - DesignWare USB3 Linux Compatibiltiy Adapter Header * - * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2015 Texas Instruments Incorporated - https://www.ti.com * * Authors: Kishon Vijay Abraham I <kishon@ti.com> * diff --git a/drivers/usb/dwc3/ti_usb_phy.c b/drivers/usb/dwc3/ti_usb_phy.c index f476810763..8ae130860f 100644 --- a/drivers/usb/dwc3/ti_usb_phy.c +++ b/drivers/usb/dwc3/ti_usb_phy.c @@ -2,7 +2,7 @@ /** * ti_usb_phy.c - USB3 and USB3 PHY programming for dwc3 * - * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2015 Texas Instruments Incorporated - https://www.ti.com * * Author: Kishon Vijay Abraham I <kishon@ti.com> * diff --git a/drivers/usb/gadget/udc/udc-core.c b/drivers/usb/gadget/udc/udc-core.c index 7f73926cb3..eb0b35969c 100644 --- a/drivers/usb/gadget/udc/udc-core.c +++ b/drivers/usb/gadget/udc/udc-core.c @@ -2,7 +2,7 @@ /** * udc-core.c - Core UDC Framework * - * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2015 Texas Instruments Incorporated - https://www.ti.com * * Author: Felipe Balbi <balbi@ti.com> * diff --git a/drivers/usb/gadget/udc/udc-uclass.c b/drivers/usb/gadget/udc/udc-uclass.c index 3e433129ac..30ee1cab06 100644 --- a/drivers/usb/gadget/udc/udc-uclass.c +++ b/drivers/usb/gadget/udc/udc-uclass.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com * Written by Jean-Jacques Hiblot <jjhiblot@ti.com> */ diff --git a/drivers/usb/host/dwc3-of-simple.c b/drivers/usb/host/dwc3-of-simple.c index 66b3e96b00..f9df59d2e5 100644 --- a/drivers/usb/host/dwc3-of-simple.c +++ b/drivers/usb/host/dwc3-of-simple.c @@ -2,7 +2,7 @@ /* * dwc3-of-simple.c - OF glue layer for simple integrations * - * Copyright (c) 2015 Texas Instruments Incorporated - http://www.ti.com + * Copyright (c) 2015 Texas Instruments Incorporated - https://www.ti.com * * Author: Felipe Balbi <balbi@ti.com> * diff --git a/drivers/usb/ulpi/omap-ulpi-viewport.c b/drivers/usb/ulpi/omap-ulpi-viewport.c index 8d71db04a2..1b01cd4c55 100644 --- a/drivers/usb/ulpi/omap-ulpi-viewport.c +++ b/drivers/usb/ulpi/omap-ulpi-viewport.c @@ -3,7 +3,7 @@ * OMAP ulpi viewport support * Based on drivers/usb/ulpi/ulpi-viewport.c * - * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com * Author: Govindraj R <govindraj.raja@ti.com> */ diff --git a/drivers/virtio/virtio_rng.c b/drivers/virtio/virtio_rng.c index b85545c2ee..786359a6e3 100644 --- a/drivers/virtio/virtio_rng.c +++ b/drivers/virtio/virtio_rng.c @@ -20,7 +20,7 @@ struct virtio_rng_priv { static int virtio_rng_read(struct udevice *dev, void *data, size_t len) { int ret; - unsigned int rsize; + unsigned int rsize = 1; unsigned char buf[BUFFER_SIZE] __aligned(4); unsigned char *ptr = data; struct virtio_sg sg; @@ -29,7 +29,12 @@ static int virtio_rng_read(struct udevice *dev, void *data, size_t len) while (len) { sg.addr = buf; - sg.length = min(len, sizeof(buf)); + /* + * Work around implementations which always return 8 bytes + * less than requested, down to 0 bytes, which would + * cause an endless loop otherwise. + */ + sg.length = min(rsize ? len : len + 8, sizeof(buf)); sgs[0] = &sg; ret = virtqueue_add(priv->rng_vq, sgs, 0, 1); diff --git a/include/axp_pmic.h b/include/axp_pmic.h index 4ac6486583..aabafc8501 100644 --- a/include/axp_pmic.h +++ b/include/axp_pmic.h @@ -32,6 +32,7 @@ enum { AXP209_ID, AXP221_ID, AXP223_ID, + AXP313_ID, AXP803_ID, AXP806_ID, AXP809_ID, diff --git a/include/bootdev.h b/include/bootdev.h index b079a91b5b..35fa25aff1 100644 --- a/include/bootdev.h +++ b/include/bootdev.h @@ -65,7 +65,7 @@ struct bootdev_hunter; * * @info: Info structure describing this hunter * @show: true to show information from the hunter - * Returns: 0 if OK, -ve on error + * Returns: 0 if OK, -ENOENT on device not found, otherwise -ve on error */ typedef int (*bootdev_hunter_func)(struct bootdev_hunter *info, bool show); diff --git a/include/bootflow.h b/include/bootflow.h index 44d3741eac..fede8f22a2 100644 --- a/include/bootflow.h +++ b/include/bootflow.h @@ -43,9 +43,12 @@ enum bootflow_state_t { * and it is using the prior-stage FDT, which is the U-Boot control FDT. * This is only possible with the EFI bootmeth (distro-efi) and only when * CONFIG_OF_HAS_PRIOR_STAGE is enabled + * @BOOTFLOWF_STATIC_BUF: Indicates that @bflow->buf is statically set, rather + * than being allocated by malloc(). */ enum bootflow_flags_t { BOOTFLOWF_USE_PRIOR_FDT = 1 << 0, + BOOTFLOWF_STATIC_BUF = 1 << 1, }; /** @@ -72,7 +75,7 @@ enum bootflow_flags_t { * @fname: Filename of bootflow file (allocated) * @logo: Logo to display for this bootflow (BMP format) * @logo_size: Size of the logo in bytes - * @buf: Bootflow file contents (allocated) + * @buf: Bootflow file contents (allocated unless @flags & BOOTFLOWF_STATIC_BUF) * @size: Size of bootflow file in bytes * @err: Error number received (0 if OK) * @os_name: Name of the OS / distro being booted, or NULL if not known diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 504b1f0228..67f4656253 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -1,7 +1,7 @@ /* * am335x_evm.h * - * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as diff --git a/include/configs/am335x_shc.h b/include/configs/am335x_shc.h index ee6f62275a..dedef91ba5 100644 --- a/include/configs/am335x_shc.h +++ b/include/configs/am335x_shc.h @@ -6,7 +6,7 @@ * Based on: * am335x_evm.h * - * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ */ #ifndef __CONFIG_AM335X_SHC_H diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index 7ee7b7e4f4..983428920f 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -2,7 +2,7 @@ /* * am43xx_evm.h * - * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ */ #ifndef __CONFIG_AM43XX_EVM_H diff --git a/include/configs/am65x_evm.h b/include/configs/am65x_evm.h index 9e90239a1c..811dc0ff1a 100644 --- a/include/configs/am65x_evm.h +++ b/include/configs/am65x_evm.h @@ -2,7 +2,7 @@ /* * Configuration header file for K3 AM654 EVM * - * Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2017-2018 Texas Instruments Incorporated - https://www.ti.com/ * Lokesh Vutla <lokeshvutla@ti.com> */ diff --git a/include/configs/baltos.h b/include/configs/baltos.h index e7946389ef..cc54b514ff 100644 --- a/include/configs/baltos.h +++ b/include/configs/baltos.h @@ -1,7 +1,7 @@ /* * am335x_evm.h * - * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index cef404218e..416aa96366 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2010 Texas Instruments Incorporated - https://www.ti.com/ * * Based on davinci_dvevm.h. Original Copyrights follow: * diff --git a/include/configs/draco.h b/include/configs/draco.h index 4c67174572..8f993cee0a 100644 --- a/include/configs/draco.h +++ b/include/configs/draco.h @@ -6,7 +6,7 @@ * Based on: * U-Boot file:/include/configs/am335x_evm.h * - * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ */ #ifndef __CONFIG_DRACO_H diff --git a/include/configs/etamin.h b/include/configs/etamin.h index d07b4e9536..97585a4fd1 100644 --- a/include/configs/etamin.h +++ b/include/configs/etamin.h @@ -6,7 +6,7 @@ * Based on: * U-Boot file:/include/configs/am335x_evm.h * - * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ */ #ifndef __CONFIG_ETAMIN_H diff --git a/include/configs/legoev3.h b/include/configs/legoev3.h index ff966586ba..a50f9480dd 100644 --- a/include/configs/legoev3.h +++ b/include/configs/legoev3.h @@ -4,7 +4,7 @@ * * Based on da850evm.h * - * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2010 Texas Instruments Incorporated - https://www.ti.com/ * * Based on davinci_dvevm.h. Original Copyrights follow: * diff --git a/include/configs/mvebu_armada-37xx.h b/include/configs/mvebu_armada-37xx.h index 76e148f55e..18b55be0d8 100644 --- a/include/configs/mvebu_armada-37xx.h +++ b/include/configs/mvebu_armada-37xx.h @@ -30,7 +30,6 @@ /* * Environment */ -#define DEFAULT_ENV_IS_RW /* required for configuring default fdtfile= */ #ifdef CONFIG_MMC #define BOOT_TARGET_DEVICES_MMC(func, i) func(MMC, mmc, i) diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h index f44967787c..2cb2e52ad2 100644 --- a/include/configs/omap3_evm.h +++ b/include/configs/omap3_evm.h @@ -2,7 +2,7 @@ /* * Configuration settings for the TI OMAP3 EVM board. * - * Copyright (C) 2006-2011 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2006-2011 Texas Instruments Incorporated - https://www.ti.com/ * * Author : * Manikandan Pillai <mani.pillai@ti.com> diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index fc2655a17b..5b7eb0b694 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* - * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2010 Texas Instruments Incorporated - https://www.ti.com/ * * Based on davinci_dvevm.h. Original Copyrights follow: * diff --git a/include/configs/pdu001.h b/include/configs/pdu001.h index 80b14b002a..24d7dcd427 100644 --- a/include/configs/pdu001.h +++ b/include/configs/pdu001.h @@ -4,7 +4,7 @@ * * Copyright (C) 2018 EETS GmbH - http://www.eets.ch/ * - * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ */ #ifndef __CONFIG_PDU001_H diff --git a/include/configs/phycore_am335x_r2.h b/include/configs/phycore_am335x_r2.h index 8668da6eba..060a150965 100644 --- a/include/configs/phycore_am335x_r2.h +++ b/include/configs/phycore_am335x_r2.h @@ -4,7 +4,7 @@ * * Phytec phyCORE-AM335x R2 (PCL060 / PCM060) boards information header * - * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ * Copyright (C) 2013 Lars Poeschel, Lemonage Software GmbH * Copyright (C) 2019 DENX Software Engineering GmbH */ diff --git a/include/configs/pxm2.h b/include/configs/pxm2.h index b701e52076..040178baf8 100644 --- a/include/configs/pxm2.h +++ b/include/configs/pxm2.h @@ -7,7 +7,7 @@ * Based on: * U-Boot file:/include/configs/am335x_evm.h * - * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ */ #ifndef __CONFIG_PXM2_H diff --git a/include/configs/quartzpro64-rk3588.h b/include/configs/quartzpro64-rk3588.h new file mode 100644 index 0000000000..a1faa2aad8 --- /dev/null +++ b/include/configs/quartzpro64-rk3588.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0+ + * Copyright 2023 Google, Inc + */ + +#ifndef __QUARTZPRO64_RK3588_H +#define __QUARTZPRO64_RK3588_H + +#define ROCKCHIP_DEVICE_SETTINGS \ + "stdout=serial,vidconsole\0" \ + "stderr=serial,vidconsole\0" + +#include <configs/rk3588_common.h> + +#endif /* __QUARTZPRO64_RK3588_H */ diff --git a/include/configs/rastaban.h b/include/configs/rastaban.h index 2efb4d23cd..0991ebfd00 100644 --- a/include/configs/rastaban.h +++ b/include/configs/rastaban.h @@ -6,7 +6,7 @@ * Based on: * U-Boot file:/include/configs/am335x_evm.h * - * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ */ #ifndef __CONFIG_RASTABAN_H diff --git a/include/configs/rut.h b/include/configs/rut.h index 4002bc4b6c..7cc2bd5a34 100644 --- a/include/configs/rut.h +++ b/include/configs/rut.h @@ -7,7 +7,7 @@ * Based on: * U-Boot file:/include/configs/am335x_evm.h * - * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ */ #ifndef __CONFIG_RUT_H diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index 7def657bcd..6b1d5caafb 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -7,7 +7,7 @@ * Based on: * U-Boot file:/include/configs/am335x_evm.h * - * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ */ #ifndef __CONFIG_SIEMENS_AM33X_COMMON_H diff --git a/include/configs/thuban.h b/include/configs/thuban.h index a5913e1e7d..f4c04c55eb 100644 --- a/include/configs/thuban.h +++ b/include/configs/thuban.h @@ -6,7 +6,7 @@ * Based on: * U-Boot file:/include/configs/am335x_evm.h * - * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ */ #ifndef __CONFIG_THUBAN_H diff --git a/include/configs/ti_am335x_common.h b/include/configs/ti_am335x_common.h index 20f8643771..c827a9cace 100644 --- a/include/configs/ti_am335x_common.h +++ b/include/configs/ti_am335x_common.h @@ -2,10 +2,10 @@ /* * ti_am335x_common.h * - * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ * * For more details, please see the technical documents listed at - * http://www.ti.com/product/am3359#technicaldocuments + * https://www.ti.com/product/am3359#technicaldocuments */ #ifndef __CONFIG_TI_AM335X_COMMON_H__ diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h index 4e30d0d2dd..3def7b1027 100644 --- a/include/configs/ti_armv7_common.h +++ b/include/configs/ti_armv7_common.h @@ -2,7 +2,7 @@ /* * ti_armv7_common.h * - * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ * * The various ARMv7 SoCs from TI all share a number of IP blocks when * implementing a given feature. Rather than define these in every diff --git a/include/configs/ti_armv7_omap.h b/include/configs/ti_armv7_omap.h index d34042af46..0b8b1ac8f9 100644 --- a/include/configs/ti_armv7_omap.h +++ b/include/configs/ti_armv7_omap.h @@ -2,7 +2,7 @@ /* * ti_armv7_omap.h * - * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2015 Texas Instruments Incorporated - https://www.ti.com/ * * The various ARMv7 SoCs from TI all share a number of IP blocks when * implementing a given feature. This is meant to isolate the features diff --git a/include/configs/ti_omap3_common.h b/include/configs/ti_omap3_common.h index 36a05b6896..45f7179f03 100644 --- a/include/configs/ti_omap3_common.h +++ b/include/configs/ti_omap3_common.h @@ -2,12 +2,12 @@ /* * ti_omap3_common.h * - * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ * * For more details, please see the technical documents listed at - * http://www.ti.com/product/omap3530 - * http://www.ti.com/product/omap3630 - * http://www.ti.com/product/dm3730 + * https://www.ti.com/product/omap3530 + * https://www.ti.com/product/omap3630 + * https://www.ti.com/product/dm3730 */ #ifndef __CONFIG_TI_OMAP3_COMMON_H__ diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h index 4e5aa74147..26494ae980 100644 --- a/include/configs/ti_omap5_common.h +++ b/include/configs/ti_omap5_common.h @@ -10,7 +10,7 @@ * TI OMAP5 AND DRA7XX common configuration settings * * For more details, please see the technical documents listed at - * http://www.ti.com/product/omap5432 + * https://www.ti.com/product/omap5432 */ #ifndef __CONFIG_TI_OMAP5_COMMON_H diff --git a/include/cpsw.h b/include/cpsw.h index 786f8b385b..5e0509923b 100644 --- a/include/cpsw.h +++ b/include/cpsw.h @@ -1,7 +1,7 @@ /* * CPSW Ethernet Switch Driver * - * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2010 Texas Instruments Incorporated - https://www.ti.com/ * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h index 19e97a9032..5795115c49 100644 --- a/include/dm/ofnode.h +++ b/include/dm/ofnode.h @@ -977,12 +977,22 @@ const char *ofnode_read_chosen_string(const char *propname); ofnode ofnode_get_chosen_node(const char *propname); /** - * ofnode_read_aliases_prop() - get the value of a aliases property + * ofnode_read_baud() - get the baudrate from string value of chosen property * - * This looks for a property within the /aliases node and returns its value + * This looks for stdout-path property within the /chosen node and parses its + * value to return baudrate. * * This only works with the control FDT. * + * Return: baudrate value if found, else -ve error code + */ +int ofnode_read_baud(void); + +/** + * ofnode_read_aliases_prop() - get the value of a aliases property + * + * This looks for a property within the /aliases node and returns its value + * * @propname: Property name to look for * @sizep: Returns size of property, or `FDT_ERR_...` error code if function * returns NULL diff --git a/include/dm/util.h b/include/dm/util.h index 89206cc496..95c3527a37 100644 --- a/include/dm/util.h +++ b/include/dm/util.h @@ -11,9 +11,7 @@ struct dm_stats; #if CONFIG_IS_ENABLED(DM_WARN) #define dm_warn(fmt...) log(LOGC_DM, LOGL_WARNING, ##fmt) #else -static inline void dm_warn(const char *fmt, ...) -{ -} +#define dm_warn(fmt...) log(LOGC_DM, LOGL_DEBUG, ##fmt) #endif struct list_head; diff --git a/include/dt-bindings/net/mscc-phy-vsc8531.h b/include/dt-bindings/net/mscc-phy-vsc8531.h index 61f5287d75..c340437414 100644 --- a/include/dt-bindings/net/mscc-phy-vsc8531.h +++ b/include/dt-bindings/net/mscc-phy-vsc8531.h @@ -28,13 +28,4 @@ #define VSC8531_FORCE_LED_OFF 14 #define VSC8531_FORCE_LED_ON 15 -#define VSC8531_RGMII_CLK_DELAY_0_2_NS 0 -#define VSC8531_RGMII_CLK_DELAY_0_8_NS 1 -#define VSC8531_RGMII_CLK_DELAY_1_1_NS 2 -#define VSC8531_RGMII_CLK_DELAY_1_7_NS 3 -#define VSC8531_RGMII_CLK_DELAY_2_0_NS 4 -#define VSC8531_RGMII_CLK_DELAY_2_3_NS 5 -#define VSC8531_RGMII_CLK_DELAY_2_6_NS 6 -#define VSC8531_RGMII_CLK_DELAY_3_4_NS 7 - #endif diff --git a/include/dt-bindings/pinctrl/dra.h b/include/dt-bindings/pinctrl/dra.h index b543eebd2f..765c385f7b 100644 --- a/include/dt-bindings/pinctrl/dra.h +++ b/include/dt-bindings/pinctrl/dra.h @@ -1,7 +1,7 @@ /* * This header provides constants for DRA pinctrl bindings. * - * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ * Author: Rajendra Nayak <rnayak@ti.com> * * This program is free software; you can redistribute it and/or modify diff --git a/include/dt-bindings/reset/ti-syscon.h b/include/dt-bindings/reset/ti-syscon.h index 884fd91df8..1427ff140f 100644 --- a/include/dt-bindings/reset/ti-syscon.h +++ b/include/dt-bindings/reset/ti-syscon.h @@ -1,7 +1,7 @@ /* * TI Syscon Reset definitions * - * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2015-2016 Texas Instruments Incorporated - https://www.ti.com/ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/include/dwc3-omap-uboot.h b/include/dwc3-omap-uboot.h index 9e0e717dc9..ed92bfc5a9 100644 --- a/include/dwc3-omap-uboot.h +++ b/include/dwc3-omap-uboot.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* include/dwc3_omap_uboot.h * - * Copyright (c) 2015 Texas Instruments Incorporated - http://www.ti.com + * Copyright (c) 2015 Texas Instruments Incorporated - https://www.ti.com * * Designware SuperSpeed OMAP Glue uboot init */ diff --git a/include/dwc3-uboot.h b/include/dwc3-uboot.h index bb0436c097..35cfbb93b2 100644 --- a/include/dwc3-uboot.h +++ b/include/dwc3-uboot.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* include/dwc3-uboot.h * - * Copyright (c) 2015 Texas Instruments Incorporated - http://www.ti.com + * Copyright (c) 2015 Texas Instruments Incorporated - https://www.ti.com * * Designware SuperSpeed USB uboot init */ diff --git a/include/env/ti/dfu.h b/include/env/ti/dfu.h index 3c90570107..10bcf33c63 100644 --- a/include/env/ti/dfu.h +++ b/include/env/ti/dfu.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com * * Environment variable definitions for DFU on TI boards. */ diff --git a/include/env/ti/k3_dfu.h b/include/env/ti/k3_dfu.h index a16a3adeca..098f5f5dab 100644 --- a/include/env/ti/k3_dfu.h +++ b/include/env/ti/k3_dfu.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com * * Environment variable definitions for DFU on TI K3 SoCs. * diff --git a/include/env/ti/k3_rproc.h b/include/env/ti/k3_rproc.h index 3418cb42be..a467d751e2 100644 --- a/include/env/ti/k3_rproc.h +++ b/include/env/ti/k3_rproc.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com * * rproc environment variable definitions for various TI K3 SoCs. */ diff --git a/include/env/ti/mmc.h b/include/env/ti/mmc.h index 769ea9d5ef..d07189baaf 100644 --- a/include/env/ti/mmc.h +++ b/include/env/ti/mmc.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com * * Environment variable definitions for MMC/SD on TI boards. */ diff --git a/include/env/ti/nand.h b/include/env/ti/nand.h index 7d00afa2b1..0e0da458b9 100644 --- a/include/env/ti/nand.h +++ b/include/env/ti/nand.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com * * Environment variable definitions for NAND on TI boards. */ diff --git a/include/env/ti/ufs.h b/include/env/ti/ufs.h index 6619ec9c88..c192f3aee1 100644 --- a/include/env/ti/ufs.h +++ b/include/env/ti/ufs.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com * * Environment variable definitions for UFS on TI boards. */ diff --git a/include/env_default.h b/include/env_default.h index b16c22d5a2..2ca4a087d3 100644 --- a/include/env_default.h +++ b/include/env_default.h @@ -21,7 +21,7 @@ env_t embedded_environment __UBOOT_ENV_SECTION__(environment) = { { #elif defined(DEFAULT_ENV_INSTANCE_STATIC) static char default_environment[] = { -#elif defined(DEFAULT_ENV_IS_RW) +#elif defined(CONFIG_DEFAULT_ENV_IS_RW) char default_environment[] = { #else const char default_environment[] = { @@ -42,7 +42,7 @@ const char default_environment[] = { #if defined(CONFIG_BOOTDELAY) "bootdelay=" __stringify(CONFIG_BOOTDELAY) "\0" #endif -#if defined(CONFIG_BAUDRATE) && (CONFIG_BAUDRATE >= 0) +#if !defined(CONFIG_OF_SERIAL_BAUD) && defined(CONFIG_BAUDRATE) && (CONFIG_BAUDRATE >= 0) "baudrate=" __stringify(CONFIG_BAUDRATE) "\0" #endif #ifdef CONFIG_LOADS_ECHO @@ -119,6 +119,10 @@ const char default_environment[] = { #ifdef CFG_EXTRA_ENV_SETTINGS CFG_EXTRA_ENV_SETTINGS #endif +#ifdef CONFIG_OF_SERIAL_BAUD + /* Padding for baudrate at the end when environment is writable */ + "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" +#endif "\0" #else /* CONFIG_USE_DEFAULT_ENV_FILE */ #include "generated/defaultenv_autogenerated.h" diff --git a/include/env_internal.h b/include/env_internal.h index ae7816d38e..5c289d67f9 100644 --- a/include/env_internal.h +++ b/include/env_internal.h @@ -89,7 +89,7 @@ typedef struct environment_s { extern env_t embedded_environment; #endif /* ENV_IS_EMBEDDED */ -#ifdef DEFAULT_ENV_IS_RW +#ifdef CONFIG_DEFAULT_ENV_IS_RW extern char default_environment[]; #else extern const char default_environment[]; diff --git a/include/generic-phy.h b/include/generic-phy.h index bee4de8a0b..eaab749166 100644 --- a/include/generic-phy.h +++ b/include/generic-phy.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ * Written by Jean-Jacques Hiblot <jjhiblot@ti.com> */ diff --git a/include/k3-avs.h b/include/k3-avs.h index e3c3cafbb9..1014d5d114 100644 --- a/include/k3-avs.h +++ b/include/k3-avs.h @@ -2,7 +2,7 @@ /* * Texas Instruments' K3 Adaptive Voltage Scaling driver * - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/ * Tero Kristo <t-kristo@ti.com> * */ diff --git a/include/k3-clk.h b/include/k3-clk.h index 49ba53d20f..1b6ab8fe65 100644 --- a/include/k3-clk.h +++ b/include/k3-clk.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * (C) Copyright 2020-2021 Texas Instruments Incorporated - http://www.ti.com + * (C) Copyright 2020-2021 Texas Instruments Incorporated - https://www.ti.com * Tero Kristo <t-kristo@ti.com> */ diff --git a/include/k3-dev.h b/include/k3-dev.h index d288ae3be7..072e10ba63 100644 --- a/include/k3-dev.h +++ b/include/k3-dev.h @@ -2,7 +2,7 @@ /* * Texas Instruments K3 Device Platform Data * - * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/ */ #ifndef __K3_DEV_H__ #define __K3_DEV_H__ diff --git a/include/linux/soc/ti/cppi5.h b/include/linux/soc/ti/cppi5.h index 3a55c3ec46..c5d7ebd05d 100644 --- a/include/linux/soc/ti/cppi5.h +++ b/include/linux/soc/ti/cppi5.h @@ -2,7 +2,7 @@ /* * CPPI5 descriptors interface * - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com */ #ifndef __TI_CPPI5_H__ diff --git a/include/linux/soc/ti/k3-navss-ringacc.h b/include/linux/soc/ti/k3-navss-ringacc.h index 0ad8f203da..30fb903d97 100644 --- a/include/linux/soc/ti/k3-navss-ringacc.h +++ b/include/linux/soc/ti/k3-navss-ringacc.h @@ -2,7 +2,7 @@ /* * TI K3 AM65x NAVSS Ring accelerator Manager (RA) subsystem driver * - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com */ #ifndef __SOC_TI_K3_NAVSS_RINGACC_API_H_ diff --git a/include/linux/soc/ti/k3-sec-proxy.h b/include/linux/soc/ti/k3-sec-proxy.h index f34854ceeb..c3a83f163d 100644 --- a/include/linux/soc/ti/k3-sec-proxy.h +++ b/include/linux/soc/ti/k3-sec-proxy.h @@ -2,7 +2,7 @@ /* * Texas Instruments' K3 Secure proxy * - * Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2017-2018 Texas Instruments Incorporated - https://www.ti.com/ * Lokesh Vutla <lokeshvutla@ti.com> * */ diff --git a/include/linux/soc/ti/ti-udma.h b/include/linux/soc/ti/ti-udma.h index 04e354fb2d..89faf69242 100644 --- a/include/linux/soc/ti/ti-udma.h +++ b/include/linux/soc/ti/ti-udma.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com * Author: Peter Ujfalusi <peter.ujfalusi@ti.com> */ diff --git a/include/linux/soc/ti/ti_sci_protocol.h b/include/linux/soc/ti/ti_sci_protocol.h index 7f9941894c..8e4c43cef3 100644 --- a/include/linux/soc/ti/ti_sci_protocol.h +++ b/include/linux/soc/ti/ti_sci_protocol.h @@ -3,7 +3,7 @@ * Texas Instruments System Control Interface Protocol * Based on include/linux/soc/ti/ti_sci_protocol.h from Linux. * - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ * Nishanth Menon * Lokesh Vutla <lokeshvutla@ti.com> */ diff --git a/include/linux/usb/dwc3-omap.h b/include/linux/usb/dwc3-omap.h index 62180e3973..d5737ed7e8 100644 --- a/include/linux/usb/dwc3-omap.h +++ b/include/linux/usb/dwc3-omap.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* include/linux/usb/dwc3-omap.h * - * Copyright (c) 2014 Texas Instruments Incorporated - http://www.ti.com + * Copyright (c) 2014 Texas Instruments Incorporated - https://www.ti.com * * Designware SuperSpeed Glue */ diff --git a/include/linux/usb/otg.h b/include/linux/usb/otg.h index 5d0dac950e..e7e3d259ca 100644 --- a/include/linux/usb/otg.h +++ b/include/linux/usb/otg.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* include/linux/usb/otg.h * - * Copyright (c) 2015 Texas Instruments Incorporated - http://www.ti.com + * Copyright (c) 2015 Texas Instruments Incorporated - https://www.ti.com * * USB OTG (On The Go) defines */ diff --git a/include/mux-internal.h b/include/mux-internal.h index 93e3a5cdd7..67fa28933c 100644 --- a/include/mux-internal.h +++ b/include/mux-internal.h @@ -5,7 +5,7 @@ * Copyright (C) 2017 Axentia Technologies AB * Author: Peter Rosin <peda@axentia.se> * - * Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2017-2018 Texas Instruments Incorporated - https://www.ti.com/ * Jean-Jacques Hiblot <jjhiblot@ti.com> */ diff --git a/include/mux.h b/include/mux.h index c92d887591..e5deaba66f 100644 --- a/include/mux.h +++ b/include/mux.h @@ -10,7 +10,7 @@ * Copyright (C) 2017 Axentia Technologies AB * Author: Peter Rosin <peda@axentia.se> * - * Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2017-2018 Texas Instruments Incorporated - https://www.ti.com/ * Jean-Jacques Hiblot <jjhiblot@ti.com> */ diff --git a/include/power/tps62362.h b/include/power/tps62362.h index f0fc538463..df06c28fed 100644 --- a/include/power/tps62362.h +++ b/include/power/tps62362.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * (C) Copyright 2014 Texas Instruments Incorporated - http://www.ti.com + * (C) Copyright 2014 Texas Instruments Incorporated - https://www.ti.com * Author: Felipe Balbi <balbi@ti.com> */ diff --git a/include/power/tps65217.h b/include/power/tps65217.h index 669a94a6c8..7862b31bfb 100644 --- a/include/power/tps65217.h +++ b/include/power/tps65217.h @@ -3,7 +3,7 @@ * (C) Copyright 2011-2013 * Texas Instruments, <www.ti.com> * - * For more details, please see the TRM at http://www.ti.com/product/tps65217a + * For more details, please see the TRM at https://www.ti.com/product/tps65217a */ #ifndef __POWER_TPS65217_H__ diff --git a/include/power/tps65910.h b/include/power/tps65910.h index 21b2a21ee0..ccc759acf6 100644 --- a/include/power/tps65910.h +++ b/include/power/tps65910.h @@ -3,7 +3,7 @@ * (C) Copyright 2011-2013 * Texas Instruments, <www.ti.com> * - * For more details, please see the TRM at http://www.ti.com/product/tps65910 + * For more details, please see the TRM at https://www.ti.com/product/tps65910 */ #ifndef __POWER_TPS65910_H__ #define __POWER_TPS65910_H__ diff --git a/include/remoteproc.h b/include/remoteproc.h index f48054de6b..a11dc8a9b6 100644 --- a/include/remoteproc.h +++ b/include/remoteproc.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* * (C) Copyright 2015 - * Texas Instruments Incorporated - http://www.ti.com/ + * Texas Instruments Incorporated - https://www.ti.com/ */ #ifndef _RPROC_H_ diff --git a/include/serial.h b/include/serial.h index 205889d28b..d129dc3253 100644 --- a/include/serial.h +++ b/include/serial.h @@ -339,6 +339,13 @@ int serial_setconfig(struct udevice *dev, uint config); */ int serial_getinfo(struct udevice *dev, struct serial_device_info *info); +/** + * fetch_baud_from_dtb() - Fetch the baudrate value from DT + * + * Return: baudrate if OK, -ve on error + */ +int fetch_baud_from_dtb(void); + void atmel_serial_initialize(void); void mcf_serial_initialize(void); void mpc85xx_serial_initialize(void); diff --git a/include/soc.h b/include/soc.h index a52a300a84..850db28b76 100644 --- a/include/soc.h +++ b/include/soc.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * (C) Copyright 2020 - Texas Instruments Incorporated - http://www.ti.com/ + * (C) Copyright 2020 - Texas Instruments Incorporated - https://www.ti.com/ * Dave Gerlach <d-gerlach@ti.com> */ diff --git a/include/ti-usb-phy-uboot.h b/include/ti-usb-phy-uboot.h index cd2ba40477..feeddb8652 100644 --- a/include/ti-usb-phy-uboot.h +++ b/include/ti-usb-phy-uboot.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* include/ti_usb_phy_uboot.h * - * Copyright (c) 2014 Texas Instruments Incorporated - http://www.ti.com + * Copyright (c) 2014 Texas Instruments Incorporated - https://www.ti.com * * USB2 and USB3 PHY uboot init */ diff --git a/include/video.h b/include/video.h index 5048116a3d..4d8df9baaa 100644 --- a/include/video.h +++ b/include/video.h @@ -21,9 +21,12 @@ struct udevice; * @align: Frame-buffer alignment, indicating the memory boundary the frame * buffer should start on. If 0, 1MB is assumed * @size: Frame-buffer size, in bytes - * @base: Base address of frame buffer, 0 if not yet known - * @copy_base: Base address of a hardware copy of the frame buffer. See - * CONFIG_VIDEO_COPY. + * @base: Base address of frame buffer, 0 if not yet known. If CONFIG_VIDEO_COPY + * is enabled, this is the software copy, so writes to this will not be + * visible until vidconsole_sync_copy() is called. If CONFIG_VIDEO_COPY is + * disabled, this is the hardware framebuffer. + * @copy_base: Base address of a hardware copy of the frame buffer. If + * CONFIG_VIDEO_COPY is disabled, this is not used. * @copy_size: Size of copy framebuffer, used if @size is 0 * @hide_logo: Hide the logo (used for testing) */ diff --git a/lib/efi_loader/efi_gop.c b/lib/efi_loader/efi_gop.c index 778b693f98..a09db31eb4 100644 --- a/lib/efi_loader/efi_gop.c +++ b/lib/efi_loader/efi_gop.c @@ -10,6 +10,7 @@ #include <efi_loader.h> #include <log.h> #include <malloc.h> +#include <mapmem.h> #include <video.h> #include <asm/global_data.h> @@ -467,10 +468,10 @@ efi_status_t efi_gop_register(void) struct efi_gop_obj *gopobj; u32 bpix, format, col, row; u64 fb_base, fb_size; - void *fb; efi_status_t ret; struct udevice *vdev; struct video_priv *priv; + struct video_uc_plat *plat; /* We only support a single video output device for now */ if (uclass_first_device_err(UCLASS_VIDEO, &vdev)) { @@ -483,9 +484,10 @@ efi_status_t efi_gop_register(void) format = priv->format; col = video_get_xsize(vdev); row = video_get_ysize(vdev); - fb_base = (uintptr_t)priv->fb; - fb_size = priv->fb_size; - fb = priv->fb; + + plat = dev_get_uclass_plat(vdev); + fb_base = IS_ENABLED(CONFIG_VIDEO_COPY) ? plat->copy_base : plat->base; + fb_size = plat->size; switch (bpix) { case VIDEO_BPP16: @@ -547,7 +549,7 @@ efi_status_t efi_gop_register(void) } gopobj->info.pixels_per_scanline = col; gopobj->bpix = bpix; - gopobj->fb = fb; + gopobj->fb = map_sysmem(fb_base, fb_size); return EFI_SUCCESS; } diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl index 32f4384657..e450ffd5d5 100644 --- a/scripts/Makefile.spl +++ b/scripts/Makefile.spl @@ -7,7 +7,7 @@ # Daniel Schwierzeck, daniel.schwierzeck@googlemail.com. # # (C) Copyright 2011 -# Texas Instruments Incorporated - http://www.ti.com/ +# Texas Instruments Incorporated - https://www.ti.com/ # Aneesh V <aneesh@ti.com> # Based on top-level Makefile. # diff --git a/test/boot/bootflow.c b/test/boot/bootflow.c index f640db8a24..b97c566f00 100644 --- a/test/boot/bootflow.c +++ b/test/boot/bootflow.c @@ -511,19 +511,27 @@ BOOTSTD_TEST(bootflow_cmd_boot, UT_TESTF_DM | UT_TESTF_SCAN_FDT); /** * prep_mmc_bootdev() - Set up an mmc bootdev so we can access other distros * + * After calling this function, set std->bootdev_order to *@old_orderp to + * restore normal operation of bootstd (i.e. with the original bootdev order) + * * @uts: Unit test state - * @mmc_dev: MMC device to use, e.g. "mmc4" + * @mmc_dev: MMC device to use, e.g. "mmc4". Note that this must remain valid + * in the caller until + * @bind_cros: true to bind the ChromiumOS bootmeth + * @old_orderp: Returns the original bootdev order, which must be restored * Returns 0 on success, -ve on failure */ static int prep_mmc_bootdev(struct unit_test_state *uts, const char *mmc_dev, - bool bind_cros) + bool bind_cros, const char ***old_orderp) { - const char *order[] = {"mmc2", "mmc1", mmc_dev, NULL}; + static const char *order[] = {"mmc2", "mmc1", NULL, NULL}; struct udevice *dev, *bootstd; struct bootstd_priv *std; const char **old_order; ofnode root, node; + order[2] = mmc_dev; + /* Enable the mmc4 node since we need a second bootflow */ root = oftree_root(oftree_default()); node = ofnode_find_subnode(root, mmc_dev); @@ -546,26 +554,49 @@ static int prep_mmc_bootdev(struct unit_test_state *uts, const char *mmc_dev, std = dev_get_priv(bootstd); old_order = std->bootdev_order; std->bootdev_order = order; + *old_orderp = old_order; + + return 0; +} + +/** + * scan_mmc_bootdev() - Set up an mmc bootdev so we can access other distros + * + * @uts: Unit test state + * @mmc_dev: MMC device to use, e.g. "mmc4" + * @bind_cros: true to bind the ChromiumOS bootmeth + * Returns 0 on success, -ve on failure + */ +static int scan_mmc_bootdev(struct unit_test_state *uts, const char *mmc_dev, + bool bind_cros) +{ + struct bootstd_priv *std; + struct udevice *bootstd; + const char **old_order; + + ut_assertok(prep_mmc_bootdev(uts, mmc_dev, bind_cros, &old_order)); console_record_reset_enable(); ut_assertok(run_command("bootflow scan", 0)); ut_assert_console_end(); /* Restore the order used by the device tree */ + ut_assertok(uclass_first_device_err(UCLASS_BOOTSTD, &bootstd)); + std = dev_get_priv(bootstd); std->bootdev_order = old_order; return 0; } /** - * prep_mmc4_bootdev() - Set up the mmc4 bootdev so we can access a fake Armbian + * scan_mmc4_bootdev() - Set up the mmc4 bootdev so we can access a fake Armbian * * @uts: Unit test state * Returns 0 on success, -ve on failure */ -static int prep_mmc4_bootdev(struct unit_test_state *uts) +static int scan_mmc4_bootdev(struct unit_test_state *uts) { - ut_assertok(prep_mmc_bootdev(uts, "mmc4", false)); + ut_assertok(scan_mmc_bootdev(uts, "mmc4", false)); return 0; } @@ -573,9 +604,13 @@ static int prep_mmc4_bootdev(struct unit_test_state *uts) /* Check 'bootflow menu' to select a bootflow */ static int bootflow_cmd_menu(struct unit_test_state *uts) { + struct bootstd_priv *std; char prev[3]; - ut_assertok(prep_mmc4_bootdev(uts)); + /* get access to the current bootflow */ + ut_assertok(bootstd_get_priv(&std)); + + ut_assertok(scan_mmc4_bootdev(uts)); /* Add keypresses to move to and select the second one in the list */ prev[0] = CTL_CH('n'); @@ -585,6 +620,17 @@ static int bootflow_cmd_menu(struct unit_test_state *uts) ut_assertok(run_command("bootflow menu", 0)); ut_assert_nextline("Selected: Armbian"); + ut_assertnonnull(std->cur_bootflow); + ut_assert_console_end(); + + /* Check not selecting anything */ + prev[0] = '\e'; + prev[1] = '\0'; + ut_asserteq(1, console_in_puts(prev)); + + ut_asserteq(1, run_command("bootflow menu", 0)); + ut_assertnull(std->cur_bootflow); + ut_assert_nextline("Nothing chosen"); ut_assert_console_end(); return 0; @@ -681,7 +727,7 @@ static int bootflow_menu_theme(struct unit_test_state *uts) ofnode node; int i; - ut_assertok(prep_mmc4_bootdev(uts)); + ut_assertok(scan_mmc4_bootdev(uts)); ut_assertok(bootflow_menu_new(&exp)); node = ofnode_path("/bootstd/theme"); @@ -996,7 +1042,7 @@ BOOTSTD_TEST(bootflow_cmdline_special, 0); /* Test ChromiumOS bootmeth */ static int bootflow_cros(struct unit_test_state *uts) { - ut_assertok(prep_mmc_bootdev(uts, "mmc5", true)); + ut_assertok(scan_mmc_bootdev(uts, "mmc5", true)); ut_assertok(run_command("bootflow list", 0)); ut_assert_nextlinen("Showing all"); diff --git a/test/cmd/mbr.c b/test/cmd/mbr.c index 5d7402154d..46b78e706c 100644 --- a/test/cmd/mbr.c +++ b/test/cmd/mbr.c @@ -205,16 +205,14 @@ static unsigned build_mbr_parts(char *buf, size_t buf_size, unsigned num_parts) bytes_remaining -= cur_str_size; } - else if (num_parts == 5) { - cur_str_size = sizeof(mbr_parts_p5); - if (cur_str_size + 1 > bytes_remaining) - return 1; - strcat(cur_buf, mbr_parts_p5); - bytes_remaining -= cur_str_size; + else if (num_parts == 5) { + cur_str_size = sizeof(mbr_parts_p5); + if (cur_str_size + 1 > bytes_remaining) + return 1; + strcat(cur_buf, mbr_parts_p5); + bytes_remaining -= cur_str_size; - } - else if (num_parts > 5) - return 1; + } } } } diff --git a/test/dm/mux-emul.c b/test/dm/mux-emul.c index 58233edc9b..c6aeeb7e1f 100644 --- a/test/dm/mux-emul.c +++ b/test/dm/mux-emul.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/ * Pratyush Yadav <p.yadav@ti.com> */ #include <common.h> diff --git a/test/dm/mux-mmio.c b/test/dm/mux-mmio.c index fd353d8b15..27c881dabd 100644 --- a/test/dm/mux-mmio.c +++ b/test/dm/mux-mmio.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2017-2018 Texas Instruments Incorporated - https://www.ti.com/ * Jean-Jacques Hiblot <jjhiblot@ti.com> */ diff --git a/test/dm/nop.c b/test/dm/nop.c index 75b9e7b6cc..f7d9a0f3df 100644 --- a/test/dm/nop.c +++ b/test/dm/nop.c @@ -2,7 +2,7 @@ /* * Test for the NOP uclass * - * (C) Copyright 2019 - Texas Instruments Incorporated - http://www.ti.com/ + * (C) Copyright 2019 - Texas Instruments Incorporated - https://www.ti.com/ * Jean-Jacques Hiblot <jjhiblot@ti.com> */ diff --git a/test/dm/phy.c b/test/dm/phy.c index 4f91abca3a..0cf3689fde 100644 --- a/test/dm/phy.c +++ b/test/dm/phy.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ * Written by Jean-Jacques Hiblot <jjhiblot@ti.com> */ diff --git a/test/dm/remoteproc.c b/test/dm/remoteproc.c index 7a8ff47fa1..f6f9e509e2 100644 --- a/test/dm/remoteproc.c +++ b/test/dm/remoteproc.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * (C) Copyright 2015 - * Texas Instruments Incorporated - http://www.ti.com/ + * Texas Instruments Incorporated - https://www.ti.com/ */ #include <common.h> #include <dm.h> diff --git a/test/dm/serial.c b/test/dm/serial.c index 37d17a65f1..34b783e062 100644 --- a/test/dm/serial.c +++ b/test/dm/serial.c @@ -29,6 +29,7 @@ static int dm_test_serial(struct unit_test_state *uts) &dev_serial)); ut_assertok(serial_tstc()); + ut_asserteq(115200, fetch_baud_from_dtb()); /* * test with default config which is the only one supported by * sandbox_serial driver diff --git a/test/dm/soc.c b/test/dm/soc.c index 17e1b5ba01..8f6c97fa79 100644 --- a/test/dm/soc.c +++ b/test/dm/soc.c @@ -2,7 +2,7 @@ /* * Test for the SOC uclass * - * (C) Copyright 2020 - Texas Instruments Incorporated - http://www.ti.com/ + * (C) Copyright 2020 - Texas Instruments Incorporated - https://www.ti.com/ * Dave Gerlach <d-gerlach@ti.com> */ diff --git a/tools/.gitignore b/tools/.gitignore index 941d38de21..0108c56730 100644 --- a/tools/.gitignore +++ b/tools/.gitignore @@ -34,7 +34,7 @@ /relocate-rela /spl_size_limit /sunxi-spl-image-builder -/tools/generated/**/*.c +/generated/**/*.c /update_octeon_header /version.h /xway-swap-bytes diff --git a/tools/binman/entries.rst b/tools/binman/entries.rst index 2402adb3d9..61de7f1f4a 100644 --- a/tools/binman/entries.rst +++ b/tools/binman/entries.rst @@ -1,5 +1,5 @@ Binman Entry Documentation -=========================== +========================== This file describes the entry types supported by binman. These entry types can be placed in an image one by one to build up a final firmware image. It is diff --git a/tools/patman/__main__.py b/tools/patman/__main__.py index 197ac1aad1..f645b38b64 100755 --- a/tools/patman/__main__.py +++ b/tools/patman/__main__.py @@ -6,197 +6,93 @@ """See README for more information""" -from argparse import ArgumentParser try: - import importlib.resources + from importlib import resources except ImportError: # for Python 3.6 - import importlib_resources + import importlib_resources as resources import os import re import sys import traceback -if __name__ == "__main__": - # Allow 'from patman import xxx to work' - our_path = os.path.dirname(os.path.realpath(__file__)) - sys.path.append(os.path.join(our_path, '..')) +# Allow 'from patman import xxx to work' +# pylint: disable=C0413 +our_path = os.path.dirname(os.path.realpath(__file__)) +sys.path.append(os.path.join(our_path, '..')) # Our modules +from patman import cmdline from patman import control -from patman import func_test -from patman import gitutil -from patman import project -from patman import settings from u_boot_pylib import terminal from u_boot_pylib import test_util from u_boot_pylib import tools -epilog = '''Create patches from commits in a branch, check them and email them -as specified by tags you place in the commits. Use -n to do a dry run first.''' - -parser = ArgumentParser(epilog=epilog) -parser.add_argument('-b', '--branch', type=str, - help="Branch to process (by default, the current branch)") -parser.add_argument('-c', '--count', dest='count', type=int, - default=-1, help='Automatically create patches from top n commits') -parser.add_argument('-e', '--end', type=int, default=0, - help='Commits to skip at end of patch list') -parser.add_argument('-D', '--debug', action='store_true', - help='Enabling debugging (provides a full traceback on error)') -parser.add_argument('-p', '--project', default=project.detect_project(), - help="Project name; affects default option values and " - "aliases [default: %(default)s]") -parser.add_argument('-P', '--patchwork-url', - default='https://patchwork.ozlabs.org', - help='URL of patchwork server [default: %(default)s]') -parser.add_argument('-s', '--start', dest='start', type=int, - default=0, help='Commit to start creating patches from (0 = HEAD)') -parser.add_argument('-v', '--verbose', action='store_true', dest='verbose', - default=False, help='Verbose output of errors and warnings') -parser.add_argument('-H', '--full-help', action='store_true', dest='full_help', - default=False, help='Display the README file') - -subparsers = parser.add_subparsers(dest='cmd') -send = subparsers.add_parser( - 'send', help='Format, check and email patches (default command)') -send.add_argument('-i', '--ignore-errors', action='store_true', - dest='ignore_errors', default=False, - help='Send patches email even if patch errors are found') -send.add_argument('-l', '--limit-cc', dest='limit', type=int, default=None, - help='Limit the cc list to LIMIT entries [default: %(default)s]') -send.add_argument('-m', '--no-maintainers', action='store_false', - dest='add_maintainers', default=True, - help="Don't cc the file maintainers automatically") -send.add_argument( - '--get-maintainer-script', dest='get_maintainer_script', type=str, - action='store', - default=os.path.join(gitutil.get_top_level(), 'scripts', - 'get_maintainer.pl') + ' --norolestats', - help='File name of the get_maintainer.pl (or compatible) script.') -send.add_argument('-n', '--dry-run', action='store_true', dest='dry_run', - default=False, help="Do a dry run (create but don't email patches)") -send.add_argument('-r', '--in-reply-to', type=str, action='store', - help="Message ID that this series is in reply to") -send.add_argument('-t', '--ignore-bad-tags', action='store_true', - default=False, - help='Ignore bad tags / aliases (default=warn)') -send.add_argument('-T', '--thread', action='store_true', dest='thread', - default=False, help='Create patches as a single thread') -send.add_argument('--cc-cmd', dest='cc_cmd', type=str, action='store', - default=None, help='Output cc list for patch file (used by git)') -send.add_argument('--no-binary', action='store_true', dest='ignore_binary', - default=False, - help="Do not output contents of changes in binary files") -send.add_argument('--no-check', action='store_false', dest='check_patch', - default=True, - help="Don't check for patch compliance") -send.add_argument('--tree', dest='check_patch_use_tree', default=False, - action='store_true', - help=("Set `tree` to True. If `tree` is False then we'll " - "pass '--no-tree' to checkpatch (default: tree=%(default)s)")) -send.add_argument('--no-tree', dest='check_patch_use_tree', - action='store_false', help="Set `tree` to False") -send.add_argument('--no-tags', action='store_false', dest='process_tags', - default=True, help="Don't process subject tags as aliases") -send.add_argument('--no-signoff', action='store_false', dest='add_signoff', - default=True, help="Don't add Signed-off-by to patches") -send.add_argument('--smtp-server', type=str, - help="Specify the SMTP server to 'git send-email'") -send.add_argument('--keep-change-id', action='store_true', - help='Preserve Change-Id tags in patches to send.') - -send.add_argument('patchfiles', nargs='*') - -# Only add the 'test' action if the test data files are available. -if os.path.exists(func_test.TEST_DATA_DIR): - test_parser = subparsers.add_parser('test', help='Run tests') - test_parser.add_argument('testname', type=str, default=None, nargs='?', - help="Specify the test to run") - -status = subparsers.add_parser('status', - help='Check status of patches in patchwork') -status.add_argument('-C', '--show-comments', action='store_true', - help='Show comments from each patch') -status.add_argument('-d', '--dest-branch', type=str, - help='Name of branch to create with collected responses') -status.add_argument('-f', '--force', action='store_true', - help='Force overwriting an existing branch') - -# Parse options twice: first to get the project and second to handle -# defaults properly (which depends on project) -# Use parse_known_args() in case 'cmd' is omitted -argv = sys.argv[1:] -args, rest = parser.parse_known_args(argv) -if hasattr(args, 'project'): - settings.Setup(parser, args.project) - args, rest = parser.parse_known_args(argv) - -# If we have a command, it is safe to parse all arguments -if args.cmd: - args = parser.parse_args(argv) -else: - # No command, so insert it after the known arguments and before the ones - # that presumably relate to the 'send' subcommand - nargs = len(rest) - argv = argv[:-nargs] + ['send'] + rest - args = parser.parse_args(argv) - -if __name__ != "__main__": - pass - -if not args.debug: - sys.tracebacklimit = 0 - -# Run our meagre tests -if args.cmd == 'test': - from patman import func_test - from patman import test_checkpatch - - result = test_util.run_test_suites( - 'patman', False, False, False, None, None, None, - [test_checkpatch.TestPatch, func_test.TestFunctional, - 'gitutil', 'settings']) - - sys.exit(0 if result.wasSuccessful() else 1) - -# Process commits, produce patches files, check them, email them -elif args.cmd == 'send': - # Called from git with a patch filename as argument - # Printout a list of additional CC recipients for this patch - if args.cc_cmd: - fd = open(args.cc_cmd, 'r') - re_line = re.compile('(\S*) (.*)') - for line in fd.readlines(): - match = re_line.match(line) - if match and match.group(1) == args.patchfiles[0]: - for cc in match.group(2).split('\0'): - cc = cc.strip() - if cc: - print(cc) - fd.close() - - elif args.full_help: - with importlib.resources.path('patman', 'README.rst') as readme: - tools.print_full_help(str(readme)) - else: - # If we are not processing tags, no need to warning about bad ones - if not args.process_tags: - args.ignore_bad_tags = True - control.send(args) - -# Check status of patches in patchwork -elif args.cmd == 'status': - ret_code = 0 - try: - control.patchwork_status(args.branch, args.count, args.start, args.end, - args.dest_branch, args.force, - args.show_comments, args.patchwork_url) - except Exception as e: - terminal.tprint('patman: %s: %s' % (type(e).__name__, e), - colour=terminal.Color.RED) - if args.debug: - print() - traceback.print_exc() - ret_code = 1 - sys.exit(ret_code) + +def run_patman(): + """Run patamn + + This is the main program. It collects arguments and runs either the tests or + the control module. + """ + args = cmdline.parse_args() + + if not args.debug: + sys.tracebacklimit = 0 + + # Run our meagre tests + if args.cmd == 'test': + # pylint: disable=C0415 + from patman import func_test + from patman import test_checkpatch + + result = test_util.run_test_suites( + 'patman', False, False, False, None, None, None, + [test_checkpatch.TestPatch, func_test.TestFunctional, + 'gitutil', 'settings']) + + sys.exit(0 if result.wasSuccessful() else 1) + + # Process commits, produce patches files, check them, email them + elif args.cmd == 'send': + # Called from git with a patch filename as argument + # Printout a list of additional CC recipients for this patch + if args.cc_cmd: + re_line = re.compile(r'(\S*) (.*)') + with open(args.cc_cmd, 'r', encoding='utf-8') as inf: + for line in inf.readlines(): + match = re_line.match(line) + if match and match.group(1) == args.patchfiles[0]: + for cca in match.group(2).split('\0'): + cca = cca.strip() + if cca: + print(cca) + + elif args.full_help: + with resources.path('patman', 'README.rst') as readme: + tools.print_full_help(str(readme)) + else: + # If we are not processing tags, no need to warning about bad ones + if not args.process_tags: + args.ignore_bad_tags = True + control.send(args) + + # Check status of patches in patchwork + elif args.cmd == 'status': + ret_code = 0 + try: + control.patchwork_status(args.branch, args.count, args.start, args.end, + args.dest_branch, args.force, + args.show_comments, args.patchwork_url) + except Exception as exc: + terminal.tprint(f'patman: {type(exc).__name__}: {exc}', + colour=terminal.Color.RED) + if args.debug: + print() + traceback.print_exc() + ret_code = 1 + sys.exit(ret_code) + + +if __name__ == "__main__": + sys.exit(run_patman()) diff --git a/tools/patman/cmdline.py b/tools/patman/cmdline.py new file mode 100644 index 0000000000..d6496c0cb7 --- /dev/null +++ b/tools/patman/cmdline.py @@ -0,0 +1,147 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright 2023 Google LLC +# + +"""Handles parsing of buildman arguments + +This creates the argument parser and uses it to parse the arguments passed in +""" + +import argparse +import os +import pathlib +import sys + +from patman import gitutil +from patman import project +from patman import settings + +PATMAN_DIR = pathlib.Path(__file__).parent +HAS_TESTS = os.path.exists(PATMAN_DIR / "func_test.py") + +def parse_args(): + """Parse command line arguments from sys.argv[] + + Returns: + tuple containing: + options: command line options + args: command lin arguments + """ + epilog = '''Create patches from commits in a branch, check them and email + them as specified by tags you place in the commits. Use -n to do a dry + run first.''' + + parser = argparse.ArgumentParser(epilog=epilog) + parser.add_argument('-b', '--branch', type=str, + help="Branch to process (by default, the current branch)") + parser.add_argument('-c', '--count', dest='count', type=int, + default=-1, help='Automatically create patches from top n commits') + parser.add_argument('-e', '--end', type=int, default=0, + help='Commits to skip at end of patch list') + parser.add_argument('-D', '--debug', action='store_true', + help='Enabling debugging (provides a full traceback on error)') + parser.add_argument('-p', '--project', default=project.detect_project(), + help="Project name; affects default option values and " + "aliases [default: %(default)s]") + parser.add_argument('-P', '--patchwork-url', + default='https://patchwork.ozlabs.org', + help='URL of patchwork server [default: %(default)s]') + parser.add_argument('-s', '--start', dest='start', type=int, + default=0, help='Commit to start creating patches from (0 = HEAD)') + parser.add_argument( + '-v', '--verbose', action='store_true', dest='verbose', default=False, + help='Verbose output of errors and warnings') + parser.add_argument( + '-H', '--full-help', action='store_true', dest='full_help', + default=False, help='Display the README file') + + subparsers = parser.add_subparsers(dest='cmd') + send = subparsers.add_parser( + 'send', help='Format, check and email patches (default command)') + send.add_argument('-i', '--ignore-errors', action='store_true', + dest='ignore_errors', default=False, + help='Send patches email even if patch errors are found') + send.add_argument('-l', '--limit-cc', dest='limit', type=int, default=None, + help='Limit the cc list to LIMIT entries [default: %(default)s]') + send.add_argument('-m', '--no-maintainers', action='store_false', + dest='add_maintainers', default=True, + help="Don't cc the file maintainers automatically") + send.add_argument( + '--get-maintainer-script', dest='get_maintainer_script', type=str, + action='store', + default=os.path.join(gitutil.get_top_level(), 'scripts', + 'get_maintainer.pl') + ' --norolestats', + help='File name of the get_maintainer.pl (or compatible) script.') + send.add_argument('-n', '--dry-run', action='store_true', dest='dry_run', + default=False, help="Do a dry run (create but don't email patches)") + send.add_argument('-r', '--in-reply-to', type=str, action='store', + help="Message ID that this series is in reply to") + send.add_argument('-t', '--ignore-bad-tags', action='store_true', + default=False, + help='Ignore bad tags / aliases (default=warn)') + send.add_argument('-T', '--thread', action='store_true', dest='thread', + default=False, help='Create patches as a single thread') + send.add_argument('--cc-cmd', dest='cc_cmd', type=str, action='store', + default=None, help='Output cc list for patch file (used by git)') + send.add_argument('--no-binary', action='store_true', dest='ignore_binary', + default=False, + help="Do not output contents of changes in binary files") + send.add_argument('--no-check', action='store_false', dest='check_patch', + default=True, + help="Don't check for patch compliance") + send.add_argument( + '--tree', dest='check_patch_use_tree', default=False, + action='store_true', + help=("Set `tree` to True. If `tree` is False then we'll pass " + "'--no-tree' to checkpatch (default: tree=%(default)s)")) + send.add_argument('--no-tree', dest='check_patch_use_tree', + action='store_false', help="Set `tree` to False") + send.add_argument( + '--no-tags', action='store_false', dest='process_tags', default=True, + help="Don't process subject tags as aliases") + send.add_argument('--no-signoff', action='store_false', dest='add_signoff', + default=True, help="Don't add Signed-off-by to patches") + send.add_argument('--smtp-server', type=str, + help="Specify the SMTP server to 'git send-email'") + send.add_argument('--keep-change-id', action='store_true', + help='Preserve Change-Id tags in patches to send.') + + send.add_argument('patchfiles', nargs='*') + + # Only add the 'test' action if the test data files are available. + if HAS_TESTS: + test_parser = subparsers.add_parser('test', help='Run tests') + test_parser.add_argument('testname', type=str, default=None, nargs='?', + help="Specify the test to run") + + status = subparsers.add_parser('status', + help='Check status of patches in patchwork') + status.add_argument('-C', '--show-comments', action='store_true', + help='Show comments from each patch') + status.add_argument( + '-d', '--dest-branch', type=str, + help='Name of branch to create with collected responses') + status.add_argument('-f', '--force', action='store_true', + help='Force overwriting an existing branch') + + # Parse options twice: first to get the project and second to handle + # defaults properly (which depends on project) + # Use parse_known_args() in case 'cmd' is omitted + argv = sys.argv[1:] + args, rest = parser.parse_known_args(argv) + if hasattr(args, 'project'): + settings.Setup(parser, args.project) + args, rest = parser.parse_known_args(argv) + + # If we have a command, it is safe to parse all arguments + if args.cmd: + args = parser.parse_args(argv) + else: + # No command, so insert it after the known arguments and before the ones + # that presumably relate to the 'send' subcommand + nargs = len(rest) + argv = argv[:-nargs] + ['send'] + rest + args = parser.parse_args(argv) + + return args |