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Diffstat (limited to 'macros/altreg.mac')
-rw-r--r-- | macros/altreg.mac | 107 |
1 files changed, 107 insertions, 0 deletions
diff --git a/macros/altreg.mac b/macros/altreg.mac new file mode 100644 index 0000000..16134cd --- /dev/null +++ b/macros/altreg.mac @@ -0,0 +1,107 @@ +;; -------------------------------------------------------------------------- +;; +;; Copyright 1996-2009 The NASM Authors - All Rights Reserved +;; See the file AUTHORS included with the NASM distribution for +;; the specific copyright holders. +;; +;; Redistribution and use in source and binary forms, with or without +;; modification, are permitted provided that the following +;; conditions are met: +;; +;; * Redistributions of source code must retain the above copyright +;; notice, this list of conditions and the following disclaimer. +;; * Redistributions in binary form must reproduce the above +;; copyright notice, this list of conditions and the following +;; disclaimer in the documentation and/or other materials provided +;; with the distribution. +;; +;; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND +;; CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, +;; INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF +;; MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +;; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR +;; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +;; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +;; NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +;; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +;; HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +;; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR +;; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, +;; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +;; +;; -------------------------------------------------------------------------- + +;; +;; altreg.mac +;; +;; Alternate register names for 64-bit mode +;; + +USE: altreg + +;; +;; Intel documents R8L-R15L instead of R8B-R15B +;; (Warning: this may confuse people with an AT&T-style assembly +;; background, where "r8l" means R8D, etc.) +;; +%idefine r8l r8b +%idefine r9l r9b +%idefine r10l r10b +%idefine r11l r11b +%idefine r12l r12b +%idefine r13l r13b +%idefine r14l r14b +%idefine r15l r15b + +;; +;; Numeric register names for the lower 8 registers +;; +%idefine r0 rax +%idefine r1 rcx +%idefine r2 rdx +%idefine r3 rbx +%idefine r4 rsp +%idefine r5 rbp +%idefine r6 rsi +%idefine r7 rdi + +%idefine r0d eax +%idefine r1d ecx +%idefine r2d edx +%idefine r3d ebx +%idefine r4d esp +%idefine r5d ebp +%idefine r6d esi +%idefine r7d edi + +%idefine r0w ax +%idefine r1w cx +%idefine r2w dx +%idefine r3w bx +%idefine r4w sp +%idefine r5w bp +%idefine r6w si +%idefine r7w di + +%idefine r0b al +%idefine r1b cl +%idefine r2b dl +%idefine r3b bl +%idefine r4b spl +%idefine r5b bpl +%idefine r6b sil +%idefine r7b dil + +%idefine r0l al +%idefine r1l cl +%idefine r2l dl +%idefine r3l bl +%idefine r4l spl +%idefine r5l bpl +%idefine r6l sil +%idefine r7l dil + +%idefine r0h ah +%idefine r1h ch +%idefine r2h dh +%idefine r3h bh |