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author | Anas Nashif <anas.nashif@intel.com> | 2012-05-15 22:27:48 +0100 |
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committer | Anas Nashif <anas.nashif@intel.com> | 2012-05-15 22:27:48 +0100 |
commit | b9fad1ab2ad3bd87bff05c4688c978d582ada438 (patch) | |
tree | 4a373f8dd867d20e67510de7cfe447a4b58c1a70 /test/avx.asm | |
parent | 65c26d26fb72cec0d43d199c72ed27513d17f4c9 (diff) | |
download | nasm-b9fad1ab2ad3bd87bff05c4688c978d582ada438.tar.gz nasm-b9fad1ab2ad3bd87bff05c4688c978d582ada438.tar.bz2 nasm-b9fad1ab2ad3bd87bff05c4688c978d582ada438.zip |
Upstream version 2.08rc7
Diffstat (limited to 'test/avx.asm')
-rw-r--r-- | test/avx.asm | 53 |
1 files changed, 53 insertions, 0 deletions
diff --git a/test/avx.asm b/test/avx.asm new file mode 100644 index 0000000..9e5e15b --- /dev/null +++ b/test/avx.asm @@ -0,0 +1,53 @@ +;Testname=unoptimized; Arguments=-O0 -fbin -oavx.bin; Files=stdout stderr avx.bin +;Testname=optimized; Arguments=-Ox -fbin -oavx.bin; Files=stdout stderr avx.bin + + bits 64 + blendvpd xmm2,xmm1,xmm0 + + vblendvpd xmm2,xmm1,xmm0,xmm0 + vblendvpd xmm2,xmm1,xmm0 + vblendvpd ymm2,ymm1,ymm0,ymm0 + vblendvpd ymm2,ymm1,ymm0 + + vcvtsi2sd xmm9,xmm10,ecx + vcvtsi2sd xmm9,xmm10,rcx + vcvtsi2sd xmm9,xmm10,dword [rdi] + vcvtsi2sd xmm9,xmm10,qword [rdi] + + vpermil2ps xmm0,xmm1,[rdi],xmm3,0 + vpermil2ps xmm0,xmm1,xmm2,[rdi],1 + vpermil2ps ymm0,ymm1,ymm2,ymm3,2 + vpermil2ps ymm0,ymm1,ymm2,[rdi],3 + vpermil2ps ymm0,ymm1,[rdi],ymm3,2 + vpermil2ps ymm0,ymm1,ymm2,[rdi],3 + + vpextrb [rax],xmm1,0x33 + vpextrw [rax],xmm1,0x33 + vpextrd [rax],xmm1,0x33 + vpextrq [rax],xmm1,0x33 + vpextrb rax,xmm1,0x33 + vpextrw rax,xmm1,0x33 + vpextrd rax,xmm1,0x33 + vpextrq rax,xmm1,0x33 + vpextrb eax,xmm1,0x33 + vpextrw eax,xmm1,0x33 + vpextrd eax,xmm1,0x33 +; vpextrq eax,xmm1,0x33 + + vcvtpd2ps xmm0,xmm1 + vcvtpd2ps xmm0,oword [rsi] + vcvtpd2ps xmm0,ymm1 + vcvtpd2ps xmm0,yword [rsi] +; vcvtpd2ps xmm0,[rsi] + + vcvtpd2dq xmm0,xmm1 + vcvtpd2dq xmm0,oword [rsi] + vcvtpd2dq xmm0,ymm1 + vcvtpd2dq xmm0,yword [rsi] +; vcvtpd2dq xmm0,[rsi] + + vcvttpd2dq xmm0,xmm1 + vcvttpd2dq xmm0,oword [rsi] + vcvttpd2dq xmm0,ymm1 + vcvttpd2dq xmm0,yword [rsi] +; vcvttpd2dq xmm0,[rsi] |