1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
|
#include "macros.inc"
.purgem test_init
.macro test_init
call0 cache_unlock_invalidate
.endm
test_suite cache
.macro pf_op op
\op a2, 0
\op a3, 0
\op a4, 0
.endm
test prefetch
movi a2, 0xd0000000 /* cacheable */
movi a3, 0xd8000000 /* non-cacheable */
movi a4, 0x00001235 /* unmapped */
pf_op dpfr
pf_op dpfro
pf_op dpfw
pf_op dpfwo
pf_op ipf
dpfl a2, 0
ipfl a2, 0
test_end
.macro cache_fault op, addr, exc_code
set_vector kernel, 2f
movi a4, \addr
1:
\op a4, 0
test_fail
2:
rsr a2, epc1
movi a3, 1b
assert eq, a2, a3
rsr a2, excvaddr
assert eq, a2, a4
rsr a2, exccause
movi a3, \exc_code
assert eq, a2, a3
.endm
test dpfl_tlb_miss
cache_fault dpfl, 0x00002345, 24
test_end
test dhwb_tlb_miss
cache_fault dhwb, 0x00002345, 24
test_end
test dhwbi_tlb_miss
cache_fault dhwbi, 0x00002345, 24
test_end
test dhi_tlb_miss
cache_fault dhi, 0x00002345, 24
test_end
test dhu_tlb_miss
cache_fault dhu, 0x00002345, 24
test_end
test ipfl_tlb_miss
cache_fault ipfl, 0x00002345, 16
test_end
test ihu_tlb_miss
cache_fault ihu, 0x00002345, 16
test_end
test ihi_tlb_miss
cache_fault ihi, 0x00002345, 16
test_end
test_suite_end
.macro cache_all op1, op2, size, linesize
movi a2, 0
movi a3, \size
1:
\op1 a2, 0
\op2 a2, 0
addi a2, a2, \linesize
bltu a2, a3, 1b
.endm
cache_unlock_invalidate:
cache_all diu, dii, XCHAL_DCACHE_SIZE, XCHAL_DCACHE_LINESIZE
cache_all iiu, iii, XCHAL_ICACHE_SIZE, XCHAL_ICACHE_LINESIZE
ret
|