Age | Commit message (Expand) | Author | Files | Lines |
2014-03-27 | tcg-arm: Avoid ldrd/strd for user-only emulation | Richard Henderson | 1 | -4/+17 |
2014-03-17 | tcg-sparc: Convert to new ldst opcodes | Richard Henderson | 2 | -100/+53 |
2014-03-17 | tcg-sparc: Convert to new ldst helpers | Richard Henderson | 1 | -59/+131 |
2014-03-17 | tcg-sparc: Tidy tcg_out_tlb_load interface | Richard Henderson | 1 | -40/+30 |
2014-03-17 | tcg-sparc: Use TCGMemOp within qemu_ldst routines | Richard Henderson | 1 | -51/+65 |
2014-03-17 | tcg-sparc: Improve tcg_out_movi | Richard Henderson | 1 | -21/+31 |
2014-03-17 | tcg-sparc: Dont handle constant arguments to ext32 ops | Richard Henderson | 1 | -12/+4 |
2014-03-17 | tcg-sparc: Don't handle remainder | Richard Henderson | 2 | -23/+2 |
2014-03-17 | tcg-sparc: Use intptr_t as appropriate | Richard Henderson | 1 | -11/+9 |
2014-03-17 | tcg-sparc: Tidy call+jump patterns | Richard Henderson | 1 | -19/+19 |
2014-03-17 | tcg-sparc: Fix tlb read | Richard Henderson | 1 | -21/+15 |
2014-03-17 | tcg-sparc: Fix ld64 for 32-bit mode | Richard Henderson | 1 | -0/+1 |
2014-03-14 | tcg-aarch64: Introduce tcg_out_insn_3405 | Richard Henderson | 1 | -21/+27 |
2014-03-14 | tcg-aarch64: Support div, rem | Richard Henderson | 2 | -13/+45 |
2014-03-14 | tcg-aarch64: Support muluh, mulsh | Richard Henderson | 2 | -2/+14 |
2014-03-14 | tcg-aarch64: Support add2, sub2 | Richard Henderson | 2 | -4/+80 |
2014-03-14 | tcg-aarch64: Support deposit | Richard Henderson | 2 | -21/+49 |
2014-03-14 | tcg-aarch64: Use tcg_out_insn for setcond | Richard Henderson | 1 | -9/+3 |
2014-03-14 | tcg-aarch64: Support movcond | Richard Henderson | 2 | -2/+36 |
2014-03-14 | tcg-aarch64: Support andc, orc, eqv, not, neg | Richard Henderson | 2 | -10/+67 |
2014-03-14 | tcg-aarch64: Handle constant operands to and, or, xor | Richard Henderson | 1 | -49/+107 |
2014-03-14 | tcg-aarch64: Handle constant operands to add, sub, and compare | Richard Henderson | 1 | -22/+78 |
2014-03-14 | tcg-aarch64: Implement mov with tcg_out_insn | Richard Henderson | 1 | -15/+9 |
2014-03-14 | tcg-aarch64: Introduce tcg_out_insn_3401 | Richard Henderson | 1 | -46/+26 |
2014-03-14 | tcg-aarch64: Convert shift insns to tcg_out_insn | Richard Henderson | 1 | -31/+21 |
2014-03-14 | tcg-aarch64: Introduce tcg_out_insn | Richard Henderson | 1 | -36/+58 |
2014-03-08 | tcg-aarch64: Remove nop from qemu_st slow path | Richard Henderson | 1 | -7/+0 |
2014-03-08 | tcg-aarch64: Simplify tcg_out_ldst_9 encoding | Richard Henderson | 1 | -12/+2 |
2014-03-08 | tcg-aarch64: Use intptr_t apropriately | Richard Henderson | 1 | -28/+21 |
2014-03-08 | tcg-aarch64: Remove the shift_imm parameter from tcg_out_cmp | Richard Henderson | 1 | -6/+5 |
2014-03-08 | tcg-aarch64: Hoist common argument loads in tcg_out_op | Richard Henderson | 1 | -45/+50 |
2014-03-08 | tcg-aarch64: Don't handle mov/movi in tcg_out_op | Richard Henderson | 1 | -13/+7 |
2014-03-08 | tcg-aarch64: Set ext based on TCG_OPF_64BIT | Richard Henderson | 1 | -21/+7 |
2014-03-08 | tcg-aarch64: Change all ext variables to TCGType | Richard Henderson | 1 | -27/+37 |
2014-03-08 | tcg-aarch64: Remove redundant CPU_TLB_ENTRY_BITS check | Richard Henderson | 1 | -6/+0 |
2014-03-02 | tcg: Fix typo in comment (dependancies -> dependencies) | Stefan Weil | 1 | -1/+1 |
2014-02-21 | tcg/i386: Fix build for systems without working cpuid.h (MacOSX, Win32) | Peter Maydell | 1 | -1/+3 |
2014-02-17 | tcg/i386: Use SHLX/SHRX/SARX instructions | Richard Henderson | 1 | -11/+50 |
2014-02-17 | tcg/i386: Use ANDN instruction | Richard Henderson | 2 | -13/+45 |
2014-02-17 | tcg/i386: Add tcg_out_vex_modrm | Richard Henderson | 1 | -3/+38 |
2014-02-17 | tcg/i386: Move TCG_CT_CONST_* to tcg-target.c | Richard Henderson | 2 | -3/+4 |
2014-02-17 | tcg/optimize: Add more identity simplifications | Richard Henderson | 1 | -15/+24 |
2014-02-17 | tcg/optimize: Optmize ANDC X,Y,Y to MOV X,0 | Richard Henderson | 1 | -0/+1 |
2014-02-17 | tcg/optimize: Simply some logical ops to NOT | Richard Henderson | 1 | -0/+57 |
2014-02-17 | tcg/optimize: Handle known-zeros masks for ANDC | Richard Henderson | 1 | -0/+11 |
2014-02-17 | tcg/optimize: add known-zero bits compute for load ops | Aurelien Jarno | 1 | -1/+25 |
2014-02-17 | tcg/optimize: improve known-zero bits for 32-bit ops | Aurelien Jarno | 1 | -0/+6 |
2014-02-17 | tcg/optimize: fix known-zero bits optimization | Aurelien Jarno | 1 | -1/+7 |
2014-02-17 | tcg/optimize: fix known-zero bits for right shift ops | Aurelien Jarno | 1 | -5/+14 |
2014-02-17 | tcg-arm: The shift count of op_rotl_i32 is in args[2] not args[1]. | Huw Davies | 1 | -1/+1 |