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AgeCommit message (Expand)AuthorFilesLines
2015-03-13tcg: Change generator-side labels to a pointerRichard Henderson1-7/+6
2014-06-04tcg: Remove TCG_TARGET_HAS_new_ldstRichard Henderson1-2/+0
2014-06-04tci: Convert to new ldst opcodesRichard Henderson2-47/+31
2014-05-22tci: Fix tcg_out_callRichard Henderson1-0/+3
2014-05-12tcg: Remove unreachable code in tcg_out_op and op_defsRichard Henderson1-21/+5
2014-05-12tci: Create tcg_out_callRichard Henderson1-0/+5
2014-05-12tci: Define TCG_TARGET_INSN_UNIT_SIZERichard Henderson2-6/+14
2014-04-28tcg: Add INDEX_op_trunc_shr_i32Richard Henderson1-0/+1
2014-04-18tcg: Use HOST_WORDS_BIGENDIANRichard Henderson1-6/+0
2014-04-18tcg: Relax requirement for mulu2_i32 on 32-bit hostsRichard Henderson1-0/+2
2014-04-18tcg: Add TCGType parameter to tcg_target_const_matchRichard Henderson1-1/+1
2013-10-10tcg: Add qemu_ld_st_i32/64Richard Henderson1-0/+2
2013-10-10tcg: Add tcg-be-null.hRichard Henderson1-0/+2
2013-09-25tci: Add implementation of rotl_i64, rotr_i64Stefan Weil1-1/+0
2013-09-03Merge remote-tracking branch 'mjt/trivial-patches' into stagingAnthony Liguori1-7/+0
2013-09-02tcg: Change tcg_out_ld/st offset to intptr_tRichard Henderson1-2/+2
2013-09-02tcg: Change relocation offsets to intptr_tRichard Henderson1-1/+1
2013-09-02tcg: Allow TCG_TARGET_REG_BITS to be specified independantlyRichard Henderson1-0/+8
2013-09-02tcg: Change tcg_qemu_tb_exec return to uintptr_tRichard Henderson1-1/+1
2013-09-02tcg: Change flush_icache_range arguments to uintptr_tRichard Henderson1-2/+1
2013-09-02tcg: Add muluh and mulsh opcodesRichard Henderson1-1/+4
2013-09-01tci: Remove function tcg_out64 (fix broken build)Stefan Weil1-7/+0
2013-07-30tci: Fix broken build (compiler warning caused by redefined macro BIT)Stefan Weil1-3/+0
2013-07-09tcg: Split rem requirement from div requirementRichard Henderson1-4/+2
2013-04-11tci: Make tcg temporaries local to tcg_qemu_tb_execRichard Henderson2-7/+13
2013-04-11tci: Delete unused tb_ret_addrRichard Henderson1-5/+1
2013-04-11tci: Use 32-bit signed offsets to loads/storesRichard Henderson1-2/+2
2013-02-26qemu-log: default to stderr for logging outputPeter Maydell1-1/+1
2013-02-23tcg: Add signed multiword multiplication operationsRichard Henderson1-0/+2
2013-02-23tcg: Add 64-bit multiword arithmetic operationsRichard Henderson1-0/+3
2013-02-23tcg: Make 32-bit multiword operations optional for 64-bit hostsRichard Henderson1-0/+4
2013-02-16qemu-log: Rename the public-facing cpu_set_log function to qemu_set_logPeter Maydell1-1/+1
2012-11-18tci: Support deposit operationsStefan Weil2-2/+26
2012-10-12tcg: Remove TCG_TARGET_HAS_GUEST_BASE definePeter Maydell1-3/+0
2012-10-06tcg: remove obsolete jmp opAurelien Jarno1-4/+0
2012-09-27tci: Fix for AREG0 free modeStefan Weil1-5/+5
2012-09-22tcg: Remove tcg_target_get_call_iarg_regs_countStefan Weil1-6/+0
2012-09-21tcg: Introduce movcondRichard Henderson1-0/+2
2012-09-15Remove unused CONFIG_TCG_PASS_AREG0 and dead codeBlue Swirl1-4/+0
2012-06-24tci: don't write zero for reloc in tci_out_labelScott Wood1-1/+1
2012-06-21qemu-log: cleanupBlue Swirl1-1/+1
2012-03-18softmmu templates: optionally pass CPUState to memory access functionsBlue Swirl1-0/+6
2012-03-17w64: Fix data type of next_tb and tcg_qemu_tb_execStefan Weil1-1/+1
2012-03-14Rename CPUState -> CPUArchStateAndreas Färber2-2/+2
2012-03-03w64: Fix data type of parameters for flush_icache_rangeStefan Weil1-1/+2
2011-11-28tci: Make flush_icache_range() inlineStefan Weil2-4/+4
2011-11-14tcg: Use TCGReg for standard tcg-target entry points.Richard Henderson1-4/+4
2011-11-14tcg: Standardize on TCGReg as the enum for hard registersRichard Henderson1-1/+1
2011-10-31tcg: Add bytecode generator for tcg interpreterStefan Weil3-0/+1196
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