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2016-01-29tcg: Clean up includesPeter Maydell1-0/+1
2015-08-24linux-user: remove useless macros GUEST_BASE and RESERVED_VALaurent Vivier1-4/+4
2015-06-09tcg: Mask TCGMemOp appropriately for indexingRichard Henderson1-3/+3
2015-06-03tcg: add TCG_TARGET_TLB_DISPLACEMENT_BITSPaolo Bonzini1-0/+1
2015-05-14tcg: Push merged memop+mmu_idx parameter to softmmu routinesRichard Henderson1-13/+14
2015-05-14tcg: Merge memop and mmu_idx parameters to qemu_ld/stRichard Henderson1-4/+8
2015-03-13tcg: Change generator-side labels to a pointerRichard Henderson1-7/+7
2014-06-04tcg: Remove TCG_TARGET_HAS_new_ldstRichard Henderson1-2/+0
2014-05-28tcg-arm: Make debug_frame constRichard Henderson1-13/+9
2014-05-12tcg: Remove unreachable code in tcg_out_op and op_defsRichard Henderson1-29/+3
2014-05-12tcg-arm: Define TCG_TARGET_INSN_UNIT_SIZERichard Henderson2-96/+55
2014-04-18tcg: Use HOST_WORDS_BIGENDIANRichard Henderson1-1/+0
2014-04-18tcg: Relax requirement for mulu2_i32 on 32-bit hostsRichard Henderson1-0/+1
2014-04-18tcg: Add TCGType parameter to tcg_target_const_matchRichard Henderson1-1/+1
2014-04-18tcg: Fix warning (1 bit signed bitfield entry) and replace int by boolStefan Weil1-3/+3
2014-03-27tcg-arm: Avoid ldrd/strd for user-only emulationRichard Henderson1-4/+17
2014-02-17tcg-arm: The shift count of op_rotl_i32 is in args[2] not args[1].Huw Davies1-1/+1
2013-11-30tcg-arm: Use qemu_getauxvalRichard Henderson1-9/+5
2013-10-12tcg-arm: Improve GUEST_BASE qemu_ld/stRichard Henderson1-104/+116
2013-10-12tcg-arm: Convert to new ldst opcodesRichard Henderson2-71/+38
2013-10-12tcg-arm: Tidy variable naming convention in qemu_ld/stRichard Henderson1-115/+115
2013-10-12tcg-arm: Convert to le/be ldst helpersRichard Henderson1-21/+29
2013-10-12tcg-arm: Use TCGMemOp within qemu_ldst routinesRichard Henderson1-64/+61
2013-10-10tcg: Add qemu_ld_st_i32/64Richard Henderson1-0/+2
2013-10-10tcg: Add tcg-be-ldst.hRichard Henderson1-24/+3
2013-10-01tcg-arm: Move the tlb addend load earlierRichard Henderson1-5/+6
2013-10-01tcg-arm: Remove restriction on qemu_ld output registerRichard Henderson1-24/+34
2013-10-01tcg-arm: Return register containing tlb addendRichard Henderson1-29/+30
2013-10-01tcg-arm: Move load of tlb addend into tcg_out_tlb_readRichard Henderson1-37/+23
2013-10-01tcg-arm: Use QEMU_BUILD_BUG_ON to verify constraints on tlbRichard Henderson1-5/+10
2013-10-01tcg-arm: Use strd for tcg_out_arg_reg64Richard Henderson1-3/+10
2013-10-01tcg-arm: Rearrange slow-path qemu_ld/stRichard Henderson1-90/+87
2013-10-01tcg-arm: Use ldrd/strd for appropriate qemu_ld/st64Richard Henderson1-5/+43
2013-09-02exec: Split softmmu_defs.hRichard Henderson1-2/+0
2013-09-02tcg: Change tcg_out_ld/st offset to intptr_tRichard Henderson1-2/+2
2013-09-02tcg: Change relocation offsets to intptr_tRichard Henderson1-4/+4
2013-09-02tcg: Change flush_icache_range arguments to uintptr_tRichard Henderson1-5/+4
2013-09-02tcg: Add muluh and mulsh opcodesRichard Henderson1-0/+2
2013-07-09tcg-arm: Implement tcg_register_jitRichard Henderson1-9/+67
2013-07-09tcg-arm: Use AT_PLATFORM to detect the host ISARichard Henderson1-4/+16
2013-07-09tcg-arm: Simplify logic in detecting the ARM ISA in useRichard Henderson1-39/+23
2013-07-09tcg-arm: Rename use_armv5_instructions to use_armvt5_instructionsRichard Henderson1-6/+6
2013-07-09tcg-arm: Make use of conditional availability of opcodes for divideRichard Henderson2-8/+22
2013-07-09tcg-arm: Don't implement remRichard Henderson2-16/+1
2013-07-09tcg: Split rem requirement from div requirementRichard Henderson1-0/+2
2013-06-05tcg: Remove redundant tcg_target_init checksRichard Henderson1-6/+0
2013-05-03tcg-arm: Use movi32 in exit_tbRichard Henderson1-9/+7
2013-05-03tcg-arm: Fix 64-bit tlb load for pre-v6Richard Henderson1-1/+1
2013-04-27tcg-arm: Remove long jump from tcg_out_goto_labelRichard Henderson1-6/+1
2013-04-27tcg-arm: Convert to CONFIG_QEMU_LDST_OPTIMIZATIONRichard Henderson1-107/+202
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