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path: root/target-sparc/helper.h
AgeCommit message (Expand)AuthorFilesLines
2016-07-12target-sparc: Use explicit writes to cpu_fsrRichard Henderson1-55/+57
2016-07-12target-sparc: Remove helper_ldf_asi, helper_stf_asiRichard Henderson1-2/+0
2016-07-12target-sparc: Pass TCGMemOp constants to helper_ld/st_asiRichard Henderson1-2/+2
2016-07-12target-sparc: Use QT0 to return results from lddaRichard Henderson1-1/+1
2016-07-12target-sparc: Remove softint as a TCG globalRichard Henderson1-3/+3
2016-07-12target-sparc: Mark more flags for helpersRichard Henderson1-24/+24
2016-01-07target-sparc: implement NPT timer bitMark Cave-Ayland1-1/+1
2014-05-28tcg: Invert the inclusion of helper.hRichard Henderson1-4/+0
2014-03-12target-sparc: Add and use CPU_FEATURE_CASASebastian Huber1-1/+3
2013-10-10tcg: Remove stray semi-colons from target-*/helper.hRichard Henderson1-9/+9
2013-02-23SPARC LEON power-down support addedRonald Hecht1-0/+1
2012-12-19exec: move include files to include/exec/Paolo Bonzini1-2/+2
2012-10-28target-sparc: rename helper flagsAurelien Jarno1-25/+25
2012-10-07target-sparc: Move taddcctv and tsubcctv out of lineRichard Henderson1-0/+2
2012-10-07target-sparc: Move sdivx and udivx out of lineRichard Henderson1-0/+4
2012-03-24target-sparc: Add compiler attribute to some functions which don't returnStefan Weil1-1/+1
2012-03-18Sparc: avoid AREG0 for memory access helpersBlue Swirl1-10/+10
2011-11-19Improve "ta 0" shutdownFabien Chouteau1-1/+0
2011-10-26target-sparc: Implement FALIGNDATA inline.Richard Henderson1-1/+0
2011-10-26target-sparc: Implement BMASK/BSHUFFLE.Richard Henderson1-0/+1
2011-10-26target-sparc: Implement ALIGNADDR* inline.Richard Henderson1-1/+0
2011-10-26target-sparc: Implement fpack{16,32,fix}.Richard Henderson1-0/+3
2011-10-26target-sparc: Implement PDIST.Richard Henderson1-0/+1
2011-10-26target-sparc: Do exceptions management fully inside the helpers.Richard Henderson1-2/+0
2011-10-26target-sparc: Make FPU/VIS helpers const when possible.Richard Henderson1-22/+28
2011-10-26target-sparc: Pass float64 parameters instead of dt0/1 temporaries.Richard Henderson1-48/+47
2011-10-26Sparc: avoid AREG0 for division op helpersBlue Swirl1-4/+4
2011-10-26Sparc: avoid AREG0 for softint op helpers and Leon cache controlBlue Swirl1-3/+3
2011-10-26Sparc: avoid AREG0 for CWP and PSTATE helpersBlue Swirl1-16/+16
2011-10-23Sparc: avoid AREG0 for lazy condition code helpersBlue Swirl1-2/+2
2011-10-23Sparc: avoid AREG0 for float and VIS opsBlue Swirl1-86/+86
2011-10-23Sparc: avoid AREG0 for raise_exception and helper_debugBlue Swirl1-2/+2
2011-07-20SPARC64: fix VIS1 SIMD signed compare instructionsTsuneo Saito1-2/+2
2011-05-22Delete unused tb_invalidate_page_rangeBlue Swirl1-1/+0
2011-01-24SPARC: Emulation of Leon3Fabien Chouteau1-0/+1
2010-12-28target-sparc: fix udiv(cc) and sdiv(cc)Aurelien Jarno1-0/+2
2010-05-20target-sparc: Inline some generation of carry for ADDX/SUBX.Richard Henderson1-1/+1
2010-05-19target-sparc: Fix compilation with --enable-debug.Richard Henderson1-1/+1
2010-01-08sparc64: use helper_wrpil to check pending irq on writeIgor V. Kovalenko1-0/+1
2009-05-10Use dynamical computation for condition codesBlue Swirl1-0/+2
2008-11-17TCG variable type checking.pbrook1-109/+101
2008-09-26Implement UA2005 hypervisor trapsblueswir11-2/+0
2008-09-22Add software and timer interrupt supportblueswir11-0/+3
2008-09-21Use the new concat_i32_i64 op for std and stdablueswir11-1/+0
2008-09-10Convert rest of ops using float32 to TCG, remove FT0 and FT1blueswir11-11/+8
2008-09-10Partially convert float128 conversion ops to TCGblueswir11-4/+5
2008-09-10Convert basic 64 bit VIS ops to TCGblueswir11-9/+0
2008-09-10Convert basic 32 bit VIS ops to TCGblueswir11-15/+2
2008-09-10Convert basic float32 ops to TCGblueswir11-18/+29
2008-09-09Implement ldxfsr/stxfsr, fix ld(x)fsr masks, convert to TCGblueswir11-2/+2
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