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AgeCommit message (Expand)AuthorFilesLines
2012-04-30target-sh4: Start QOM'ifying CPU initAndreas Färber2-2/+11
2012-04-30target-sh4: QOM'ify CPU resetAndreas Färber2-21/+22
2012-04-30target-sh4: QOM'ify CPUAndreas Färber4-1/+135
2012-04-14Use uintptr_t for various op related functionsBlue Swirl1-8/+6
2012-03-14Rename CPUState -> CPUArchStateAndreas Färber1-1/+1
2012-03-14target-sh4: Don't overuse CPUStateAndreas Färber4-44/+44
2012-03-14Rename cpu_reset() to cpu_state_reset()Andreas Färber1-2/+2
2012-02-28target-sh4: Clean includesStefan Weil1-6/+0
2012-01-10target-sh4: ignore ocbp and ocbwb instructionsAurelien Jarno1-11/+3
2012-01-07target-sh4: Fix operands for fipr, ftrv instructionsStefan Weil1-3/+3
2011-12-05Merge remote-tracking branch 'stefanha/trivial-patches' into stagingAnthony Liguori1-1/+1
2011-12-02fix spelling in target sub directoryDong Xu Wang1-1/+1
2011-11-24sh_intc: convert interrupt controller to memory APIBenoît Canet1-0/+3
2011-10-01softmmu_header: pass CPUState to tlb_fillBlue Swirl1-4/+3
2011-08-20Use glib memory allocation and free functionsAnthony Liguori1-1/+1
2011-08-07Remove unused is_softmmu parameter from cpu_handle_mmu_faultBlue Swirl3-4/+4
2011-07-30exec.h cleanupBlue Swirl2-34/+3
2011-06-26Remove exec-all.h include directivesBlue Swirl3-3/+0
2011-06-26Move cpu_has_work and cpu_pc_from_tb to cpu.hBlue Swirl2-11/+13
2011-06-26exec.h: fix coding style and change cpu_has_work to return boolBlue Swirl1-2/+2
2011-06-26cpu_loop_exit: avoid using AREG0Blue Swirl1-5/+5
2011-04-20Remove unused function parameter from cpu_restore_stateStefan Weil1-1/+1
2011-04-20Remove unused function parameters from gen_pc_load and rename the functionStefan Weil1-2/+1
2011-04-12target-sh4: get rid of CPU_{Float,Double}UAurelien Jarno2-158/+92
2011-04-10Fix conversions from pointer to tcg_target_longStefan Weil1-1/+1
2011-03-13inline cpu_halted into sole callerPaolo Bonzini1-10/+0
2011-03-03target-sh4: move intr_at_halt out of cpu_halted()Aurelien Jarno4-4/+4
2011-02-04target-sh4: fix negcAurelien Jarno1-2/+2
2011-01-26target-sh4: update PTEH upon MMU exceptionAlexandre Courbot1-0/+4
2011-01-26sh4: implement missing mmaped TLB read functionsAurelien Jarno2-0/+82
2011-01-26sh4: implement missing mmaped TLB write functionsAurelien Jarno2-3/+67
2011-01-25target-sh4: fix index of address read error exceptionAlexandre Courbot1-1/+1
2011-01-25target-sh4: fix TLB invalidation codeAlexandre Courbot1-2/+2
2011-01-16target-sh4: implement negc using TCGAurelien Jarno3-17/+15
2011-01-16target-sh4: use rotl/rotr when possibleAurelien Jarno1-5/+3
2011-01-15target-sh4: correct use of ! and &Aurelien Jarno1-2/+2
2011-01-14target-sh4: use setcond when possibleAurelien Jarno1-29/+27
2011-01-14target-sh4: log instructions start in TCG codeAurelien Jarno1-0/+4
2011-01-14target-sh4: simplify comparisons after a 'and' opAurelien Jarno1-3/+3
2011-01-14target-sh4: fix reset on r2dAurelien Jarno2-18/+16
2011-01-14target-sh4: optimize exceptionsAurelien Jarno2-15/+12
2011-01-14target-sh4: add ftrv instructionAurelien Jarno3-0/+38
2011-01-14target-sh4: add fipr instructionAurelien Jarno3-0/+33
2011-01-14target-sh4: implement FPU exceptionsAurelien Jarno1-22/+136
2011-01-14target-sh4: implement flush-to-zeroAurelien Jarno2-0/+2
2011-01-14target-sh4: define FPSCR constantsAurelien Jarno3-9/+37
2011-01-14target-sh4: use default-NaN modeAurelien Jarno1-0/+1
2011-01-11target-sh4: fix fpu disabled/illegal exceptionAurelien Jarno1-10/+18
2011-01-10target-sh4: improve TLBAurelien Jarno1-21/+44
2011-01-09target-sh4: implement writes to mmaped ITLBAurelien Jarno2-0/+21
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