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path: root/target-sh4/translate.c
AgeCommit message (Expand)AuthorFilesLines
2009-07-16Update to a hopefully more future proof FSF addressBlue Swirl1-2/+1
2009-05-13Include assert.h from qemu-common.hPaul Brook1-1/+0
2009-04-24qemu: introduce qemu_init_vcpu (Marcelo Tosatti)aliguori1-0/+1
2009-04-05Add new command line option -singlestep for tcg single stepping.aurel321-3/+2
2009-04-01SH: Improve movca.l/ocbi emulation.edgar_igl1-4/+42
2009-03-02SH: Implement MOVCO.L and MOVLI.Laurel321-1/+34
2009-02-07SH7750/51: add register BCR3, BCR4, PCR, RTCOR, RTCNT, RTCSR, SDMR2, SDMR3 an...aurel321-0/+2
2009-02-05targets: remove error handling from qemu_malloc() callers (Avi Kivity)aliguori1-2/+0
2009-01-26Log reset events (Jan Kiszka)aliguori1-0/+5
2009-01-15global s/loglevel & X/qemu_loglevel_mask(X)/ (Eduardo Habkost)aliguori1-1/+1
2009-01-15Convert references to logfile/loglevel to use qemu_log*() macrosaliguori1-10/+7
2009-01-14sh4: Add FMAC instruction supportaurel321-0/+11
2009-01-04Update FSF address in GPL/LGPL boilerplateaurel321-1/+1
2009-01-01tcg_temp_local_new should take no parameteraurel321-6/+6
2008-12-22Use the ARRAY_SIZE() macro where appropriate.malc1-2/+2
2008-12-13target-sh4: make the initial value of SR easier to readaurel321-1/+1
2008-12-13target-sh4: don't disable FPU instructions in user modeaurel321-1/+1
2008-12-13target-sh4: disable debug codeaurel321-1/+3
2008-12-13target-sh4: add prefi, icbi, syncoaurel321-0/+20
2008-12-13target-sh4: add SH7785 as CPU optionaurel321-1/+7
2008-12-10target-sh4: check FD bit for FP instructionsaurel321-6/+23
2008-12-07SH4: kill a few warningsaurel321-2/+2
2008-12-07SH4: Implement FD bitaurel321-4/+26
2008-11-25Use sys-queue.h for break/watchpoint managment (Jan Kiszka)aliguori1-2/+2
2008-11-22target-sh4: fix 64-bit fmov to/from memoryaurel321-29/+33
2008-11-20target-sh4: fix fldi0/fldi1aurel321-4/+2
2008-11-19target-sh4: map FP registers as TCG variablesaurel321-106/+43
2008-11-18Refactor and enhance break/watchpoint API (Jan Kiszka)aliguori1-3/+4
2008-11-17TCG variable type checking.pbrook1-267/+271
2008-10-26Fix undeclared symbol warnings from sparseblueswir11-2/+2
2008-10-12SH4: Implement MOVUA.Laurel321-0/+11
2008-10-12SH4: fix single-steppingaurel321-0/+1
2008-10-12SH4: Fix swap.baurel321-1/+4
2008-10-05Silence some warnings about no value returned from non-void functionblueswir11-1/+1
2008-09-21Add concat_i32_i64 op.pbrook1-6/+3
2008-09-20Suppress gcc 4.x -Wpointer-sign (included in -Wall) warningsblueswir11-2/+2
2008-09-15SH4: Privilege check for instructionsaurel321-24/+43
2008-09-15sh4: doesn't set the cpu_model_straurel321-0/+1
2008-09-15SH4: sleep instruction bug fixaurel321-1/+1
2008-09-02sh4: CPU versioning.aurel321-0/+59
2008-09-02SH4: fix a regression introduced in r5122aurel321-1/+1
2008-09-01SH4: Remove dyngen leftoversaurel321-5/+0
2008-09-01SH4: final conversion to TCGaurel321-1/+7
2008-09-01SH4: convert floating-point ops to TCGaurel321-153/+249
2008-09-01SH4: Remove most uses of cpu_T[0] and cpu_T[1]aurel321-181/+427
2008-09-01SH4: TCG optimisationsaurel321-349/+236
2008-09-01SH4: Convert remaining non-fp ops to TCGaurel321-28/+109
2008-08-30SH4: Convert shift functions to TCGaurel321-3/+9
2008-08-30SH4: convert control/status register load/store to TCGaurel321-36/+58
2008-08-30SH4: Convert memory loads/stores to TCGaurel321-86/+58
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