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AgeCommit message (Expand)AuthorFilesLines
2015-06-12migration: Use normal VMStateDescriptions for SubsectionsJuan Quintela1-38/+24
2015-06-04Merge remote-tracking branch 'remotes/agraf/tags/signed-ppc-for-upstream' int...Peter Maydell2-0/+22
2015-06-03pseries: Enable in-kernel H_LOGICAL_CI_{LOAD, STORE} implementationsDavid Gibson2-0/+22
2015-06-02kvm: introduce kvm_arch_msi_data_to_gsiEric Auger1-0/+5
2015-04-30kvm: add support for memory transaction attributesPaolo Bonzini1-1/+3
2015-04-28Convert (ffs(val) - 1) to ctz32(val)Stefan Hajnoczi1-2/+2
2015-04-17target-ppc: don't invalidate msr MSR_HVB bit in cpu_post_loadMark Cave-Ayland1-2/+2
2015-03-25target-ppc: Remove POWER5+ v0.0 that never existedAlexey Kardashevskiy2-5/+2
2015-03-13tcg: Change translator-side labels to a pointerRichard Henderson1-64/+59
2015-03-12Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell1-1/+1
2015-03-11kvm: add machine state to kvm_arch_initMarcel Apfelbaum1-1/+1
2015-03-10cpu: Make cpu_init() return QOM CPUState objectEduardo Habkost1-8/+1
2015-03-09target-ppc: Fix warnings from SparseStefan Weil1-2/+3
2015-03-09target-ppc: Add versions to server CPU descriptionsAlexey Kardashevskiy2-7/+9
2015-03-09PPC: Introduce the Virtual Time Base (VTB) SPR registerCyril Bur2-0/+11
2015-03-09target-ppc: force update of msr bits in cpu_post_loadMark Cave-Ayland1-1/+7
2015-03-09target-ppc: move sdr1 value change detection logic to helper_store_sdr1()Mark Cave-Ayland2-21/+21
2015-03-09display cpu id dump stateTristan Gingold1-2/+3
2015-03-09target-ppc: Use right page size with hash table lookupAneesh Kumar K.V3-11/+30
2015-02-12tcg: Introduce tcg_op_buf_count and tcg_op_buf_fullRichard Henderson1-6/+3
2015-02-12tcg: Move emit of INDEX_op_end into gen_tb_endRichard Henderson1-1/+1
2015-01-20exec.c: Drop TARGET_HAS_ICE define and checksPeter Maydell1-2/+0
2015-01-12kvm: extend kvm_irqchip_add_msi_route to work on s390Frank Blaschka1-0/+6
2015-01-10Merge remote-tracking branch 'remotes/agraf/tags/signed-ppc-for-upstream' int...Peter Maydell7-110/+323
2015-01-07target-ppc: Mark SR() and gen_sync_exception() as !CONFIG_USER_ONLYPeter Maydell1-0/+5
2015-01-07target-ppc: Introduce Privileged TM NoopsTom Musta1-0/+38
2015-01-07target-ppc: Introduce tcheckTom Musta1-0/+17
2015-01-07target-ppc: Introduce TM NoopsTom Musta1-0/+38
2015-01-07target-ppc: Introduce tbeginTom Musta3-0/+36
2015-01-07target-ppc: Introduce TEXASRU Bit FieldsTom Musta1-0/+20
2015-01-07target-ppc: Power8 Supports Transactional MemoryTom Musta1-2/+3
2015-01-07target-ppc: Introduce tm_enabled Bit to CPU StateTom Musta1-0/+8
2015-01-07target-ppc: Introduce Feature Flag for Transactional MemoryTom Musta1-0/+2
2015-01-07target-ppc: Introduce Instruction Type for Transactional MemoryTom Musta1-1/+3
2015-01-07target-ppc: explicitly save page table headers in big endianCédric Le Goater1-3/+17
2015-01-07target-ppc: Eliminate set_fprf Argument From helper_compute_fprfTom Musta3-38/+28
2015-01-07target-ppc: Eliminate set_fprf Argument From gen_compute_fprfTom Musta1-15/+23
2015-01-07target-ppc: Fully Migrate to gen_set_cr1_from_fpscrTom Musta1-22/+33
2015-01-07target-ppc: mffs. Should Set CR1 from FPSCR BitsTom Musta1-1/+3
2015-01-07target-ppc: Fix Floating Point Move Instructions That Set CR1Tom Musta1-20/+30
2015-01-07target-ppc: VXSQRT Should Not Be Set for NaNsTom Musta1-12/+17
2015-01-07target-ppc: Load/Store Vector Element Storage AlignmentTom Musta1-8/+14
2015-01-03gen-icount: check cflags instead of use_icount globalPaolo Bonzini1-1/+1
2015-01-03translate: check cflags instead of use_icount globalPaolo Bonzini1-12/+12
2014-12-23target-ppc: pass DisasContext to SPR generator functionsPaolo Bonzini3-137/+133
2014-12-16qemu-log: add log category for MMU infoAntony Pavlov3-29/+33
2014-11-20target-ppc: Altivec's mtvscr Decodes Wrong RegisterTom Musta1-1/+1
2014-11-20target-ppc: Fix breakpoint registers for e300Fabien Chouteau1-26/+26
2014-11-04target-ppc: Fix Altivec Round OpcodesTom Musta1-6/+6
2014-11-04target-ppc: Fix vcmpbfp. Unordered CaseTom Musta1-1/+1
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