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path: root/target-ppc/int_helper.c
AgeCommit message (Expand)AuthorFilesLines
2014-06-16target-ppc: Refactor AES InstructionsTom Musta1-254/+38
2014-05-28tcg: Invert the inclusion of helper.hRichard Henderson1-1/+1
2014-03-19target-ppc: Add missing 'static' and 'const' attributesStefan Weil1-1/+1
2014-03-15misc: Fix typos in commentsStefan Weil1-1/+1
2014-03-05target-ppc: Altivec 2.07: Vector Permute and Exclusive ORTom Musta1-0/+14
2014-03-05target-ppc: Altivec 2.07: Vector SHA Sigma InstructionsTom Musta1-0/+82
2014-03-05target-ppc: Altivec 2.07: AES InstructionsTom Musta1-0/+280
2014-03-05target-ppc: Altivec 2.07: Binary Coded Decimal InstructionsTom Musta1-0/+201
2014-03-05target-ppc: Altivec 2.07: Vector Polynomial Multiply SumTom Musta1-0/+70
2014-03-05target-ppc: Altivec 2.07: Vector Gather Bits by BytesTom Musta1-0/+276
2014-03-05target-ppc: Altivec 2.07: Doubleword ComparesTom Musta1-4/+10
2014-03-05target-ppc: Altivec 2.07: vbpermq InstructionTom Musta1-0/+31
2014-03-05target-ppc: Altivec 2.07: Quadword Addition and SubtracationTom Musta1-0/+185
2014-03-05target-ppc: Altivec 2.07: Vector Doubleword Rotate and Shift InstructionsTom Musta1-0/+4
2014-03-05target-ppc: Altivec 2.07: Change Bit Masks to Support 64-bit Rotates and ShiftsTom Musta1-25/+15
2014-03-05target-ppc: Altivec 2.07: Unpack Signed Word InstructionsTom Musta1-0/+2
2014-03-05target-ppc: Altivec 2.07: Pack Doubleword InstructionsTom Musta1-0/+4
2014-03-05target-ppc: Altivec 2.07: Vector Min/Max Doubleword InstructionsTom Musta1-0/+2
2014-03-05target-ppc: Altivec 2.07: Vector Population Count InstructionsTom Musta1-0/+14
2014-03-05target-ppc: Altivec 2.07: Add Vector Count Leading ZeroesTom Musta1-0/+29
2014-03-05target-ppc: Altivec 2.07: vmuluw InstructionTom Musta1-0/+1
2014-03-05target-ppc: Altivec 2.07: Multiply Even/Odd Word InstructionsTom Musta1-0/+2
2014-03-05target-ppc: Altivec 2.07: Change VMUL_DO to Support 64-bit IntegersTom Musta1-12/+14
2014-03-05target-ppc: Altivec 2.07: Add/Subtract Unsigned Doubleword ModuloTom Musta1-0/+1
2014-03-05target-ppc: Add ISA 2.06 divwe[o] InstructionsTom Musta1-0/+32
2014-03-05target-ppc: Add ISA 2.06 divweu[o] InstructionsTom Musta1-0/+31
2014-03-05target-ppc: Add ISA2.06 divde[o] InstructionsTom Musta1-0/+23
2014-03-05target-ppc: Add ISA2.06 divdeu[o] InstructionsTom Musta1-0/+27
2014-03-05target-ppc: Add ISA2.06 bpermd InstructionTom Musta1-0/+20
2013-04-26target-ppc: emulate cmpb instructionAurelien Jarno1-0/+15
2013-02-23target-ppc: Split out SO, OV, CA fields from XERRichard Henderson1-23/+15
2013-02-23target-ppc: Use mul*2 in mulh* insnsRichard Henderson1-18/+0
2012-12-19misc: move include files to include/qemu/Paolo Bonzini1-1/+1
2012-10-04target-ppc: get rid of the HANDLE_NAN{1, 2, 3} macrosAurelien Jarno1-21/+0
2012-10-04target-ppc: use the softfloat float32_muladd functionAurelien Jarno1-43/+14
2012-10-04target-ppc: use the softfloat min/max functionsAurelien Jarno1-21/+2
2012-10-04target-ppc: simplify NaN propagation for vector functionsAurelien Jarno1-19/+7
2012-06-24ppc: Make hbrev table constBlue Swirl1-1/+1
2012-06-24ppc: Avoid AREG0 for integer and vector helpersBlue Swirl1-47/+73
2012-06-24ppc: Split integer and vector opsBlue Swirl1-0/+1538
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