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path: root/target-ppc/cpu.h
AgeCommit message (Expand)AuthorFilesLines
2009-08-24cleanup cpu-exec.c, part 0/N: consolidate handle_cpu_signalNathan Froyd1-0/+1
2009-08-16Replace REGX with PRIx64Blue Swirl1-2/+0
2009-08-16Replace local ADDRX/PADDRX macros with TARGET_FMT_lx/plxBlue Swirl1-2/+0
2009-08-16Replace always_inline with inlineBlue Swirl1-1/+1
2009-08-03target-ppc: add exceptions for conditional storesNathan Froyd1-0/+5
2009-08-03target-ppc: retain l{w,d}arx loaded valueNathan Froyd1-1/+3
2009-08-03target-ppc: add cpu_set_tlsNathan Froyd1-0/+11
2009-08-03target-ppc: fix cpu_clone_regsNathan Froyd1-3/+1
2009-07-16Update to a hopefully more future proof FSF addressBlue Swirl1-2/+1
2009-05-19Hardware convenience libraryPaul Brook1-1/+0
2009-05-16target-ppc: expose cpu capability flagsNathan Froyd1-0/+139
2009-04-28Fix PPC resetBlue Swirl1-1/+2
2009-03-13Make the ELF loader aware of backwards compatibilityblueswir11-2/+1
2009-03-07Keep SLB in-CPUblueswir11-0/+7
2009-03-07Implement large pagesblueswir11-0/+1
2009-03-07Implement slbmteblueswir11-1/+2
2009-03-07The _exit syscall is used for both thread termination in NPTL applications,pbrook1-1/+2
2009-03-02kvm/powerpc: Add irq support for E500 coreaurel321-0/+10
2009-02-08Load 32 bit ELF BIOS images also on PPC64blueswir11-1/+2
2009-02-03Rename spe_status to vec_statusaurel321-1/+3
2009-02-03Add f field to ppc_avr_taurel321-0/+1
2009-01-04Update FSF address in GPL/LGPL boilerplateaurel321-1/+1
2009-01-03Add vscr access macros.aurel321-0/+7
2008-12-18target-ppc: fix type of spe_acc.aurel321-1/+1
2008-12-15target-ppc: add signed fields to ppc_avr_t.aurel321-0/+3
2008-12-11target-ppc: remove remaining warningsaurel321-2/+7
2008-12-07target-ppc: convert SPR accesses to TCGaurel321-27/+14
2008-12-06target-ppc: remove dead codeaurel321-5/+1
2008-12-06target-ppc: convert SLB/TLB instructions to TCGaurel321-1/+1
2008-11-30Common cpu_loop_exit prototypeaurel321-1/+0
2008-11-27target-ppc: convert POWER2 load/store instructions to TCGaurel321-3/+0
2008-11-27target-ppc: convert SPE load/store to TCGaurel321-6/+0
2008-11-24target-ppc: convert altivec load/store to TCGaurel321-1/+0
2008-11-19target-ppc: convert fp ops to TCGaurel321-1/+0
2008-11-18Refactor translation block CPU state handling (Jan Kiszka)aliguori1-0/+8
2008-11-18Convert CPU_PC_FROM_TB to static inline (Jan Kiszka)aliguori1-2/+6
2008-11-10target-ppc: convert most SPE integer instructions to TCGaurel321-4/+8
2008-11-08target-ppc: fix tcg fatal error on i386 hostaurel321-1/+5
2008-11-01target-ppc: xer access prototypes no more used & implementedaurel321-2/+0
2008-10-21target-ppc: convert crf related instructions to TCGaurel321-1/+7
2008-10-21target-ppc: Convert XER accesses to TCGaurel321-12/+11
2008-09-20Suppress gcc 4.x -Wpointer-sign (included in -Wall) warningsblueswir11-2/+2
2008-09-04ppc: Convert CRF moves to TCGaurel321-1/+1
2008-09-04ppc: cleanup register typesaurel321-9/+10
2008-09-04ppc: Convert GPR moves to TCGaurel321-11/+1
2008-07-01Move interrupt_request and user_mode_only to common cpu state.pbrook1-2/+0
2008-06-30Move CPU save/load registration to common code.pbrook1-0/+2
2008-06-29Add instruction counter.pbrook1-0/+3
2008-05-30Fix typo.pbrook1-1/+1
2008-05-30Move clone() register setup to target specific code. Handle fork-like clone.pbrook1-0/+11
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