Age | Commit message (Expand) | Author | Files | Lines |
2008-06-27 | More efficient target register / TC accesses. | ths | 1 | -15/+15 |
2008-03-29 | Fix infinite loop when invalidating TLB, by Herve Poussineau. | ths | 1 | -1/+1 |
2008-01-04 | Handle some more exception types. | ths | 1 | -29/+43 |
2008-01-03 | Fix exception debug output. | ths | 1 | -39/+36 |
2007-12-26 | De-cruft exception definitions, and implement nicer debug output. | ths | 1 | -11/+53 |
2007-12-25 | Improved PABITS handling, and config register fixes. | ths | 1 | -3/+2 |
2007-11-22 | Fix off-by-one address checks in MIPS64 MMU, by Aurelien Jarno. | ths | 1 | -4/+4 |
2007-11-08 | Clean out the N32 macros from target-mips, and introduce MIPS ABI specific | ths | 1 | -8/+8 |
2007-10-29 | Fix logic bug which broke TLBL/TLBS handling somewhat. | ths | 1 | -3/+3 |
2007-10-28 | Implement missing MIPS supervisor mode bits. | ths | 1 | -3/+3 |
2007-10-14 | Replace is_user variable with mmu_idx in softmmu core, | j_mayer | 1 | -4/+4 |
2007-10-13 | Fix off-by-one in address check. | ths | 1 | -11/+8 |
2007-09-30 | Code provision for n32/n64 mips userland emulation. Not functional yet. | ths | 1 | -8/+8 |
2007-09-29 | Supervisor mode implementation, by Aurelien Jarno. | ths | 1 | -27/+34 |
2007-09-26 | hflags computation cleanup, by Aurelien Jarno. | ths | 1 | -7/+3 |
2007-09-25 | Optimise instructions accessing CP0, by Aurelien Jarno. | ths | 1 | -0/+3 |
2007-09-24 | Per-CPU instruction decoding implementation, by Aurelien Jarno. | ths | 1 | -6/+3 |
2007-09-17 | find -type f | xargs sed -i 's/[\t ]*$//g' # Yes, again. Note the star in the... | ths | 1 | -1/+1 |
2007-09-16 | find -type f | xargs sed -i 's/[\t ]$//g' # on most files | ths | 1 | -3/+3 |
2007-09-06 | Partial support for 34K multithreading, not functional yet. | ths | 1 | -27/+30 |
2007-08-26 | Disable 64-bit instructions on 32-bit CPU, by Aurelien Jarno. | ths | 1 | -3/+6 |
2007-06-25 | MIPS64 improvements, based on a patch by Aurelien Jarno. | ths | 1 | -3/+3 |
2007-06-23 | Handle MIPS64 SEGBITS value correctly. | ths | 1 | -13/+12 |
2007-05-28 | Handle PX/UX status flags correctly, by Aurelien Jarno. | ths | 1 | -0/+3 |
2007-05-23 | The 24k wants more watch and srsmap registers. | ths | 1 | -1/+1 |
2007-05-13 | Full MIPS64 MMU implementation, by Aurelien Jarno. | ths | 1 | -5/+46 |
2007-05-13 | MMU code improvements, by Aurelien Jarno. | ths | 1 | -12/+10 |
2007-05-13 | MIPS TLB style selection at runtime, by Herve Poussineau. | ths | 1 | -31/+41 |
2007-05-09 | Preliminary MIPS 64-bit MMU implementation, by Aurelien Jarno. | ths | 1 | -5/+57 |
2007-05-07 | MIPS 64-bit FPU support, plus some collateral bugfixes in the | ths | 1 | -0/+3 |
2007-05-07 | Clear BD slot on next exception if appropriate. | ths | 1 | -0/+4 |
2007-04-13 | Another fix for CP0 Cause register handling. | ths | 1 | -1/+1 |
2007-04-07 | cpu_get_phys_page_debug should return target_phys_addr_t | j_mayer | 1 | -2/+2 |
2007-04-06 | Fix handling of ADES exceptions. | ths | 1 | -1/+3 |
2007-04-05 | fix branch delay slot cornercases. | ths | 1 | -1/+1 |
2007-04-05 | Handle EBase properly. | ths | 1 | -1/+1 |
2007-03-30 | Squash logic bugs while they are fresh... | ths | 1 | -1/+0 |
2007-03-30 | Sanitize mips exception handling. | ths | 1 | -25/+20 |
2007-03-18 | Fix BD flag handling, cause register contents, implement some more bits | ths | 1 | -3/+11 |
2007-02-20 | Replace TLSZ with TARGET_FMT_lx. | ths | 1 | -6/+6 |
2007-02-18 | Fix sign-extension of VPN field in TLB, by Herve Poussineau. | ths | 1 | -1/+1 |
2007-01-22 | Fix PageMask handling, second part. | ths | 1 | -14/+33 |
2007-01-21 | Bring TLB / PageSize handling in line with real hardware behaviour. | ths | 1 | -17/+5 |
2007-01-03 | moved invalidate_tlb() to helper.c as a work around for gcc 3.2.2 bug - suppr... | bellard | 1 | -0/+41 |
2006-12-21 | Scrap SIGN_EXTEND32. | ths | 1 | -10/+10 |
2006-12-21 | Preliminiary MIPS64 support, disabled by default due to performance impact. | ths | 1 | -17/+17 |
2006-12-10 | Handle invalid accesses as SIGILL for mips/mipsel userland emulation. | ths | 1 | -0/+7 |
2006-12-07 | Fix reset handling, CP0 isn't enabled by default (a fact which doesn't | ths | 1 | -35/+20 |
2006-12-06 | Add MIPS32R2 instructions, and generally straighten out the instruction | ths | 1 | -6/+0 |
2006-12-06 | MIPS TLB performance improvements, by Daniel Jacobowitz. | ths | 1 | -1/+1 |