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2009-01-04Update FSF address in GPL/LGPL boilerplateaurel328-8/+8
The attached patch updates the FSF address in the GPL/LGPL boilerplate in most GPL/LGPLed files, and also in COPYING.LIB. Signed-off-by: Stuart Brady <stuart.brady@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6162 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-22Use the ARRAY_SIZE() macro where appropriate.malc1-2/+2
Change from v1: Avoid changing the existing coding style in certain files. Signed-off-by: Stuart Brady <stuart.brady@gmail.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6120 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-13Initialize msr list size properly in KVMaliguori1-0/+1
Hollis Blanchard noticed that the last commit was not sufficient. We also need to initialize the msr size in our newly allocated list. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6018 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-13Correctly initialize msr list in KVMaliguori1-1/+1
I believe this was spotted by Gerd Hoffman but I can't find his patch now. This will cause very subtle corruption on the heap because we don't allocate the appropriately sized buffer. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6017 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-13Fix smsw for x86_64 guest and bigendian host casemalc1-0/+4
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6009 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-13x86 cleanupblueswir14-71/+56
Remove some unnecessary includes, add needed includes, move prototypes to cpu.h to suppress missing prototype warnings. Remove unused functions and prototypes (cpu_x86_flush_tlb, cpu_lock, cpu_unlock, restore_native_fp_state, save_native_fp_state). Make some functions and data static (f15rk, parity_table, rclw_table, rclb_table, raise_interrupt, fpu_raise_exception), they are not used outside op_helper.c anymore. Make some x86_64 and user only code conditional to avoid warnings. Document where each function is implemented in cpu.h and exec.h. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6005 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-11Fix crash in kvm.c (Stefan Weil)aliguori1-1/+1
Fix crash with kvm enabled. Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5984 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-10target-i386: Fix jmp im on x86_64 when executing 32-bit codeaurel321-0/+2
When running grub-install (32-bit) on an x86_64 Linux system in qemu, it hangs on a pagefault forever, because an integer overflow occurs on the IP on "jmp im". This patch masks overflows for 32 bit IPs on a 64 bit system, just like it is done for 16 bit IPs already. Using this patch, x86_64 openSUSE installation works again. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Kevin Wolf <kwolf@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5963 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07Remove FORCE_RET() and RETURN()aurel322-25/+0
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5923 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07target-i386: fix CVE-2007-1322aurel321-0/+2
The icebp instruction can be abused to terminate the emulation, resulting in denial of service. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5921 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-02Fix register name typo in dumping debug registers (Jan Kiszka)aliguori1-2/+2
Signed-off-by: Jan Kiszka <jan.kiszka@web.de> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5855 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-01Fix pmovsx* / pmovzx* SSE instructions (original fix by Frank Mehnert).balrog1-6/+6
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5841 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-30Common cpu_loop_exit prototypeaurel321-1/+0
All archs use the same cpu_loop_exit, so move the prototype in a common header. i386 was carrying a __hidden attribute, but that was empty for this arch anyway. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5820 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-25Use sys-queue.h for break/watchpoint managment (Jan Kiszka)aliguori2-3/+3
This switches cpu_break/watchpoint_* to TAILQ wrappers, simplifying the code and also fixing a use after release issue in cpu_break/watchpoint_remove_all. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5799 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-25i386: remove unused function prototypes (Laurent Desnogues)aliguori1-3/+0
This patch removes two unused prototypes from i386 target exec.h file. Signed-off-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5795 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-18x86: Dump debug registers (Jan Kiszka)aliguori1-0/+7
As the debug registers are no longer dummies, let's include their current state into the 'info registers' output and other register dumps. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5748 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-18x86: Debug register emulation (Jan Kiszka)aliguori4-40/+215
Built on top of previously enhanced breakpoint/watchpoint support, this patch adds full debug register emulation for the x86 architecture. Many corner cases were considered, and the result was successfully tested inside a Linux guest with gdb, but I won't be surprised if one or two scenarios still behave differently in reality. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5747 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-18Refactor and enhance break/watchpoint API (Jan Kiszka)aliguori1-3/+4
This patch prepares the QEMU cpu_watchpoint/breakpoint API to allow the succeeding enhancements this series comes with. First of all, it overcomes MAX_BREAKPOINTS/MAX_WATCHPOINTS by switching to dynamically allocated data structures that are kept in linked lists. This also allows to return a stable reference to the related objects, required for later introduced x86 debug register support. Breakpoints and watchpoints are stored with their full information set and an additional flag field that makes them easily extensible for use beyond pure guest debugging. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5738 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-18Refactor translation block CPU state handling (Jan Kiszka)aliguori1-0/+8
This patch refactors the way the CPU state is handled that is associated with a TB. The basic motivation is to move more arch specific code out of generic files. Specifically the long #ifdef clutter in tb_find_fast() has to be overcome in order to avoid duplicating it for the gdb watchpoint fixes (patch "Restore pc on watchpoint hits"). Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5736 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-18Convert CPU_PC_FROM_TB to static inline (Jan Kiszka)aliguori1-2/+6
as macros should be avoided when possible. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5735 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-17TCG variable type checking.pbrook8-974/+1038
Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5729 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-16target-i386: fix helper_pmovmskb_mmx helperaurel321-16/+16
(malc) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5728 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-13x86: fix warning without CONFIG_KVM (Mark McLoughlin)aliguori1-2/+2
Warning is: target-i386/helper.c: In function `cpu_x86_cpuid': target-i386/helper.c:1373: warning: implicit declaration of function `host_cpuid' Signed-off-by: Mark McLoughlin <markmc@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5718 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-13Fix CPUID ext2 features masking (Avi Kivity)aliguori1-1/+1
Typo. Exposes rdtscp which kills some guests. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5717 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-13Define kvm_ioctl in the same way as ioctlaliguori1-2/+2
The third argument to ioctl is a ... which allows any value to be passed. In practice, glibc always treats the argument as a void *. Do the same thing for the kvm ioctls to keep things consistent with a traditional ioctl. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5715 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-10x86 CPUID extended family/model (Andre Przywara).balrog1-2/+7
x86 CPUs feature extended family/model bits in CPUID leaf 0000_0001|EAX. Refer to page 10 in: http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/25481.pdf Those bits are necessary to model newer AMD CPUs: -cpu qemu64,family=15,model=65,stepping=3 or -cpu qemu64,family=16,model=4,stepping=2 Signed-off-by: Andre Przywara <andre.przywara@amd.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5664 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-05Add missing files to KVM commit.aliguori1-0/+638
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5629 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-05Add KVM support to QEMUaliguori2-0/+79
This patch adds very basic KVM support. KVM is a kernel module for Linux that allows userspace programs to make use of hardware virtualization support. It current supports x86 hardware virtualization using Intel VT-x or AMD-V. It also supports IA64 VT-i, PPC 440, and S390. This patch only implements the bare minimum support to get a guest booting. It has very little impact the rest of QEMU and attempts to integrate nicely with the rest of QEMU. Even though this implementation is basic, it is significantly faster than TCG. Booting and shutting down a Linux guest: w/TCG: 1:32.36 elapsed 84% CPU w/KVM: 0:31.14 elapsed 59% CPU Right now, KVM is disabled by default and must be explicitly enabled with -enable-kvm. We can enable it by default later when we have had better testing. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5627 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-05Split CPUID from op_helperaliguori3-162/+176
KVM needs to call CPUID from outside of the TCG code. This patch splits out the CPUID logic into a separate helper that both the op helper and KVM can call. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5626 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-05Add additional CPU flag definitionsaliguori1-1/+8
Some x86 CPU definitions that KVM needs Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5625 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-29Fix restore of older snapshots for target-i386 on big endian hostsaliguori1-2/+2
A target_ulong may be 64-bit. Passing it to a function expecting a 32-bit pointer is wrong and unfortunately happens to work for x86. It won't work on big endian hosts though. Change the code to work properly on all hosts. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5570 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-28Fix cpuid ext_features value for Atom N270 (Blue Swirl).balrog1-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5558 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-26Fix undeclared symbol warnings from sparseblueswir11-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5539 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-17i386/SVM: return amount of ASIDsaurel321-3/+3
With SVM the TLB supports tagging to distinguish TLB entries from different virtual CPUs. This tag is called an ASID. The amount of ASIDs is given in EBX of the SVM-CPUID-leaf. Currently we return 0, which might break hypervisors. Let's better return something >0 here, say 0x10. Since we're flushing the complete TLB on every VM entry and exit we're not making use of the ASID information anyways. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5496 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-14target-i386: Add Core Duo Definitionaurel322-2/+24
This patch adds a CPU definition for the Core Duo CPU. I tried to resemble the original as closely as possible and document what features are missing still. This patch enables the use of a recent CPU definition on 32 bit platforms. It also fixes two issues that went along the line: - invalid xlevel in core2duo spec While looking though the CPUIDs again, I found that xlevel is actually 8. - non-PSE36 support The CoreDuo CPUID does not expose the PSE36 capability, but CPUID 0x80000008 is tied to 36 bits. This broke Windows XP installation for me, so I just set it to 32 bits width when PSE36 is not available. The original CPU also exposes 32 bit width in CPUID 0x80000008. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5488 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-04Fix crc32w decoding, fix a constant width in blendvpd.balrog2-5/+4
Forced the constant's width to long long so that it doesn't overflow, problem spotted by C. W. Betts. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5417 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-04x86 "popcnt" affects flags.balrog1-0/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5412 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-04Implement SSE4.1, SSE4.2 (x86).balrog3-33/+973
This adds support for CPUID_EXT_SSE41, CPUID_EXT_SSE42, CPUID_EXT_POPCNT extensions. Most instructions haven't been tested yet. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5411 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-02Do not use load_seg_vm to load CS in real mode iret handlingmalc1-1/+2
load_seg_vm calls cpu_x86_load_seg_cache which updates hflags of current env, real hardware doesn't do this, nor the code that handles real mode lret/lcall/ljmp. This unbreaks "unreal mode" and makes QEMU the first emulator being able to run Project Angel demo by IMPACT Studios. (Not that there are many physical machines out there capable of doing the same) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5403 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-02Resurrect the safe part of r5274blueswir11-2/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5401 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-01x86 pextrw destination operand can be r64.balrog1-1/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5367 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-30Handle MSR_IA32_PERF_STATUS in rdmsr (Alexander Graf).balrog1-6/+6
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5366 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-29Fix save/restore regression introduced by r5318aliguori1-1/+1
sysenter_cs is a u32 and is loaded as a u32. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5351 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-29My core2duo patch introduced a vague statement of "missing features" in pbrook3-9/+41
the CPUID specification. This patch addresses this by specifying exactly what is missing. While going along the missing CPUID entries I also stumbled across invalid and missing CPUID #defines while comparing them to the Intel Documentation. This patch also addresses these. I found them too minor to split them up in a separate patch. Furthermore I looked through CPUID functions > 5 and realized that it should be safe to bump the level to 10. I tried booting Linux with that and it worked fine. Signed-off-by: Alexander Graf <agraf@suse.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5350 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-28Rename -cpu atom to -cpu n270.balrog1-1/+1
As noticed by Alexander Graf Atom is a name of a series with varying features. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5341 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-26Fix definition of EMX bit in cpuid (Jens Axboe).balrog1-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5330 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-25Revert r5274 which breaks savevm/loadvmblueswir11-2/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5321 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-25Add Atom (x86) cpu identification.balrog1-3/+24
Also add SSSE3 to Core2 features. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5319 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-25SYSENTER/SYSEXIT IA-32e implementation (Alexander Graf).balrog5-29/+64
On Intel CPUs, sysenter and sysexit are valid in 64-bit mode. This patch makes both 64-bit aware and enables them for Intel CPUs. Add cpu save/load for 64-bit wide sysenter variables. Signed-off-by: Alexander Graf <agraf@suse.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5318 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-25Core 2 Duo specification (Alexander Graf).balrog3-0/+66
This patch adds a Core 2 Duo CPU to the available CPU types. The CPU definition tries to resemble a real CPU as good as possible, whilst not exposing features qemu does not implement. The patch also includes some minor additions that Core 2 Duo CPUs have: - New MSR: MSR_IA32_PERF_STATUS - CPUID up to level 5 (cache info and mwait) Signed-off-by: Alexander Graf <agraf@suse.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5317 c046a42c-6fe2-441c-8c8c-71466251a162
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