index
:
sdk/emulator/qemu
1.0_post
2.0alpha
features/brillcodec_2i
features/camera
features/cnp
features/dr
features/qt_dr
features/smp
features/virtio-9p
features/vmodem
glesv3
master
opensrc_p2.3
opensrc_p2.3.1
opensrc_p2.3.2
opensrc_p2.4
opensrc_p3.0
opensrc_p4.0
sandbox/byungchul.so/tizen
sandbox/elebideau/tizen
sandbox/mmajewski2/maru-virgl-rendering-wip
sandbox/mmajewski2/standalone-virgl-wip
sandbox/pcoval/tizen
spin
tizen
tizen_2.0
tizen_2.1
tizen_2.2
tizen_3.0.m14.4_ivi
tizen_p2.3
tizen_p2.3.1
tizen_qemu_1.6
tizen_qemu_1.7
tizen_qemu_2.0
tizen_qemu_5.0.1
tizen_studio_1.2_p2.3
tizen_studio_1.2_p2.3.1
tizen_studio_1.2_p2.3.2
tizen_studio_1.2_p2.4
tizen_studio_1.2_p3.0
tizen_studio_1.3_p2.3
tizen_studio_1.3_p2.3.1
tizen_studio_1.3_p2.3.2
tizen_studio_1.3_p2.4
tizen_studio_1.3_p3.0
tizen_studio_2.0_p2.3
tizen_studio_2.0_p2.3.1
tizen_studio_2.0_p2.3.2
tizen_studio_2.0_p2.4
tizen_studio_2.0_p3.0
tizen_studio_2.0_p4.0
tizen_studio_2.0_p5.0
tizen_studio_3.0_p2.3
tizen_studio_3.0_p2.3.1
tizen_studio_3.0_p2.3.2
tizen_studio_3.0_p2.4
tizen_studio_3.0_p3.0
tizen_studio_3.0_p4.0
tizen_studio_3.0_p5.0
tizen_studio_3.5_p2.3
tizen_studio_3.5_p2.3.1
tizen_studio_3.5_p2.3.2
tizen_studio_3.5_p2.4
tizen_studio_3.5_p3.0
tizen_studio_3.5_p4.0
tizen_studio_3.5_p5.0
tizen_studio_3.5_p5.5
tizen_studio_4.0_p2.3
tizen_studio_4.0_p2.3.1
tizen_studio_4.0_p2.3.2
tizen_studio_4.0_p2.4
tizen_studio_4.0_p3.0
tizen_studio_4.0_p4.0
tizen_studio_4.0_p5.0
tizen_studio_4.0_p5.5
tizen_studio_4.0_p6.0
tizen_studio_4.5_p6.5
tizen_studio_5.0_p7.0
tizen_studio_5.5_p7.5
tizen_studio_5.5_p8.0
tizen_studio_6.0_p9.0
tizen_studio_p2.3
tizen_studio_p2.3.1
tizen_studio_p2.3.2
tizen_studio_p2.4
tizen_studio_p3.0
tizen_studio_p4.0
works/arg_renewal
Domain: SDK / Emulator;
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
target-i386
/
cpu.h
Age
Commit message (
Expand
)
Author
Files
Lines
2016-09-19
target-i386: Use struct X86XSaveArea in fpu_helper.c
Richard Henderson
1
-8
/
+2
2016-09-14
target-i386: fix ordering of fields in CPUX86State
Paolo Bonzini
1
-6
/
+6
2016-09-09
target-i386: present virtual L3 cache info for vcpus
Longpeng(Mike)
1
-0
/
+6
2016-09-05
target-i386: Add more Intel AVX-512 instructions support
Luwei Kang
1
-0
/
+5
2016-07-20
target-i386: Add support for UMIP and RDPID CPUID bits
Paolo Bonzini
1
-0
/
+2
2016-07-20
target-i386: Add socket/core/thread properties to X86CPU
Igor Mammedov
1
-0
/
+4
2016-07-20
target-i386: Set physical address bits based on host
Dr. David Alan Gilbert
1
-0
/
+3
2016-07-20
target-i386: Use uint32_t for X86CPU.apic_id
Igor Mammedov
1
-1
/
+6
2016-07-20
target-i386: Fill high bits of mtrr mask
Dr. David Alan Gilbert
1
-0
/
+3
2016-07-20
target-i386: Allow physical address bits to be set
Dr. David Alan Gilbert
1
-0
/
+3
2016-07-20
target-i386: Provide TCG_PHYS_ADDR_BITS
Dr. David Alan Gilbert
1
-2
/
+4
2016-07-19
target-i386: Remove redundant HF_SOFTMMU_MASK
Sergey Fedorov
1
-3
/
+0
2016-07-12
target-*: Clean up cpu.h header guards
Markus Armbruster
1
-3
/
+4
2016-07-07
target-i386: Publish advised value of MSR_IA32_FEATURE_CONTROL via fw_cfg
Haozhong Zhang
1
-0
/
+4
2016-07-07
target-i386: kvm: Add basic Intel LMCE support
Ashok Raj
1
-0
/
+12
2016-07-07
target-i386: Report hyperv feature words through qom
Evgeny Yakovlev
1
-0
/
+3
2016-07-07
pc: Parse CPU features only once
Igor Mammedov
1
-1
/
+0
2016-06-29
target-*: Don't redefine cpu_exec()
Peter Crosthwaite
1
-2
/
+0
2016-06-14
target-i386: Implement CPUID[0xB] (Extended Topology Enumeration)
Radim Krčmář
1
-0
/
+8
2016-05-23
target-i386: kvm: Allocate kvm_msrs struct once per VCPU
Eduardo Habkost
1
-0
/
+4
2016-05-23
cpu: Eliminate cpudef_init(), cpudef_setup()
Eduardo Habkost
1
-2
/
+0
2016-05-23
target-i386: Define structs for layout of xsave area
Eduardo Habkost
1
-0
/
+95
2016-05-19
cpu: move exec-all.h inclusion out of cpu.h
Paolo Bonzini
1
-2
/
+0
2016-05-19
apic: move target-dependent definitions to cpu.h
Paolo Bonzini
1
-0
/
+7
2016-05-19
target-i386: make cpu-qom.h not target specific
Paolo Bonzini
1
-1
/
+97
2016-05-18
Fix some typos found by codespell
Stefan Weil
1
-1
/
+1
2016-05-12
tb: consistently use uint32_t for tb->flags
Emilio G. Cota
1
-1
/
+1
2016-03-24
target-i386: implement PKE for TCG
Paolo Bonzini
1
-1
/
+5
2016-02-25
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging
Peter Maydell
1
-10
/
+19
2016-02-25
target-i386: fix confusion in xcr0 bit position vs. mask
Paolo Bonzini
1
-10
/
+19
2016-02-23
all: Clean up includes
Peter Maydell
1
-1
/
+0
2016-02-13
target-i386: Enable control registers for MPX
Richard Henderson
1
-1
/
+20
2016-01-21
target-i386: Add PKU and and OSPKE support
Huaitong Han
1
-0
/
+7
2016-01-21
target-i386: Add support to migrate vcpu's TSC rate
Haozhong Zhang
1
-0
/
+1
2016-01-21
target-i386: Add suffixes to MMReg struct fields
Eduardo Habkost
1
-33
/
+33
2016-01-21
target-i386: Define MMREG_UNION macro
Eduardo Habkost
1
-16
/
+11
2016-01-21
target-i386: Define MMXReg._d field
Eduardo Habkost
1
-1
/
+2
2016-01-21
target-i386: Rename XMM_[BWLSDQ] helpers to ZMM_*
Eduardo Habkost
1
-12
/
+12
2016-01-21
target-i386: Rename struct XMMReg to ZMMReg
Eduardo Habkost
1
-3
/
+3
2016-01-21
target-i386: Use a _q array on MMXReg too
Eduardo Habkost
1
-2
/
+2
2016-01-21
target-i386: Rename optimize_flags_init()
Eduardo Habkost
1
-1
/
+1
2015-12-17
target-i386/kvm: Hyper-V SynIC timers MSR's support
Andrey Smetanin
1
-0
/
+2
2015-12-17
target-i386/kvm: Hyper-V SynIC MSR's support
Andrey Smetanin
1
-0
/
+5
2015-11-26
target-i386: kvm: Use env->mcg_cap when setting up MCE
Eduardo Habkost
1
-0
/
+2
2015-11-05
target-i386: Enable clflushopt/clwb/pcommit instructions
Xiao Guangrong
1
-0
/
+3
2015-10-23
target-i386: Check CR4[DE] for processing DR4/DR5
Richard Henderson
1
-1
/
+1
2015-10-23
target-i386: Handle I/O breakpoints
Eduardo Habkost
1
-0
/
+2
2015-10-23
target-i386: Move hw_*breakpoint_* functions
Richard Henderson
1
-27
/
+0
2015-10-23
target-i386: Introduce cpu_x86_update_dr7
Richard Henderson
1
-2
/
+2
2015-10-12
target-i386/kvm: Hyper-V HV_X64_MSR_VP_RUNTIME support
Andrey Smetanin
1
-0
/
+1
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