index
:
sdk/emulator/qemu
1.0_post
2.0alpha
features/brillcodec_2i
features/camera
features/cnp
features/dr
features/qt_dr
features/smp
features/virtio-9p
features/vmodem
glesv3
master
opensrc_p2.3
opensrc_p2.3.1
opensrc_p2.3.2
opensrc_p2.4
opensrc_p3.0
opensrc_p4.0
sandbox/byungchul.so/tizen
sandbox/elebideau/tizen
sandbox/mmajewski2/maru-virgl-rendering-wip
sandbox/mmajewski2/standalone-virgl-wip
sandbox/pcoval/tizen
spin
tizen
tizen_2.0
tizen_2.1
tizen_2.2
tizen_3.0.m14.4_ivi
tizen_p2.3
tizen_p2.3.1
tizen_qemu_1.6
tizen_qemu_1.7
tizen_qemu_2.0
tizen_qemu_5.0.1
tizen_studio_1.2_p2.3
tizen_studio_1.2_p2.3.1
tizen_studio_1.2_p2.3.2
tizen_studio_1.2_p2.4
tizen_studio_1.2_p3.0
tizen_studio_1.3_p2.3
tizen_studio_1.3_p2.3.1
tizen_studio_1.3_p2.3.2
tizen_studio_1.3_p2.4
tizen_studio_1.3_p3.0
tizen_studio_2.0_p2.3
tizen_studio_2.0_p2.3.1
tizen_studio_2.0_p2.3.2
tizen_studio_2.0_p2.4
tizen_studio_2.0_p3.0
tizen_studio_2.0_p4.0
tizen_studio_2.0_p5.0
tizen_studio_3.0_p2.3
tizen_studio_3.0_p2.3.1
tizen_studio_3.0_p2.3.2
tizen_studio_3.0_p2.4
tizen_studio_3.0_p3.0
tizen_studio_3.0_p4.0
tizen_studio_3.0_p5.0
tizen_studio_3.5_p2.3
tizen_studio_3.5_p2.3.1
tizen_studio_3.5_p2.3.2
tizen_studio_3.5_p2.4
tizen_studio_3.5_p3.0
tizen_studio_3.5_p4.0
tizen_studio_3.5_p5.0
tizen_studio_3.5_p5.5
tizen_studio_4.0_p2.3
tizen_studio_4.0_p2.3.1
tizen_studio_4.0_p2.3.2
tizen_studio_4.0_p2.4
tizen_studio_4.0_p3.0
tizen_studio_4.0_p4.0
tizen_studio_4.0_p5.0
tizen_studio_4.0_p5.5
tizen_studio_4.0_p6.0
tizen_studio_4.5_p6.5
tizen_studio_5.0_p7.0
tizen_studio_5.5_p7.5
tizen_studio_5.5_p8.0
tizen_studio_6.0_p9.0
tizen_studio_p2.3
tizen_studio_p2.3.1
tizen_studio_p2.3.2
tizen_studio_p2.4
tizen_studio_p3.0
tizen_studio_p4.0
works/arg_renewal
Domain: SDK / Emulator;
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
target-arm
Age
Commit message (
Expand
)
Author
Files
Lines
2012-02-17
target-arm/helper.c: tb_flush() on CPU reset
Peter Maydell
1
-0
/
+5
2012-02-17
target-arm/helper.c: Correct FPSID value for Cortex-A9
Peter Maydell
1
-1
/
+1
2012-01-25
Add Cortex-A15 CPU definition
Peter Maydell
2
-5
/
+52
2012-01-25
Add dummy implementation of generic timer cp15 registers
Peter Maydell
2
-2
/
+11
2012-01-25
arm: store the config_base_register during cpu_reset
Mark Langsdorf
1
-0
/
+3
2012-01-25
target-arm/helper.c: Don't assume softfloat int32 is 32 bits only
Peter Maydell
1
-1
/
+1
2012-01-25
target-arm: Fix implementation of TLB invalidate operations
Peter Maydell
1
-7
/
+6
2012-01-13
arm: Add dummy support for co-processor 15's secure config register
Rob Herring
3
-1
/
+13
2012-01-13
target-arm: Fix errors in decode of M profile CPS
Peter Maydell
1
-4
/
+4
2012-01-05
arm: add dummy A9-specific cp15 registers
Mark Langsdorf
3
-1
/
+59
2012-01-05
target-arm: Ignore attempts to set invalid modes in CPSR
Peter Maydell
1
-1
/
+29
2012-01-05
target-arm: Don't use cpu_single_env in bank_number()
Peter Maydell
1
-6
/
+6
2011-12-13
target-arm: Infer VFPv3 feature from VFPv4
Andreas Färber
1
-1
/
+3
2011-12-13
target-arm: Infer VFP feature from VFPv3
Andreas Färber
1
-3
/
+3
2011-12-13
target-arm: Infer Thumb division feature from M profile
Andreas Färber
1
-1
/
+3
2011-12-13
target-arm: Infer Thumb2 feature from ARMv7
Andreas Färber
1
-4
/
+1
2011-12-13
target-arm: Infer AUXCR feature from ARMv6
Andreas Färber
1
-5
/
+3
2011-12-13
target-arm: Infer ARMv6(K) feature from ARMv7
Andreas Färber
1
-4
/
+5
2011-12-13
target-arm: Infer ARMv6 feature from v6K
Andreas Färber
1
-5
/
+3
2011-12-13
target-arm: Infer ARMv5 feature from ARMv6
Andreas Färber
1
-7
/
+3
2011-12-13
target-arm: Infer ARMv4T feature from ARMv5
Andreas Färber
1
-12
/
+3
2011-12-13
arm: Fix CP15 FSR (C5) domain setting
Jean-Christophe DUBOIS
1
-11
/
+15
2011-12-05
target-arm/helper.c: Don't allocate TCG resources unless TCG enabled
Peter Maydell
1
-1
/
+1
2011-12-05
target-arm/translate.c: Fix slightly misleading comment in Thumb decoder
Peter Maydell
1
-3
/
+5
2011-10-20
target-arm: Fix use of free() in cpu_arm_close()
Andreas Färber
1
-1
/
+1
2011-10-19
target-arm/machine.c: Restore VFP registers correctly
Dmitry Koshelev
1
-1
/
+1
2011-10-19
target-arm: Implement VFPv4 fused multiply-accumulate insns
Peter Maydell
4
-0
/
+90
2011-10-19
target-arm: Add ARM UDIV/SDIV support
Peter Maydell
3
-1
/
+24
2011-10-19
target-arm: Rename ARM_FEATURE_DIV to _THUMB_DIV
Peter Maydell
3
-4
/
+5
2011-10-19
target-arm: v6 media multiply space: UNDEF on unassigned encodings
Peter Maydell
1
-4
/
+20
2011-10-19
rsqrte_f32: No need to copy sign bit.
Christophe LYON
1
-2
/
+1
2011-10-10
Merge remote-tracking branch 'stefanha/trivial-patches' into staging
Anthony Liguori
1
-1
/
+1
2011-10-08
ARM: fix segfault
Blue Swirl
1
-0
/
+1
2011-10-05
target-arm: Fix typo
Andreas Färber
1
-1
/
+1
2011-10-01
softmmu_header: pass CPUState to tlb_fill
Blue Swirl
1
-4
/
+2
2011-08-20
Use glib memory allocation and free functions
Anthony Liguori
1
-1
/
+1
2011-08-09
Merge remote-tracking branch 'pm-arm/for-upstream' into pm
Edgar E. Iglesias
3
-42
/
+121
2011-08-07
Remove unused is_softmmu parameter from cpu_handle_mmu_fault
Blue Swirl
3
-4
/
+4
2011-07-30
exec.h cleanup
Blue Swirl
2
-32
/
+7
2011-07-26
target-arm: Don't print debug messages for various UNDEF cases
Peter Maydell
1
-6
/
+0
2011-07-26
target-arm: UNDEF on a VCVTT/VCVTB UNPREDICTABLE to avoid TCG assert
Peter Maydell
1
-8
/
+11
2011-07-26
target-arm: Handle UNDEF and UNPREDICTABLE cases for VLDM, VSTM
Peter Maydell
1
-7
/
+31
2011-07-26
target-arm: Support v6 barriers in linux-user mode
Peter Maydell
1
-18
/
+33
2011-07-26
target-arm: Mark 1136r1 as a v6K core
Peter Maydell
2
-2
/
+21
2011-07-26
target-arm: support for ARM1176JZF-s cores
Jamie Iles
2
-0
/
+24
2011-07-26
target-arm: make VMSAv7 remapping and AP dependent on V6K
Jamie Iles
1
-1
/
+1
2011-07-23
Correct spelling of licensed
Matthew Fernandez
2
-2
/
+2
2011-07-20
Merge branch 'for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm
Blue Swirl
7
-492
/
+752
2011-07-04
arm: Add const attribute to some arm_boot_info pointers
Stefan Weil
1
-1
/
+1
2011-06-26
Remove exec-all.h include directives
Blue Swirl
3
-3
/
+0
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