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path: root/target-arm/translate-a64.c
AgeCommit message (Expand)AuthorFilesLines
2015-11-03target-arm: Report S/NS status in the CPU debug logsPeter Maydell1-1/+10
2015-11-03target-arm: Bring AArch64 debug CPU display of PSTATE into line with AArch32Peter Maydell1-3/+5
2015-10-28target-*: Advance pc after recognizing a breakpointRichard Henderson1-2/+5
2015-10-16target-arm: Fix CPU breakpoint handlingSergey Fedorov1-5/+12
2015-10-16target-arm: Break the TB after ISB to execute self-modified code correctlySergey Sorokin1-1/+7
2015-10-07tcg: Remove gen_intermediate_code_pcRichard Henderson1-27/+3
2015-10-07tcg: Add TCG_MAX_INSNSRichard Henderson1-0/+3
2015-10-07target-arm: Add condexec state to insn_startRichard Henderson1-1/+1
2015-10-07target-*: Introduce and use cpu_breakpoint_testRichard Henderson1-13/+13
2015-10-07target-*: Increment num_insns immediately after tcg_gen_insn_startRichard Henderson1-3/+3
2015-10-07target-*: Unconditionally emit tcg_gen_insn_startRichard Henderson1-4/+1
2015-10-07tcg: Rename debug_insn_start to insn_startRichard Henderson1-1/+1
2015-09-14target-arm: Use tcg_gen_extrh_i64_i32Richard Henderson1-25/+9
2015-09-14target-arm: Recognize RORRichard Henderson1-12/+21
2015-09-14target-arm: Eliminate unnecessary zero-extend in disas_bitfieldRichard Henderson1-1/+5
2015-09-14target-arm: Recognize UXTB, UXTH, LSR, LSLRichard Henderson1-0/+17
2015-09-14target-arm: Recognize SXTB, SXTH, SXTW, ASRRichard Henderson1-1/+23
2015-09-14target-arm: Implement fcsel with movcondRichard Henderson1-28/+17
2015-09-14target-arm: Implement ccmp branchlessRichard Henderson1-16/+58
2015-09-14target-arm: Use setcond and movcond for cselRichard Henderson1-36/+49
2015-09-14target-arm: Share all common TCG temporariesRichard Henderson1-22/+0
2015-09-08target-arm: Fix default_exception_el() function for the case when EL3 is not ...Sergey Sorokin1-1/+5
2015-09-07target-arm: Wire up HLT 0xf000 as the A64 semihosting instructionPeter Maydell1-2/+22
2015-08-24tcg: Remove tcg_gen_trunc_i64_i32Richard Henderson1-30/+30
2015-07-06target-arm: Split DISAS_YIELD from DISAS_WFEPeter Maydell1-0/+6
2015-06-22disas: Remove uses of CPU envPeter Crosthwaite1-1/+1
2015-05-29target-arm: Don't halt on WFI unless we don't have any workPeter Maydell1-0/+4
2015-05-29target-arm: Extend FP checks to use an ELGreg Bellows1-4/+4
2015-05-29target-arm: Make singlestate TB flags common between AArch32/64Peter Maydell1-2/+2
2015-05-29target-arm: Add exception target el infrastructureGreg Bellows1-12/+22
2015-03-13tcg: Change translator-side labels to a pointerRichard Henderson1-13/+13
2015-02-13Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20150212' into stagingPeter Maydell1-7/+3
2015-02-13target-arm: A64: Avoid signed shifts in disas_ldst_pair()Peter Maydell1-1/+1
2015-02-13target-arm: A64: Avoid left shifting negative integers in disas_pc_rel_addrPeter Maydell1-2/+3
2015-02-13target-arm: A64: Fix handling of rotate in logic_imm_decode_wmaskPeter Maydell1-1/+4
2015-02-13target-arm: A64: Fix shifts into sign bitPeter Maydell1-3/+3
2015-02-12tcg: Introduce tcg_op_buf_count and tcg_op_buf_fullRichard Henderson1-6/+3
2015-02-12tcg: Move emit of INDEX_op_end into gen_tb_endRichard Henderson1-1/+0
2015-02-05target-arm: Use correct mmu_idx for unprivileged loads and storesPeter Maydell1-1/+18
2015-02-05target-arm: Define correct mmu_idx values and pass them in TB flagsPeter Maydell1-2/+3
2015-02-05target-arm/translate-a64: Fix wrong mmu_idx usage for LDT/STTPeter Maydell1-1/+1
2015-01-03gen-icount: check cflags instead of use_icount globalPaolo Bonzini1-1/+1
2015-01-03translate: check cflags instead of use_icount globalPaolo Bonzini1-2/+2
2014-11-02target-arm: A64: remove redundant storeAlex Bennée1-1/+0
2014-10-24target-arm: rename arm_current_pl to arm_current_elGreg Bellows1-8/+8
2014-10-24target-arm: Handle SMC/HVC undef-if-no-ELx in pre_* helpersPeter Maydell1-2/+2
2014-09-29target-arm: A64: Emulate the SMC insnEdgar E. Iglesias1-0/+13
2014-09-29target-arm: A64: Emulate the HVC insnEdgar E. Iglesias1-9/+22
2014-08-19target-arm: Implement ARMv8 single-step handling for A64 codePeter Maydell1-5/+86
2014-08-19target-arm: A64: Avoid duplicate exit_tb(0) in non-linked goto_tbPeter Maydell1-2/+3
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