index
:
sdk/emulator/qemu
1.0_post
2.0alpha
features/brillcodec_2i
features/camera
features/cnp
features/dr
features/qt_dr
features/smp
features/virtio-9p
features/vmodem
glesv3
master
opensrc_p2.3
opensrc_p2.3.1
opensrc_p2.3.2
opensrc_p2.4
opensrc_p3.0
opensrc_p4.0
sandbox/byungchul.so/tizen
sandbox/elebideau/tizen
sandbox/mmajewski2/maru-virgl-rendering-wip
sandbox/mmajewski2/standalone-virgl-wip
sandbox/pcoval/tizen
spin
tizen
tizen_2.0
tizen_2.1
tizen_2.2
tizen_3.0.m14.4_ivi
tizen_p2.3
tizen_p2.3.1
tizen_qemu_1.6
tizen_qemu_1.7
tizen_qemu_2.0
tizen_qemu_5.0.1
tizen_studio_1.2_p2.3
tizen_studio_1.2_p2.3.1
tizen_studio_1.2_p2.3.2
tizen_studio_1.2_p2.4
tizen_studio_1.2_p3.0
tizen_studio_1.3_p2.3
tizen_studio_1.3_p2.3.1
tizen_studio_1.3_p2.3.2
tizen_studio_1.3_p2.4
tizen_studio_1.3_p3.0
tizen_studio_2.0_p2.3
tizen_studio_2.0_p2.3.1
tizen_studio_2.0_p2.3.2
tizen_studio_2.0_p2.4
tizen_studio_2.0_p3.0
tizen_studio_2.0_p4.0
tizen_studio_2.0_p5.0
tizen_studio_3.0_p2.3
tizen_studio_3.0_p2.3.1
tizen_studio_3.0_p2.3.2
tizen_studio_3.0_p2.4
tizen_studio_3.0_p3.0
tizen_studio_3.0_p4.0
tizen_studio_3.0_p5.0
tizen_studio_3.5_p2.3
tizen_studio_3.5_p2.3.1
tizen_studio_3.5_p2.3.2
tizen_studio_3.5_p2.4
tizen_studio_3.5_p3.0
tizen_studio_3.5_p4.0
tizen_studio_3.5_p5.0
tizen_studio_3.5_p5.5
tizen_studio_4.0_p2.3
tizen_studio_4.0_p2.3.1
tizen_studio_4.0_p2.3.2
tizen_studio_4.0_p2.4
tizen_studio_4.0_p3.0
tizen_studio_4.0_p4.0
tizen_studio_4.0_p5.0
tizen_studio_4.0_p5.5
tizen_studio_4.0_p6.0
tizen_studio_4.5_p6.5
tizen_studio_5.0_p7.0
tizen_studio_5.5_p7.5
tizen_studio_5.5_p8.0
tizen_studio_6.0_p9.0
tizen_studio_p2.3
tizen_studio_p2.3.1
tizen_studio_p2.3.2
tizen_studio_p2.4
tizen_studio_p3.0
tizen_studio_p4.0
works/arg_renewal
Domain: SDK / Emulator;
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
target-arm
/
helper.c
Age
Commit message (
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)
Author
Files
Lines
2014-06-19
target-arm: Add ULL suffix to calculation of page size
Peter Maydell
1
-1
/
+1
2014-06-19
target-arm: implement PD0/PD1 bits for TTBCR
Fabian Aggeler
1
-18
/
+44
2014-06-09
target-arm: Fix errors in writes to generic timer control registers
Peter Maydell
1
-3
/
+3
2014-06-09
target-arm: A32/T32: Mask CRC value in calling code, not helper
Peter Maydell
1
-19
/
+6
2014-06-09
target-arm: Correct handling of UXN bit in ARMv8 LPAE page tables
Ian Campbell
1
-9
/
+8
2014-06-09
target-arm: Prepare cpreg writefns/readfns for EL3/SecExt
Fabian Aggeler
1
-14
/
+14
2014-06-05
softmmu: introduce cpu_ldst.h
Paolo Bonzini
1
-2
/
+1
2014-06-05
target-arm: move arm_*_code to a separate file
Paolo Bonzini
1
-0
/
+1
2014-05-28
tcg: Invert the inclusion of helper.h
Richard Henderson
1
-1
/
+1
2014-05-27
target-arm: A64: Register VBAR_EL3
Edgar E. Iglesias
1
-0
/
+5
2014-05-27
target-arm: A64: Register VBAR_EL2
Edgar E. Iglesias
1
-0
/
+21
2014-05-27
target-arm: Make vbar_write writeback to any CPREG
Edgar E. Iglesias
1
-1
/
+1
2014-05-27
target-arm: Register EL3 versions of ELR and SPSR
Edgar E. Iglesias
1
-0
/
+16
2014-05-27
target-arm: Register EL2 versions of ELR and SPSR
Edgar E. Iglesias
1
-0
/
+16
2014-05-27
target-arm: Add SPSR entries for EL2/HYP and EL3/MON
Edgar E. Iglesias
1
-0
/
+4
2014-05-27
target-arm: c12_vbar -> vbar_el[]
Edgar E. Iglesias
1
-3
/
+3
2014-05-27
target-arm: Make esr_el1 an array
Edgar E. Iglesias
1
-5
/
+5
2014-05-27
target-arm: Make elr_el1 an array
Edgar E. Iglesias
1
-1
/
+2
2014-05-27
target-arm: implement CPACR register logic for ARMv7
Fabian Aggeler
1
-4
/
+28
2014-05-13
target-arm/helper.c: Don't flush the TLB if SCTLR is rewritten unchanged
Peter Maydell
1
-0
/
+7
2014-05-01
target-arm: A64: Fix a typo when declaring TLBI ops
Edgar E. Iglesias
1
-12
/
+12
2014-05-01
target-arm: Make vbar_write 64bit friendly on 32bit hosts
Edgar E. Iglesias
1
-1
/
+1
2014-05-01
target-arm: Implement XScale cache lockdown operations as NOPs
Peter Maydell
1
-0
/
+15
2014-04-17
target-arm: Implement CBAR for Cortex-A57
Peter Maydell
1
-6
/
+33
2014-04-17
target-arm: Implement RVBAR register
Peter Maydell
1
-0
/
+6
2014-04-17
target-arm: Implement AArch64 address translation operations
Peter Maydell
1
-29
/
+24
2014-04-17
target-arm: Implement auxiliary fault status registers
Peter Maydell
1
-0
/
+9
2014-04-17
target-arm: Replace wildcarded cpreg definitions with precise ones for ARMv8
Peter Maydell
1
-5
/
+91
2014-04-17
target-arm: Don't expose wildcard ID register definitions for ARMv8
Peter Maydell
1
-18
/
+43
2014-04-17
target-arm: Implement ISR_EL1 register
Peter Maydell
1
-0
/
+18
2014-04-17
target-arm: Implement AArch64 view of ACTLR
Peter Maydell
1
-1
/
+2
2014-04-17
target-arm: Implement AArch64 view of CONTEXTIDR
Peter Maydell
1
-15
/
+18
2014-04-17
target-arm: Implement AArch64 views of AArch32 ID registers
Peter Maydell
1
-29
/
+44
2014-04-17
target-arm: Implement ARMv8 MVFR registers
Peter Maydell
1
-0
/
+12
2014-04-17
target-arm: Move arm_log_exception() into internals.h
Peter Maydell
1
-31
/
+0
2014-04-17
target-arm: Implement AArch64 SPSR_EL1
Peter Maydell
1
-0
/
+4
2014-04-17
target-arm: Implement SP_EL0, SP_EL1
Peter Maydell
1
-0
/
+34
2014-04-17
target-arm: Add AArch64 ELR_EL1 register.
Peter Maydell
1
-0
/
+4
2014-04-17
target-arm: Implement AArch64 views of fault status and data registers
Rob Herring
1
-13
/
+25
2014-04-17
target-arm: Use dedicated CPU state fields for ARM946 access bit registers
Peter Maydell
1
-10
/
+14
2014-04-17
target-arm: A64: Implement DC ZVA
Peter Maydell
1
-5
/
+117
2014-04-17
target-arm: Don't mention PMU in debug feature register
Peter Maydell
1
-1
/
+6
2014-04-17
target-arm: Add v8 mmu translation support
Rob Herring
1
-32
/
+77
2014-04-17
target-arm: Provide syndrome information for MMU faults
Rob Herring
1
-0
/
+12
2014-04-17
target-arm: Define exception record for AArch64 exceptions
Peter Maydell
1
-9
/
+14
2014-04-17
target-arm: Implement AArch64 DAIF system register
Peter Maydell
1
-0
/
+20
2014-04-17
target-arm: Split out private-to-target functions into internals.h
Peter Maydell
1
-0
/
+1
2014-03-17
target-arm: A64: Add [UF]RSQRTE (reciprocal root estimate)
Alex Bennée
1
-27
/
+106
2014-03-17
target-arm: A64: Implement AdvSIMD reciprocal estimate insns URECPE, FRECPE
Alex Bennée
1
-35
/
+163
2014-03-17
target-arm: Add ARM_CP_IO notation to PMCR reginfo
Peter Maydell
1
-0
/
+1
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