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2014-06-23tcg-ppc64: Adjust tcg_out_call for ELFv2Ulrich Weigand1-0/+17
The new ELFv2 ABI, used by default on powerpc64le-linux hosts, introduced some changes that are incompatible with code currently generated by the ppc64 TGC target. In particular, we no longer use function descriptors. This patch adds support for the ELFv2 ABI in the ppc64 TGC function call and function prologue sequences. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Ulrich Weigand <ulrich.weigand@de.ibm.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-06-23tcg-ppc64: Support the ppc64 elfv2 ABIRichard Henderson1-0/+4
Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-06-23tcg-ppc64: Use the correct test in tcg_out_callRichard Henderson1-3/+3
The correct test uses the _CALL_AIX macro, not a host-specific macro. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-06-23tcg-ppc64: Better parameterize the stack frameRichard Henderson1-28/+36
In preparation for supporting other ABIs. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-06-23tcg-ppc64: Fix TCG_TARGET_CALL_STACK_OFFSETRichard Henderson1-1/+1
The calling convention reserves space for the 8 register parameters on the stack, so using only 6*8=48 as the offset was wrong. We never saw this bug because we don't have any helpers with more than 5 parameters. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-06-23tcg-ppc64: Move call macros out of tcg-target.hRichard Henderson2-6/+5
These values are private to tcg.c; we don't need to expose this nonsense to the translators. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-06-23tcg-ppc64: Make TCG_AREG0 and TCG_REG_CALL_STACK enum constantsRichard Henderson1-35/+11
Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-06-23tcg-ppc64: Use tcg_out_{ld,st,cmp} internallyRichard Henderson1-19/+14
Rather than using tcg_out32 and opcodes directly. This allows us to remove LD_ADDR and CMP_L macros. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-06-23tcg-ppc64: Relax register restrictions in tcg_out_mem_longRichard Henderson1-5/+7
In order to be able to use tcg_out_ld/st sensibly with scratch registers, assert only when we'd incorrectly clobber a scratch. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-06-23tcg-ppc64: Move functions aroundRichard Henderson1-361/+361
Code movement only. This will allow us to make use of the other tcg_out_* functions in tidying their implementations. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-06-23tcg-ppc64: Avoid some hard-codings of TCG_TYPE_I64Richard Henderson1-10/+13
Using more appropriate _PTR or _REG where possible. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-06-23tcg-ppc: Use uintptr_t in ppc_tb_set_jmp_targetRichard Henderson2-2/+2
Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-06-23Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into ↵Peter Maydell10-56/+122
staging Block pull request # gpg: Signature made Mon 23 Jun 2014 09:53:49 BST using RSA key ID 81AB73C8 # gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>" # gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>" * remotes/stefanha/tags/block-pull-request: block: asynchronously stop the VM on I/O errors vl: allow other threads to do qemu_system_vmstop_request sheepdog: fix NULL dereference in sd_create QemuOpts: check NULL opts in qemu_opt_get functions block: m25p80: Support read only bdrvs. block: m25p80: sync_page(): Deindent function body. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-06-23Merge remote-tracking branch 'remotes/mcayland/qemu-sparc' into stagingPeter Maydell1-2/+2
* remotes/mcayland/qemu-sparc: apb: Fix out-of-bounds array write access Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-06-23Merge remote-tracking branch 'remotes/mcayland/qemu-openbios' into stagingPeter Maydell4-0/+0
* remotes/mcayland/qemu-openbios: Update OpenBIOS images Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-06-23console: move chardev declarations to sysemu/char.hMichael S. Tsirkin4-7/+6
move generic chardev APIs to sysemu/char.h, to make them available to callers which can not depend on the whole of ui/console.h. This fixes a build error on systems without pixman-devel: ./configure --disable-tools --disable-docs --target-list=arm-linux-user ... pixman none ... make ... In file included from /data/home/nchip/linaro/qemu/include/ui/console.h:4:0, from /data/home/nchip/linaro/qemu/stubs/vc-init.c:2: /data/home/nchip/linaro/qemu/include/ui/qemu-pixman.h:14:20: fatal error: pixman.h: No such file or directory #include <pixman.h> ^ compilation terminated. Reported-by: Riku Voipio <riku.voipio@iki.fi> Tested-by: Riku Voipio <riku.voipio@iki.fi> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 1403508500-32691-1-git-send-email-mst@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-06-23block: asynchronously stop the VM on I/O errorsPaolo Bonzini3-4/+26
With virtio-blk dataplane, I/O errors might occur while QEMU is not in the main I/O thread. However, it's invalid to call vm_stop when we're neither in a VCPU thread nor in the main I/O thread, even if we were to take the iothread mutex around it. To avoid this problem, we can raise a request to the main I/O thread, similar to what QEMU does when vm_stop is called from a CPU thread. We know that bdrv_error_action is called from an AIO callback, and the moment at which the callback will fire is not well-defined; it depends on the moment at which the disk or OS finishes the operation, which can happen at any time. Note that QEMU is certainly not in a CPU thread and we do not need to call cpu_stop_current() like vm_stop() does. However, we need to ensure that any action taken by management will result in correct detection of the error _and_ a running VM. In particular: - the event must be raised after the iostatus has been set, so that "info block" will return an iostatus that matches the event. - the VM must be stopped after the iostatus has been set, so that "info block" will return an iostatus that matches the runstate. The ordering between the STOP and BLOCK_IO_ERROR events is preserved; BLOCK_IO_ERROR is documented to come first. This makes bdrv_error_action() thread safe (assuming QMP events are, which is attacked by a separate series). Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2014-06-23vl: allow other threads to do qemu_system_vmstop_requestPaolo Bonzini4-32/+57
There patch protects vmstop_requested with a lock and introduces qemu_system_vmstop_request_prepare. Together with the new call to qemu_vmstop_requested in vm_start, qemu_system_vmstop_request_prepare avoids a race where the VM could remain stopped even though the iostatus of a block device has already been set (for example). qemu_system_vmstop_request_prepare however also lets the caller thread delay observation of the state change until it has itself communicated that change to the user. This delay avoids any possibility of a wrong reordering of the BLOCK_IO_ERROR event and the subsequent STOP event. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2014-06-23sheepdog: fix NULL dereference in sd_createLiu Yuan1-0/+1
Following command qemu-img create -f qcow2 sheepdog:test 20g will cause core dump because aio_context is NULL in sd_create. We should initialize it by qemu_get_aio_context() to avoid NULL dereference. Cc: qemu-devel@nongnu.org Cc: Kevin Wolf <kwolf@redhat.com> Cc: Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by: Liu Yuan <namei.unix@gmail.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2014-06-21QemuOpts: check NULL opts in qemu_opt_get functionsChunyan Liu1-4/+24
Some places will call bdrv_create_file(filename, NULL, &local_err), where opts is NULL. Check NULL in qemu_opt_get and qemu_opt_get_*_del functions, to avoid extra effort of checking opts before calling them every time. Signed-off-by: Chunyan Liu <cyliu@suse.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2014-06-21block: m25p80: Support read only bdrvs.Peter Crosthwaite1-6/+2
By just never doing write-backs. This is completely invisible to the guest, as the entire storage area is implemented as device state (at realize time the entire drive is read in). Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2014-06-21block: m25p80: sync_page(): Deindent function body.Peter Crosthwaite1-11/+13
sync_page() was conditionalizing it's whole fn body on the bdrv being non-null. Just return for the function immediately on NULL brdv and get rid of the big if. Makes implementation consistent with flash_zynq_area(). Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2014-06-20Update OpenBIOS imagesMark Cave-Ayland4-0/+0
Update OpenBIOS images to SVN r1306 built from submodule. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2014-06-20apb: Fix out-of-bounds array write accessStefan Weil1-2/+2
The array regs is declared with IOMMU_NREGS (3) elements and accessed using IOMMU_CTRL (0) and IOMMU_BASE (8). In most cases, those values are right shifted before being used as an index which results in indices 0 and 1. In one case, this right shift was missing for IOMMU_BASE which results in an out-of-bounds write access with index 8. The patch adds the missing shift operation also for IOMMU_CTRL where it is needed only for cosmetic reasons. Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2014-06-20gt64xxx_pci: Add VMStateDescriptionSanjay Lal1-0/+23
Add VMStateDescription for GT64120 PCI emulation used by the Malta platform, to allow it to work with savevm/loadvm and live migration. The entire register array is saved/restored using VMSTATE_UINT32_ARRAY (fixed length GT_REGS = 1024). Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> [james.hogan@imgtec.com: Convert to VMState] Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Andreas Färber <afaerber@suse.de> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2014-06-20target-mips: copy CP0_Config1 into DisasContextAurelien Jarno1-9/+11
In order to avoid access to the CPUMIPSState structure in the translator, keep a copy of CP0_Config1 into DisasContext. The whole register is read-only so it can be copied as a single value. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2014-06-20Merge remote-tracking branch 'remotes/kvm/uq/master' into stagingPeter Maydell15-41/+873
* remotes/kvm/uq/master: hw/mips: malta: Don't boot from flash with KVM T&E MAINTAINERS: Add entry for MIPS KVM target-mips: Enable KVM support in build system hw/mips: malta: Add KVM support hw/mips: In KVM mode, inject IRQ2 (I/O) interrupts via ioctls target-mips: Call kvm_mips_reset_vcpu() from mips_cpu_reset() target-mips: kvm: Add main KVM support for MIPS kvm: Allow arch to set sigmask length target-mips: get_physical_address: Add KVM awareness target-mips: get_physical_address: Add defines for segment bases hw/mips: Add API to convert KVM guest KSEG0 <-> GPA hw/mips/cputimer: Don't start periodic timer in KVM mode target-mips: Reset CPU timer consistently KVM: Fix GSI number space limit Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-06-20Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell126-728/+7416
pc,pci,virtio,hotplug fixes, enhancements numa work by Hu Tao and others memory hotplug by Igor vhost-user by Nikolay, Antonios and others guest virtio announcements by Jason qtest fixes by Sergey qdev hotplug fixes by Paolo misc other fixes mostly by myself Signed-off-by: Michael S. Tsirkin <mst@redhat.com> * remotes/mst/tags/for_upstream: (109 commits) numa: use RAM_ADDR_FMT with ram_addr_t qapi/string-output-visitor: fix bugs tests: simplify code qapi: fix input visitor bugs acpi: rephrase comment qmp: add ACPI_DEVICE_OST event handling qmp: add query-acpi-ospm-status command acpi: implement ospm_status() method for PIIX4/ICH9_LPC devices acpi: introduce TYPE_ACPI_DEVICE_IF interface qmp: add query-memory-devices command numa: handle mmaped memory allocation failure correctly pc: acpi: do not hardcode preprocessor qmp: clean out whitespace qdev: recursively unrealize devices when unrealizing bus qdev: reorganize error reporting in bus_set_realized qapi: fix build on glib < 2.28 qapi: make string output visitor parse int list qapi: make string input visitor parse int list tests: fix memory leak in test of string input visitor hmp: add info memdev ... Conflicts: include/hw/i386/pc.h [PMM: fixed minor conflict in pc.h] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-06-20Merge remote-tracking branch ↵Peter Maydell15-89/+246
'remotes/pmaydell/tags/pull-target-arm-20140619' into staging target-arm: * Support PSCI 0.2 when using KVM * fix AIRCR reset value for v7M CPUs * report correct size information for pflash_cfi01 * minor coverity fixes * avoid warnings on Windows builds due to #define clash * implement TTBCR PD0/PD1 bits # gpg: Signature made Thu 19 Jun 2014 18:35:06 BST using RSA key ID 14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" * remotes/pmaydell/tags/pull-target-arm-20140619: armv7m_nvic: fix AIRCR implementation Use PSCI v0.2 compatible string when KVM or TCG provides it target-arm: Introduce per-CPU field for PSCI version target-arm: Implement kvm_arch_reset_vcpu() for KVM ARM64 target-arm: Enable KVM_ARM_VCPU_PSCI_0_2 feature when possible target-arm: Common kvm_arm_vcpu_init() for KVM ARM and KVM ARM64 kvm: Handle exit reason KVM_EXIT_SYSTEM_EVENT hw/block/pflash_cfi01: Report correct size info for parallel configs hw/arm/vexpress: Forbid specifying flash contents in two ways at once target-arm/translate-a64.c: Fix dead ?: in handle_simd_shift_fpint_conv() target-arm/translate-a64.c: Remove dead ?: in disas_simd_3same_int() target-arm: Add ULL suffix to calculation of page size hw/arm/spitz: Avoid clash with Windows header symbol MOD_SHIFT target-arm: implement PD0/PD1 bits for TTBCR Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-06-20Merge remote-tracking branch 'remotes/kraxel/tags/pull-vnc-20140619-1' into ↵Peter Maydell2-15/+9
staging vnc: cleanups and fixes # gpg: Signature made Thu 19 Jun 2014 12:02:09 BST using RSA key ID D3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" * remotes/kraxel/tags/pull-vnc-20140619-1: vnc: fix screen updates vnc: Drop superfluous conditionals around g_strdup() vnc: Drop superfluous conditionals around g_free() Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-06-20spice: fix 32bit buildGerd Hoffmann2-2/+2
Tested-by: Luiz Capitulino <lcapitulino@redhat.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 1403244764-8622-1-git-send-email-kraxel@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-06-20Merge remote-tracking branch 'remotes/rth/tcg-next' into stagingPeter Maydell1-5/+4
* remotes/rth/tcg-next: tcg/optimize: Don't special case TCG_OPF_CALL_CLOBBER Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-06-20hw/mips: malta: Don't boot from flash with KVM T&EJames Hogan1-0/+6
In KVM trap & emulate (T&E) mode the flash reset region at 0xbfc00000 isn't executable, which is why the minimal kernel bootloader is loaded and executed from the last 1MB of DRAM instead. Therefore if no kernel is provided on the command line and KVM is enabled, exit with an error since booting from flash will fail. Reported-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-06-19armv7m_nvic: fix AIRCR implementationOran Avraham1-1/+4
The returned reset value was wrong (off by one zero nibble), and qemu didn't log unimplemented writes to the PRIGROUP field. Signed-off-by: Oran Avraham <oranav@gmail.com> Message-id: 1403010447-4627-1-git-send-email-oranav@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-06-19Use PSCI v0.2 compatible string when KVM or TCG provides itPranavkumar Sawargaonkar1-1/+15
If we have PSCI v0.2 emulation available for KVM ARM/ARM64 or TCG then we need to provide PSCI v0.2 compatible string via generated DTB. Signed-off-by: Pranavkumar Sawargaonkar <pranavkumar@linaro.org> Signed-off-by: Anup Patel <anup.patel@linaro.org> Reviewed-by: Rob Herring <rob.herring@linaro.org> Message-id: 1402901605-24551-9-git-send-email-pranavkumar@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-06-19target-arm: Introduce per-CPU field for PSCI versionPranavkumar Sawargaonkar4-0/+9
We require to know the PSCI version available to given CPU at potentially many places. Currently, we need to know PSCI version when generating DTB for virt machine. This patch introduce per-CPU 32bit field representing the PSCI version available to the CPU. The encoding of this 32bit field is same as described in PSCI v0.2 spec. Signed-off-by: Pranavkumar Sawargaonkar <pranavkumar@linaro.org> Signed-off-by: Anup Patel <anup.patel@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1402901605-24551-8-git-send-email-pranavkumar@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-06-19target-arm: Implement kvm_arch_reset_vcpu() for KVM ARM64Pranavkumar Sawargaonkar1-0/+4
To implement kvm_arch_reset_vcpu(), we simply re-init the VCPU using kvm_arm_vcpu_init() so that all registers of VCPU are set to their reset values by in-kernel KVM code. Signed-off-by: Pranavkumar Sawargaonkar <pranavkumar@linaro.org> Signed-off-by: Anup Patel <anup.patel@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1402901605-24551-7-git-send-email-pranavkumar@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-06-19target-arm: Enable KVM_ARM_VCPU_PSCI_0_2 feature when possiblePranavkumar Sawargaonkar2-0/+6
Latest linux kernel supports in-kernel emulation of PSCI v0.2 but to enable it we need to select KVM_ARM_VCPU_PSCI_0_2 feature using KVM_ARM_VCPU_INIT ioctl. Also, we can use KVM_ARM_VCPU_PSCI_0_2 feature for VCPU only when linux kernel has KVM_CAP_ARM_PSCI_0_2 capability. This patch updates kvm_arch_init_vcpu() to enable KVM_ARM_VCPU_PSCI_0_2 feature for VCPU when KVM ARM/ARM64 has KVM_CAP_ARM_PSCI_0_2 capability. Signed-off-by: Pranavkumar Sawargaonkar <pranavkumar@linaro.org> Signed-off-by: Anup Patel <anup.patel@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1402901605-24551-6-git-send-email-pranavkumar@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-06-19target-arm: Common kvm_arm_vcpu_init() for KVM ARM and KVM ARM64Pranavkumar Sawargaonkar5-12/+44
Introduce a common kvm_arm_vcpu_init() for doing KVM_ARM_VCPU_INIT ioctl in KVM ARM and KVM ARM64. This also helps us factor-out few common code lines from kvm_arch_init_vcpu() for KVM ARM/ARM64. Signed-off-by: Pranavkumar Sawargaonkar <pranavkumar@linaro.org> Signed-off-by: Anup Patel <anup.patel@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1402901605-24551-5-git-send-email-pranavkumar@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-06-19kvm: Handle exit reason KVM_EXIT_SYSTEM_EVENTPranavkumar Sawargaonkar1-0/+16
In-kernel PSCI v0.2 emulation of KVM ARM/ARM64 forwards SYSTEM_OFF and SYSTEM_RESET function calls to QEMU using KVM_EXIT_SYSTEM_EVENT exit reason. This patch updates kvm_cpu_exec() to handle KVM_SYSTEM_EVENT_SHUTDOWN and KVM_SYSTEM_EVENT_RESET system-level events from QEMU-side. Signed-off-by: Pranavkumar Sawargaonkar <pranavkumar@linaro.org> Signed-off-by: Anup Patel <anup.patel@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1402901605-24551-4-git-send-email-pranavkumar@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-06-19hw/block/pflash_cfi01: Report correct size info for parallel configsPeter Maydell1-3/+17
If the flash device is configured with a device-width which is not equal to the bank-width, indicating that it is actually several narrow flash devices in parallel, the CFI table should report the number of blocks and the size of a single device, not of the whole combined setup. This stops Linux from complaining: "NOR chip too large to fit in mapping. Attempting to cope..." As usual, we retain the old broken but backwards compatible behaviour when the device-width is not specified. Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1402409025-25694-1-git-send-email-peter.maydell@linaro.org
2014-06-19hw/arm/vexpress: Forbid specifying flash contents in two ways at oncePeter Maydell1-1/+9
Detect attempts by the user to specify the contents of the first flash device via both -bios and -drive if=pflash... simultaneously and print a helpful error message. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1402419834-25982-1-git-send-email-peter.maydell@linaro.org
2014-06-19target-arm/translate-a64.c: Fix dead ?: in handle_simd_shift_fpint_conv()Peter Maydell1-1/+1
In handle_simd_shift_fpint_conv(), the combination of is_double == true, is_scalar == false and is_q == false is an unallocated encoding; the 'both parts false' case of the nested ?: expression for calculating maxpass is therefore unreachable and can be removed. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1402171881-14343-4-git-send-email-peter.maydell@linaro.org
2014-06-19target-arm/translate-a64.c: Remove dead ?: in disas_simd_3same_int()Peter Maydell1-1/+2
In disas_simd_3same_int(), none of the instructions permit is_q to be false with size == 3 (this would be a vector operation with a one-element vector, and the instruction set encodes those as scalar operations). Replace the always-true ?: check with an assert. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1402171881-14343-3-git-send-email-peter.maydell@linaro.org
2014-06-19target-arm: Add ULL suffix to calculation of page sizePeter Maydell1-1/+1
The maximum block size for AArch64 address translation is 2GB. This means that we need a ULL suffix on our shift to avoid shifting into the sign bit of a signed 32 bit integer. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1402171881-14343-2-git-send-email-peter.maydell@linaro.org
2014-06-19hw/arm/spitz: Avoid clash with Windows header symbol MOD_SHIFTPeter Maydell1-50/+58
The Windows headers provided by MinGW define MOD_SHIFT. Avoid it by using SPITZ_MOD_* for our constants here. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-06-19target-arm: implement PD0/PD1 bits for TTBCRFabian Aggeler2-18/+60
Corrected handling of writes to TTBCR for ARMv8 (previously UNK/SBZP bits are not RES0) and ARMv7 (new bits PD0/PD1 for CPUs with Security Extensions). Bits PD0/PD1 are now respected in get_phys_addr_v6/v5() and get_level1_table_address. Signed-off-by: Fabian Aggeler <aggelerf@ethz.ch> Message-id: 1402409556-18574-1-git-send-email-aggelerf@ethz.ch Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-06-19numa: use RAM_ADDR_FMT with ram_addr_tMichael S. Tsirkin1-6/+6
commit 4407ab055be995e64633322a78e64dfa376dc534 vl.c: extend -m option to support options for memory hotplug prints ram_addr_t with u64 format, this is wrong for some systems, in particular w32. print ram_addr_t with RAM_ADDR_FMT to fix build on w32. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2014-06-19qapi/string-output-visitor: fix bugsMichael S. Tsirkin1-3/+3
in human mode, we are creating the string: 16-31 (16-31) instead of 16-17 (10-1f) because we forgot to pass 'true' as the human parameter on one of the two calls to format_string. Also, this is a worsening of quality; previously we would produce 16 (0x10) to make it obvious which number was hex. Fix these issues. Reported-by: Eric Blake <eblake@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
2014-06-19tests: simplify codeMichael S. Tsirkin1-3/+1
Use error_abort instead of open-coded assert. Cleaner and shorter. Reported-by: Eric Blake <eblake@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
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