summaryrefslogtreecommitdiff
path: root/target-sh4
diff options
context:
space:
mode:
Diffstat (limited to 'target-sh4')
-rw-r--r--target-sh4/cpu.c2
-rw-r--r--target-sh4/cpu.h1
-rw-r--r--target-sh4/gdbstub.c2
-rw-r--r--target-sh4/helper.c7
-rw-r--r--target-sh4/monitor.c1
-rw-r--r--target-sh4/op_helper.c2
-rw-r--r--target-sh4/translate.c52
7 files changed, 34 insertions, 33 deletions
diff --git a/target-sh4/cpu.c b/target-sh4/cpu.c
index d7e2fbd0ed..86ba38808b 100644
--- a/target-sh4/cpu.c
+++ b/target-sh4/cpu.c
@@ -19,6 +19,8 @@
* <http://www.gnu.org/licenses/lgpl-2.1.html>
*/
+#include "qemu/osdep.h"
+#include "qapi/error.h"
#include "cpu.h"
#include "qemu-common.h"
#include "migration/vmstate.h"
diff --git a/target-sh4/cpu.h b/target-sh4/cpu.h
index 5b022c5973..3b23e967bb 100644
--- a/target-sh4/cpu.h
+++ b/target-sh4/cpu.h
@@ -19,7 +19,6 @@
#ifndef _CPU_SH4_H
#define _CPU_SH4_H
-#include "config.h"
#include "qemu-common.h"
#define TARGET_LONG_BITS 32
diff --git a/target-sh4/gdbstub.c b/target-sh4/gdbstub.c
index a365a27aad..1b59ea8c73 100644
--- a/target-sh4/gdbstub.c
+++ b/target-sh4/gdbstub.c
@@ -17,7 +17,7 @@
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
-#include "config.h"
+#include "qemu/osdep.h"
#include "qemu-common.h"
#include "exec/gdbstub.h"
diff --git a/target-sh4/helper.c b/target-sh4/helper.c
index eaececd894..6438338f24 100644
--- a/target-sh4/helper.c
+++ b/target-sh4/helper.c
@@ -16,13 +16,10 @@
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
-#include <stdarg.h>
-#include <stdlib.h>
-#include <stdio.h>
-#include <string.h>
-#include <inttypes.h>
+#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/log.h"
#if !defined(CONFIG_USER_ONLY)
#include "hw/sh4/sh_intc.h"
diff --git a/target-sh4/monitor.c b/target-sh4/monitor.c
index a06f0d46d8..426e5d4914 100644
--- a/target-sh4/monitor.c
+++ b/target-sh4/monitor.c
@@ -21,6 +21,7 @@
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
+#include "qemu/osdep.h"
#include "cpu.h"
#include "monitor/monitor.h"
#include "monitor/hmp-target.h"
diff --git a/target-sh4/op_helper.c b/target-sh4/op_helper.c
index a3121180dc..368e687d68 100644
--- a/target-sh4/op_helper.c
+++ b/target-sh4/op_helper.c
@@ -16,7 +16,7 @@
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
-#include <stdlib.h>
+#include "qemu/osdep.h"
#include "cpu.h"
#include "exec/helper-proto.h"
#include "exec/cpu_ldst.h"
diff --git a/target-sh4/translate.c b/target-sh4/translate.c
index 7bc621649a..7c189680a7 100644
--- a/target-sh4/translate.c
+++ b/target-sh4/translate.c
@@ -19,6 +19,7 @@
#define DEBUG_DISAS
+#include "qemu/osdep.h"
#include "cpu.h"
#include "disas/disas.h"
#include "tcg-op.h"
@@ -28,6 +29,7 @@
#include "exec/helper-gen.h"
#include "trace-tcg.h"
+#include "exec/log.h"
typedef struct DisasContext {
@@ -59,7 +61,7 @@ enum {
};
/* global register indexes */
-static TCGv_ptr cpu_env;
+static TCGv_env cpu_env;
static TCGv cpu_gregs[24];
static TCGv cpu_sr, cpu_sr_m, cpu_sr_q, cpu_sr_t;
static TCGv cpu_pc, cpu_ssr, cpu_spc, cpu_gbr;
@@ -100,53 +102,53 @@ void sh4_translate_init(void)
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
for (i = 0; i < 24; i++)
- cpu_gregs[i] = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_gregs[i] = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUSH4State, gregs[i]),
gregnames[i]);
- cpu_pc = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_pc = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUSH4State, pc), "PC");
- cpu_sr = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_sr = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUSH4State, sr), "SR");
- cpu_sr_m = tcg_global_mem_new_i32(TCG_AREG0,
- offsetof(CPUSH4State, sr_m), "SR_M");
- cpu_sr_q = tcg_global_mem_new_i32(TCG_AREG0,
- offsetof(CPUSH4State, sr_q), "SR_Q");
- cpu_sr_t = tcg_global_mem_new_i32(TCG_AREG0,
- offsetof(CPUSH4State, sr_t), "SR_T");
- cpu_ssr = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_sr_m = tcg_global_mem_new_i32(cpu_env,
+ offsetof(CPUSH4State, sr_m), "SR_M");
+ cpu_sr_q = tcg_global_mem_new_i32(cpu_env,
+ offsetof(CPUSH4State, sr_q), "SR_Q");
+ cpu_sr_t = tcg_global_mem_new_i32(cpu_env,
+ offsetof(CPUSH4State, sr_t), "SR_T");
+ cpu_ssr = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUSH4State, ssr), "SSR");
- cpu_spc = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_spc = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUSH4State, spc), "SPC");
- cpu_gbr = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_gbr = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUSH4State, gbr), "GBR");
- cpu_vbr = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_vbr = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUSH4State, vbr), "VBR");
- cpu_sgr = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_sgr = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUSH4State, sgr), "SGR");
- cpu_dbr = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_dbr = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUSH4State, dbr), "DBR");
- cpu_mach = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_mach = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUSH4State, mach), "MACH");
- cpu_macl = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_macl = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUSH4State, macl), "MACL");
- cpu_pr = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_pr = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUSH4State, pr), "PR");
- cpu_fpscr = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_fpscr = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUSH4State, fpscr), "FPSCR");
- cpu_fpul = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_fpul = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUSH4State, fpul), "FPUL");
- cpu_flags = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_flags = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUSH4State, flags), "_flags_");
- cpu_delayed_pc = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_delayed_pc = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUSH4State, delayed_pc),
"_delayed_pc_");
- cpu_ldst = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_ldst = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUSH4State, ldst), "_ldst_");
for (i = 0; i < 32; i++)
- cpu_fregs[i] = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_fregs[i] = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUSH4State, fregs[i]),
fregnames[i]);