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-rw-r--r--target-ppc/Makefile.objs2
-rw-r--r--target-ppc/arch_dump.c253
-rw-r--r--target-ppc/cpu-qom.h5
-rw-r--r--target-ppc/cpu.h3
-rw-r--r--target-ppc/kvm.c35
-rw-r--r--target-ppc/kvm_ppc.h7
-rw-r--r--target-ppc/machine.c2
-rw-r--r--target-ppc/mem_helper.c2
-rw-r--r--target-ppc/translate_init.c38
9 files changed, 327 insertions, 20 deletions
diff --git a/target-ppc/Makefile.objs b/target-ppc/Makefile.objs
index 94d6d0c43b..3cb23e0f11 100644
--- a/target-ppc/Makefile.objs
+++ b/target-ppc/Makefile.objs
@@ -2,7 +2,7 @@ obj-y += cpu-models.o
obj-y += translate.o
ifeq ($(CONFIG_SOFTMMU),y)
obj-y += machine.o mmu_helper.o mmu-hash32.o
-obj-$(TARGET_PPC64) += mmu-hash64.o
+obj-$(TARGET_PPC64) += mmu-hash64.o arch_dump.o
endif
obj-$(CONFIG_KVM) += kvm.o kvm_ppc.o
obj-$(call lnot,$(CONFIG_KVM)) += kvm-stub.o
diff --git a/target-ppc/arch_dump.c b/target-ppc/arch_dump.c
new file mode 100644
index 0000000000..17fd4c6fb1
--- /dev/null
+++ b/target-ppc/arch_dump.c
@@ -0,0 +1,253 @@
+/*
+ * writing ELF notes for ppc64 arch
+ *
+ *
+ * Copyright IBM, Corp. 2013
+ *
+ * Authors:
+ * Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ *
+ */
+
+#include "cpu.h"
+#include "elf.h"
+#include "exec/cpu-all.h"
+#include "sysemu/dump.h"
+#include "sysemu/kvm.h"
+
+struct PPC64UserRegStruct {
+ uint64_t gpr[32];
+ uint64_t nip;
+ uint64_t msr;
+ uint64_t orig_gpr3;
+ uint64_t ctr;
+ uint64_t link;
+ uint64_t xer;
+ uint64_t ccr;
+ uint64_t softe;
+ uint64_t trap;
+ uint64_t dar;
+ uint64_t dsisr;
+ uint64_t result;
+} QEMU_PACKED;
+
+struct PPC64ElfPrstatus {
+ char pad1[112];
+ struct PPC64UserRegStruct pr_reg;
+ uint64_t pad2[4];
+} QEMU_PACKED;
+
+
+struct PPC64ElfFpregset {
+ uint64_t fpr[32];
+ uint64_t fpscr;
+} QEMU_PACKED;
+
+
+struct PPC64ElfVmxregset {
+ ppc_avr_t avr[32];
+ ppc_avr_t vscr;
+ union {
+ ppc_avr_t unused;
+ uint32_t value;
+ } vrsave;
+} QEMU_PACKED;
+
+struct PPC64ElfVsxregset {
+ uint64_t vsr[32];
+} QEMU_PACKED;
+
+struct PPC64ElfSperegset {
+ uint32_t evr[32];
+ uint64_t spe_acc;
+ uint32_t spe_fscr;
+} QEMU_PACKED;
+
+typedef struct noteStruct {
+ Elf64_Nhdr hdr;
+ char name[5];
+ char pad3[3];
+ union {
+ struct PPC64ElfPrstatus prstatus;
+ struct PPC64ElfFpregset fpregset;
+ struct PPC64ElfVmxregset vmxregset;
+ struct PPC64ElfVsxregset vsxregset;
+ struct PPC64ElfSperegset speregset;
+ } contents;
+} QEMU_PACKED Note;
+
+
+static void ppc64_write_elf64_prstatus(Note *note, PowerPCCPU *cpu)
+{
+ int i;
+ uint64_t cr;
+ struct PPC64ElfPrstatus *prstatus;
+ struct PPC64UserRegStruct *reg;
+
+ note->hdr.n_type = cpu_to_be32(NT_PRSTATUS);
+
+ prstatus = &note->contents.prstatus;
+ memset(prstatus, 0, sizeof(*prstatus));
+ reg = &prstatus->pr_reg;
+
+ for (i = 0; i < 32; i++) {
+ reg->gpr[i] = cpu_to_be64(cpu->env.gpr[i]);
+ }
+ reg->nip = cpu_to_be64(cpu->env.nip);
+ reg->msr = cpu_to_be64(cpu->env.msr);
+ reg->ctr = cpu_to_be64(cpu->env.ctr);
+ reg->link = cpu_to_be64(cpu->env.lr);
+ reg->xer = cpu_to_be64(cpu_read_xer(&cpu->env));
+
+ cr = 0;
+ for (i = 0; i < 8; i++) {
+ cr |= (cpu->env.crf[i] & 15) << (4 * (7 - i));
+ }
+ reg->ccr = cpu_to_be64(cr);
+}
+
+static void ppc64_write_elf64_fpregset(Note *note, PowerPCCPU *cpu)
+{
+ int i;
+ struct PPC64ElfFpregset *fpregset;
+
+ note->hdr.n_type = cpu_to_be32(NT_PRFPREG);
+
+ fpregset = &note->contents.fpregset;
+ memset(fpregset, 0, sizeof(*fpregset));
+
+ for (i = 0; i < 32; i++) {
+ fpregset->fpr[i] = cpu_to_be64(cpu->env.fpr[i]);
+ }
+ fpregset->fpscr = cpu_to_be64(cpu->env.fpscr);
+}
+
+static void ppc64_write_elf64_vmxregset(Note *note, PowerPCCPU *cpu)
+{
+ int i;
+ struct PPC64ElfVmxregset *vmxregset;
+
+ note->hdr.n_type = cpu_to_be32(NT_PPC_VMX);
+ vmxregset = &note->contents.vmxregset;
+ memset(vmxregset, 0, sizeof(*vmxregset));
+
+ for (i = 0; i < 32; i++) {
+ vmxregset->avr[i].u64[0] = cpu_to_be64(cpu->env.avr[i].u64[0]);
+ vmxregset->avr[i].u64[1] = cpu_to_be64(cpu->env.avr[i].u64[1]);
+ }
+ vmxregset->vscr.u32[3] = cpu_to_be32(cpu->env.vscr);
+}
+static void ppc64_write_elf64_vsxregset(Note *note, PowerPCCPU *cpu)
+{
+ int i;
+ struct PPC64ElfVsxregset *vsxregset;
+
+ note->hdr.n_type = cpu_to_be32(NT_PPC_VSX);
+ vsxregset = &note->contents.vsxregset;
+ memset(vsxregset, 0, sizeof(*vsxregset));
+
+ for (i = 0; i < 32; i++) {
+ vsxregset->vsr[i] = cpu_to_be64(cpu->env.vsr[i]);
+ }
+}
+static void ppc64_write_elf64_speregset(Note *note, PowerPCCPU *cpu)
+{
+ struct PPC64ElfSperegset *speregset;
+ note->hdr.n_type = cpu_to_be32(NT_PPC_SPE);
+ speregset = &note->contents.speregset;
+ memset(speregset, 0, sizeof(*speregset));
+
+ speregset->spe_acc = cpu_to_be64(cpu->env.spe_acc);
+ speregset->spe_fscr = cpu_to_be32(cpu->env.spe_fscr);
+}
+
+struct NoteFuncDescStruct {
+ int contents_size;
+ void (*note_contents_func)(Note *note, PowerPCCPU *cpu);
+} note_func[] = {
+ {sizeof(((Note *)0)->contents.prstatus), ppc64_write_elf64_prstatus},
+ {sizeof(((Note *)0)->contents.fpregset), ppc64_write_elf64_fpregset},
+ {sizeof(((Note *)0)->contents.vmxregset), ppc64_write_elf64_vmxregset},
+ {sizeof(((Note *)0)->contents.vsxregset), ppc64_write_elf64_vsxregset},
+ {sizeof(((Note *)0)->contents.speregset), ppc64_write_elf64_speregset},
+ { 0, NULL}
+};
+
+typedef struct NoteFuncDescStruct NoteFuncDesc;
+
+int cpu_get_dump_info(ArchDumpInfo *info,
+ const struct GuestPhysBlockList *guest_phys_blocks)
+{
+ /*
+ * Currently only handling PPC64 big endian.
+ */
+ info->d_machine = EM_PPC64;
+ info->d_endian = ELFDATA2MSB;
+ info->d_class = ELFCLASS64;
+
+ return 0;
+}
+
+ssize_t cpu_get_note_size(int class, int machine, int nr_cpus)
+{
+ int name_size = 8; /* "CORE" or "QEMU" rounded */
+ size_t elf_note_size = 0;
+ int note_head_size;
+ NoteFuncDesc *nf;
+
+ if (class != ELFCLASS64) {
+ return -1;
+ }
+ assert(machine == EM_PPC64);
+
+ note_head_size = sizeof(Elf64_Nhdr);
+
+ for (nf = note_func; nf->note_contents_func; nf++) {
+ elf_note_size = elf_note_size + note_head_size + name_size +
+ nf->contents_size;
+ }
+
+ return (elf_note_size) * nr_cpus;
+}
+
+static int ppc64_write_all_elf64_notes(const char *note_name,
+ WriteCoreDumpFunction f,
+ PowerPCCPU *cpu, int id,
+ void *opaque)
+{
+ Note note;
+ int ret = -1;
+ int note_size;
+ NoteFuncDesc *nf;
+
+ for (nf = note_func; nf->note_contents_func; nf++) {
+ note.hdr.n_namesz = cpu_to_be32(sizeof(note.name));
+ note.hdr.n_descsz = cpu_to_be32(nf->contents_size);
+ strncpy(note.name, note_name, sizeof(note.name));
+
+ (*nf->note_contents_func)(&note, cpu);
+
+ note_size = sizeof(note) - sizeof(note.contents) + nf->contents_size;
+ ret = f(&note, note_size, opaque);
+ if (ret < 0) {
+ return -1;
+ }
+ }
+ return 0;
+}
+
+int ppc64_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs,
+ int cpuid, void *opaque)
+{
+ PowerPCCPU *cpu = POWERPC_CPU(cs);
+ return ppc64_write_all_elf64_notes("CORE", f, cpu, cpuid, opaque);
+}
+
+int ppc64_cpu_write_elf64_qemunote(WriteCoreDumpFunction f,
+ CPUState *cpu, void *opaque)
+{
+ return 0;
+}
diff --git a/target-ppc/cpu-qom.h b/target-ppc/cpu-qom.h
index f3c710a9e5..827e5dd0e1 100644
--- a/target-ppc/cpu-qom.h
+++ b/target-ppc/cpu-qom.h
@@ -108,7 +108,10 @@ void ppc_cpu_dump_statistics(CPUState *cpu, FILE *f,
hwaddr ppc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
int ppc_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
int ppc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
-
+int ppc64_cpu_write_elf64_qemunote(WriteCoreDumpFunction f,
+ CPUState *cpu, void *opaque);
+int ppc64_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs,
+ int cpuid, void *opaque);
#ifndef CONFIG_USER_ONLY
extern const struct VMStateDescription vmstate_ppc_cpu;
#endif
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 422a6bbd2e..26acdba847 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -405,6 +405,7 @@ struct ppc_slb_t {
uint64_t vsid;
};
+#define MAX_SLB_ENTRIES 64
#define SEGMENT_SHIFT_256M 28
#define SEGMENT_MASK_256M (~((1ULL << SEGMENT_SHIFT_256M) - 1))
@@ -949,7 +950,7 @@ struct CPUPPCState {
#if !defined(CONFIG_USER_ONLY)
#if defined(TARGET_PPC64)
/* PowerPC 64 SLB area */
- ppc_slb_t slb[64];
+ ppc_slb_t slb[MAX_SLB_ENTRIES];
int32_t slb_nr;
#endif
/* segment registers */
diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
index 8a196c6cc1..b77ce5e94c 100644
--- a/target-ppc/kvm.c
+++ b/target-ppc/kvm.c
@@ -818,7 +818,7 @@ int kvm_arch_put_registers(CPUState *cs, int level)
/* Sync SLB */
#ifdef TARGET_PPC64
- for (i = 0; i < 64; i++) {
+ for (i = 0; i < ARRAY_SIZE(env->slb); i++) {
sregs.u.s.ppc64.slb[i].slbe = env->slb[i].esid;
sregs.u.s.ppc64.slb[i].slbv = env->slb[i].vsid;
}
@@ -1033,9 +1033,22 @@ int kvm_arch_get_registers(CPUState *cs)
/* Sync SLB */
#ifdef TARGET_PPC64
- for (i = 0; i < 64; i++) {
- ppc_store_slb(env, sregs.u.s.ppc64.slb[i].slbe,
- sregs.u.s.ppc64.slb[i].slbv);
+ /*
+ * The packed SLB array we get from KVM_GET_SREGS only contains
+ * information about valid entries. So we flush our internal
+ * copy to get rid of stale ones, then put all valid SLB entries
+ * back in.
+ */
+ memset(env->slb, 0, sizeof(env->slb));
+ for (i = 0; i < ARRAY_SIZE(env->slb); i++) {
+ target_ulong rb = sregs.u.s.ppc64.slb[i].slbe;
+ target_ulong rs = sregs.u.s.ppc64.slb[i].slbv;
+ /*
+ * Only restore valid entries
+ */
+ if (rb & SLB_ESID_V) {
+ ppc_store_slb(env, rb, rs);
+ }
}
#endif
@@ -1789,6 +1802,20 @@ static int kvm_ppc_register_host_cpu_type(void)
return 0;
}
+int kvmppc_define_rtas_kernel_token(uint32_t token, const char *function)
+{
+ struct kvm_rtas_token_args args = {
+ .token = token,
+ };
+
+ if (!kvm_check_extension(kvm_state, KVM_CAP_PPC_RTAS)) {
+ return -ENOENT;
+ }
+
+ strncpy(args.name, function, sizeof(args.name));
+
+ return kvm_vm_ioctl(kvm_state, KVM_PPC_RTAS_DEFINE_TOKEN, &args);
+}
int kvmppc_get_htab_fd(bool write)
{
diff --git a/target-ppc/kvm_ppc.h b/target-ppc/kvm_ppc.h
index 4ae7bf2c32..5f78e4be14 100644
--- a/target-ppc/kvm_ppc.h
+++ b/target-ppc/kvm_ppc.h
@@ -38,6 +38,7 @@ uint64_t kvmppc_rma_size(uint64_t current_size, unsigned int hash_shift);
#endif /* !CONFIG_USER_ONLY */
int kvmppc_fixup_cpu(PowerPCCPU *cpu);
bool kvmppc_has_cap_epr(void);
+int kvmppc_define_rtas_kernel_token(uint32_t token, const char *function);
int kvmppc_get_htab_fd(bool write);
int kvmppc_save_htab(QEMUFile *f, int fd, size_t bufsize, int64_t max_ns);
int kvmppc_load_htab_chunk(QEMUFile *f, int fd, uint32_t index,
@@ -164,6 +165,12 @@ static inline bool kvmppc_has_cap_epr(void)
return false;
}
+static inline int kvmppc_define_rtas_kernel_token(uint32_t token,
+ const char *function)
+{
+ return -1;
+}
+
static inline int kvmppc_get_htab_fd(bool write)
{
return -1;
diff --git a/target-ppc/machine.c b/target-ppc/machine.c
index 12e1512996..12c174f7f3 100644
--- a/target-ppc/machine.c
+++ b/target-ppc/machine.c
@@ -312,7 +312,7 @@ static const VMStateDescription vmstate_slb = {
.minimum_version_id_old = 1,
.fields = (VMStateField []) {
VMSTATE_INT32_EQUAL(env.slb_nr, PowerPCCPU),
- VMSTATE_SLB_ARRAY(env.slb, PowerPCCPU, 64),
+ VMSTATE_SLB_ARRAY(env.slb, PowerPCCPU, MAX_SLB_ENTRIES),
VMSTATE_END_OF_LIST()
}
};
diff --git a/target-ppc/mem_helper.c b/target-ppc/mem_helper.c
index d8e63ca7d2..f35ed037c7 100644
--- a/target-ppc/mem_helper.c
+++ b/target-ppc/mem_helper.c
@@ -212,6 +212,7 @@ target_ulong helper_lscbx(CPUPPCState *env, target_ulong addr, uint32_t reg,
int index = (addr & 0xf) >> sh; \
\
if (msr_le) { \
+ index = n_elems - index - 1; \
r->element[LO_IDX ? index : (adjust - index)] = \
swap(access(env, addr)); \
} else { \
@@ -236,6 +237,7 @@ LVE(lvewx, cpu_ldl_data, bswap32, u32)
int index = (addr & 0xf) >> sh; \
\
if (msr_le) { \
+ index = n_elems - index - 1; \
access(env, addr, swap(r->element[LO_IDX ? index : \
(adjust - index)])); \
} else { \
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 651da6b0d5..47825ac543 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -108,6 +108,11 @@ static void spr_write_clear (void *opaque, int sprn, int gprn)
tcg_temp_free(t0);
tcg_temp_free(t1);
}
+
+static void spr_access_nop(void *opaque, int sprn, int gprn)
+{
+}
+
#endif
/* SPR common to all PowerPC */
@@ -1382,7 +1387,7 @@ static void gen_spr_74xx (CPUPPCState *env)
/* XXX : not implemented */
spr_register(env, SPR_L2CR, "L2CR",
SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, NULL,
+ &spr_read_generic, spr_access_nop,
0x00000000);
/* Not strictly an SPR */
vscr_init(env, 0x00010000);
@@ -5170,7 +5175,7 @@ static void init_proc_750 (CPUPPCState *env)
/* XXX : not implemented */
spr_register(env, SPR_L2CR, "L2CR",
SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, NULL,
+ &spr_read_generic, spr_access_nop,
0x00000000);
/* Time base */
gen_tbl(env);
@@ -5233,7 +5238,7 @@ static void init_proc_750cl (CPUPPCState *env)
/* XXX : not implemented */
spr_register(env, SPR_L2CR, "L2CR",
SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, NULL,
+ &spr_read_generic, spr_access_nop,
0x00000000);
/* Time base */
gen_tbl(env);
@@ -5419,7 +5424,7 @@ static void init_proc_750cx (CPUPPCState *env)
/* XXX : not implemented */
spr_register(env, SPR_L2CR, "L2CR",
SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, NULL,
+ &spr_read_generic, spr_access_nop,
0x00000000);
/* Time base */
gen_tbl(env);
@@ -5486,7 +5491,7 @@ static void init_proc_750fx (CPUPPCState *env)
/* XXX : not implemented */
spr_register(env, SPR_L2CR, "L2CR",
SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, NULL,
+ &spr_read_generic, spr_access_nop,
0x00000000);
/* Time base */
gen_tbl(env);
@@ -5558,7 +5563,7 @@ static void init_proc_750gx (CPUPPCState *env)
/* XXX : not implemented (XXX: different from 750fx) */
spr_register(env, SPR_L2CR, "L2CR",
SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, NULL,
+ &spr_read_generic, spr_access_nop,
0x00000000);
/* Time base */
gen_tbl(env);
@@ -5694,7 +5699,7 @@ static void init_proc_755 (CPUPPCState *env)
/* XXX : not implemented */
spr_register(env, SPR_L2CR, "L2CR",
SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, NULL,
+ &spr_read_generic, spr_access_nop,
0x00000000);
/* XXX : not implemented */
spr_register(env, SPR_L2PMCR, "L2PMCR",
@@ -6650,7 +6655,7 @@ static void init_proc_970 (CPUPPCState *env)
/* XXX : not implemented */
spr_register(env, SPR_L2CR, "L2CR",
SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, NULL,
+ &spr_read_generic, spr_access_nop,
0x00000000);
/* Memory management */
/* XXX: not correct */
@@ -6750,7 +6755,7 @@ static void init_proc_970FX (CPUPPCState *env)
/* XXX : not implemented */
spr_register(env, SPR_L2CR, "L2CR",
SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, NULL,
+ &spr_read_generic, spr_access_nop,
0x00000000);
/* Memory management */
/* XXX: not correct */
@@ -6862,7 +6867,7 @@ static void init_proc_970GX (CPUPPCState *env)
/* XXX : not implemented */
spr_register(env, SPR_L2CR, "L2CR",
SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, NULL,
+ &spr_read_generic, spr_access_nop,
0x00000000);
/* Memory management */
/* XXX: not correct */
@@ -6962,7 +6967,7 @@ static void init_proc_970MP (CPUPPCState *env)
/* XXX : not implemented */
spr_register(env, SPR_L2CR, "L2CR",
SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, NULL,
+ &spr_read_generic, spr_access_nop,
0x00000000);
/* Memory management */
/* XXX: not correct */
@@ -7054,7 +7059,7 @@ static void init_proc_power5plus(CPUPPCState *env)
/* XXX : not implemented */
spr_register(env, SPR_L2CR, "L2CR",
SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, NULL,
+ &spr_read_generic, spr_access_nop,
0x00000000);
/* Memory management */
/* XXX: not correct */
@@ -7103,6 +7108,7 @@ POWERPC_FAMILY(POWER5P)(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc);
+ dc->fw_name = "PowerPC,POWER5";
dc->desc = "POWER5+";
pcc->init_proc = init_proc_power5plus;
pcc->check_pow = check_pow_970FX;
@@ -7213,6 +7219,7 @@ POWERPC_FAMILY(POWER7)(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc);
+ dc->fw_name = "PowerPC,POWER7";
dc->desc = "POWER7";
pcc->init_proc = init_proc_POWER7;
pcc->check_pow = check_pow_nocheck;
@@ -7247,6 +7254,7 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc);
+ dc->fw_name = "PowerPC,POWER8";
dc->desc = "POWER8";
pcc->init_proc = init_proc_POWER7;
pcc->check_pow = check_pow_nocheck;
@@ -8567,6 +8575,10 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data)
#ifndef CONFIG_USER_ONLY
cc->get_phys_page_debug = ppc_cpu_get_phys_page_debug;
cc->vmsd = &vmstate_ppc_cpu;
+#if defined(TARGET_PPC64)
+ cc->write_elf64_note = ppc64_cpu_write_elf64_note;
+ cc->write_elf64_qemunote = ppc64_cpu_write_elf64_qemunote;
+#endif
#endif
cc->gdb_num_core_regs = 71;
@@ -8575,6 +8587,8 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data)
#else
cc->gdb_core_xml_file = "power-core.xml";
#endif
+
+ dc->fw_name = "PowerPC,UNKNOWN";
}
static const TypeInfo ppc_cpu_type_info = {
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-26 20:05:57 +0000