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-rw-r--r--target-i386/op_helper.c1
-rw-r--r--target-microblaze/translate.c11
-rw-r--r--target-ppc/helper.c2
-rw-r--r--target-s390x/translate.c2
-rw-r--r--target-sparc/ldst_helper.c80
5 files changed, 58 insertions, 38 deletions
diff --git a/target-i386/op_helper.c b/target-i386/op_helper.c
index bc3b94e149..2862ea4a92 100644
--- a/target-i386/op_helper.c
+++ b/target-i386/op_helper.c
@@ -3146,6 +3146,7 @@ void helper_rdpmc(void)
helper_svm_check_intercept_param(SVM_EXIT_RDPMC, 0);
/* currently unimplemented */
+ qemu_log_mask(LOG_UNIMP, "x86: unimplemented rdpmc\n");
raise_exception_err(EXCP06_ILLOP, 0);
}
diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c
index c0a6bfd9c3..7470149db3 100644
--- a/target-microblaze/translate.c
+++ b/target-microblaze/translate.c
@@ -1539,8 +1539,10 @@ static void dec_fpu(DisasContext *dc)
cpu_R[dc->ra], cpu_R[dc->rb]);
break;
default:
- qemu_log ("unimplemented fcmp fpu_insn=%x pc=%x opc=%x\n",
- fpu_insn, dc->pc, dc->opcode);
+ qemu_log_mask(LOG_UNIMP,
+ "unimplemented fcmp fpu_insn=%x pc=%x"
+ " opc=%x\n",
+ fpu_insn, dc->pc, dc->opcode);
dc->abort_at_next_insn = 1;
break;
}
@@ -1568,8 +1570,9 @@ static void dec_fpu(DisasContext *dc)
break;
default:
- qemu_log ("unimplemented FPU insn fpu_insn=%x pc=%x opc=%x\n",
- fpu_insn, dc->pc, dc->opcode);
+ qemu_log_mask(LOG_UNIMP, "unimplemented FPU insn fpu_insn=%x pc=%x"
+ " opc=%x\n",
+ fpu_insn, dc->pc, dc->opcode);
dc->abort_at_next_insn = 1;
break;
}
diff --git a/target-ppc/helper.c b/target-ppc/helper.c
index f556f8567a..3f7d8a464f 100644
--- a/target-ppc/helper.c
+++ b/target-ppc/helper.c
@@ -1621,7 +1621,7 @@ void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUPPCState *env)
break;
#endif
default:
- cpu_fprintf(f, "%s: unimplemented\n", __func__);
+ qemu_log_mask(LOG_UNIMP, "%s: unimplemented\n", __func__);
}
}
diff --git a/target-s390x/translate.c b/target-s390x/translate.c
index 9bf8c38bb3..1c1baf5342 100644
--- a/target-s390x/translate.c
+++ b/target-s390x/translate.c
@@ -5098,7 +5098,7 @@ static void disas_s390_insn(DisasContext *s)
disas_ed(s, op, r1, x2, b2, d2, r1b);
break;
default:
- LOG_DISAS("unimplemented opcode 0x%x\n", opc);
+ qemu_log_mask(LOG_UNIMP, "unimplemented opcode 0x%x\n", opc);
gen_illegal_opcode(s, ilc);
break;
}
diff --git a/target-sparc/ldst_helper.c b/target-sparc/ldst_helper.c
index efe5e704b5..9bec7a92f7 100644
--- a/target-sparc/ldst_helper.c
+++ b/target-sparc/ldst_helper.c
@@ -464,16 +464,18 @@ uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr, int asi, int size,
if (size == 8) {
ret = env->mxccregs[3];
} else {
- DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
- size);
+ qemu_log_mask(LOG_UNIMP,
+ "%08x: unimplemented access size: %d\n", addr,
+ size);
}
break;
case 0x01c00a04: /* MXCC control register */
if (size == 4) {
ret = env->mxccregs[3];
} else {
- DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
- size);
+ qemu_log_mask(LOG_UNIMP,
+ "%08x: unimplemented access size: %d\n", addr,
+ size);
}
break;
case 0x01c00c00: /* Module reset register */
@@ -481,21 +483,24 @@ uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr, int asi, int size,
ret = env->mxccregs[5];
/* should we do something here? */
} else {
- DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
- size);
+ qemu_log_mask(LOG_UNIMP,
+ "%08x: unimplemented access size: %d\n", addr,
+ size);
}
break;
case 0x01c00f00: /* MBus port address register */
if (size == 8) {
ret = env->mxccregs[7];
} else {
- DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
- size);
+ qemu_log_mask(LOG_UNIMP,
+ "%08x: unimplemented access size: %d\n", addr,
+ size);
}
break;
default:
- DPRINTF_MXCC("%08x: unimplemented address, size: %d\n", addr,
- size);
+ qemu_log_mask(LOG_UNIMP,
+ "%08x: unimplemented address, size: %d\n", addr,
+ size);
break;
}
DPRINTF_MXCC("asi = %d, size = %d, sign = %d, "
@@ -719,40 +724,45 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val, int asi,
if (size == 8) {
env->mxccdata[0] = val;
} else {
- DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
- size);
+ qemu_log_mask(LOG_UNIMP,
+ "%08x: unimplemented access size: %d\n", addr,
+ size);
}
break;
case 0x01c00008: /* MXCC stream data register 1 */
if (size == 8) {
env->mxccdata[1] = val;
} else {
- DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
- size);
+ qemu_log_mask(LOG_UNIMP,
+ "%08x: unimplemented access size: %d\n", addr,
+ size);
}
break;
case 0x01c00010: /* MXCC stream data register 2 */
if (size == 8) {
env->mxccdata[2] = val;
} else {
- DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
- size);
+ qemu_log_mask(LOG_UNIMP,
+ "%08x: unimplemented access size: %d\n", addr,
+ size);
}
break;
case 0x01c00018: /* MXCC stream data register 3 */
if (size == 8) {
env->mxccdata[3] = val;
} else {
- DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
- size);
+ qemu_log_mask(LOG_UNIMP,
+ "%08x: unimplemented access size: %d\n", addr,
+ size);
}
break;
case 0x01c00100: /* MXCC stream source */
if (size == 8) {
env->mxccregs[0] = val;
} else {
- DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
- size);
+ qemu_log_mask(LOG_UNIMP,
+ "%08x: unimplemented access size: %d\n", addr,
+ size);
}
env->mxccdata[0] = ldq_phys((env->mxccregs[0] & 0xffffffffULL) +
0);
@@ -767,8 +777,9 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val, int asi,
if (size == 8) {
env->mxccregs[1] = val;
} else {
- DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
- size);
+ qemu_log_mask(LOG_UNIMP,
+ "%08x: unimplemented access size: %d\n", addr,
+ size);
}
stq_phys((env->mxccregs[1] & 0xffffffffULL) + 0,
env->mxccdata[0]);
@@ -783,8 +794,9 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val, int asi,
if (size == 8) {
env->mxccregs[3] = val;
} else {
- DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
- size);
+ qemu_log_mask(LOG_UNIMP,
+ "%08x: unimplemented access size: %d\n", addr,
+ size);
}
break;
case 0x01c00a04: /* MXCC control register */
@@ -792,8 +804,9 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val, int asi,
env->mxccregs[3] = (env->mxccregs[3] & 0xffffffff00000000ULL)
| val;
} else {
- DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
- size);
+ qemu_log_mask(LOG_UNIMP,
+ "%08x: unimplemented access size: %d\n", addr,
+ size);
}
break;
case 0x01c00e00: /* MXCC error register */
@@ -801,21 +814,24 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val, int asi,
if (size == 8) {
env->mxccregs[6] &= ~val;
} else {
- DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
- size);
+ qemu_log_mask(LOG_UNIMP,
+ "%08x: unimplemented access size: %d\n", addr,
+ size);
}
break;
case 0x01c00f00: /* MBus port address register */
if (size == 8) {
env->mxccregs[7] = val;
} else {
- DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
- size);
+ qemu_log_mask(LOG_UNIMP,
+ "%08x: unimplemented access size: %d\n", addr,
+ size);
}
break;
default:
- DPRINTF_MXCC("%08x: unimplemented address, size: %d\n", addr,
- size);
+ qemu_log_mask(LOG_UNIMP,
+ "%08x: unimplemented address, size: %d\n", addr,
+ size);
break;
}
DPRINTF_MXCC("asi = %d, size = %d, addr = %08x, val = %" PRIx64 "\n",
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-24 00:19:47 +0000