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author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-09-16 21:08:06 +0000 |
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committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-09-16 21:08:06 +0000 |
commit | 5fafdf24ef2c090c164d4dc89684b3f379dbdd87 (patch) | |
tree | c0654ee63b6dac76d98b427e92ef16850a90c652 /translate-all.c | |
parent | bd494f4cbd4187dda8cc8f4739763f24a31a4c8b (diff) | |
download | qemu-5fafdf24ef2c090c164d4dc89684b3f379dbdd87.tar.gz qemu-5fafdf24ef2c090c164d4dc89684b3f379dbdd87.tar.bz2 qemu-5fafdf24ef2c090c164d4dc89684b3f379dbdd87.zip |
find -type f | xargs sed -i 's/[\t ]$//g' # on most files
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'translate-all.c')
-rw-r--r-- | translate-all.c | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/translate-all.c b/translate-all.c index bd5286f2a1..108411d555 100644 --- a/translate-all.c +++ b/translate-all.c @@ -1,6 +1,6 @@ /* * Host code generation - * + * * Copyright (c) 2003 Fabrice Bellard * * This library is free software; you can redistribute it and/or @@ -89,7 +89,7 @@ void dump_ops(const uint16_t *opc_buf, const uint32_t *opparam_buf) for(;;) { c = *opc_ptr++; n = op_nb_args[c]; - fprintf(logfile, "0x%04x: %s", + fprintf(logfile, "0x%04x: %s", (int)(opc_ptr - opc_buf - 1), op_str[c]); for(i = 0; i < n; i++) { fprintf(logfile, " 0x%x", opparam_ptr[i]); @@ -110,11 +110,11 @@ static void dyngen_labels(long *gen_labels, int nb_gen_labels, uint8_t *gen_code_ptr; int c, i; unsigned long gen_code_addr[OPC_BUF_SIZE]; - + if (nb_gen_labels == 0) return; /* compute the address of each op code */ - + gen_code_ptr = gen_code_buf; i = 0; for(;;) { @@ -125,7 +125,7 @@ static void dyngen_labels(long *gen_labels, int nb_gen_labels, gen_code_ptr += opc_copy_size[c]; i++; } - + /* compute the address of each label */ for(i = 0; i < nb_gen_labels; i++) { gen_labels[i] = gen_code_addr[gen_labels[i]]; @@ -133,7 +133,7 @@ static void dyngen_labels(long *gen_labels, int nb_gen_labels, } /* return non zero if the very first instruction is invalid so that - the virtual CPU can trigger an exception. + the virtual CPU can trigger an exception. '*gen_code_size_ptr' contains the size of the generated code (host code). @@ -185,9 +185,9 @@ int cpu_gen_code(CPUState *env, TranslationBlock *tb, return 0; } -/* The cpu state corresponding to 'searched_pc' is restored. +/* The cpu state corresponding to 'searched_pc' is restored. */ -int cpu_restore_state(TranslationBlock *tb, +int cpu_restore_state(TranslationBlock *tb, CPUState *env, unsigned long searched_pc, void *puc) { @@ -202,7 +202,7 @@ int cpu_restore_state(TranslationBlock *tb, #endif if (gen_intermediate_code_pc(env, tb) < 0) return -1; - + /* find opc index corresponding to search_pc */ tc_ptr = (unsigned long)tb->tc_ptr; if (searched_pc < tc_ptr) @@ -234,8 +234,8 @@ int cpu_restore_state(TranslationBlock *tb, fprintf(logfile, "0x%04x: " TARGET_FMT_lx "\n", i, gen_opc_pc[i]); } } - fprintf(logfile, "spc=0x%08lx j=0x%x eip=" TARGET_FMT_lx " cs_base=%x\n", - searched_pc, j, gen_opc_pc[j] - tb->cs_base, + fprintf(logfile, "spc=0x%08lx j=0x%x eip=" TARGET_FMT_lx " cs_base=%x\n", + searched_pc, j, gen_opc_pc[j] - tb->cs_base, (uint32_t)tb->cs_base); } #endif @@ -256,7 +256,7 @@ int cpu_restore_state(TranslationBlock *tb, } else if (npc == 2) { target_ulong t2 = (target_ulong)puc; /* jump PC: use T2 and the jump targets of the translation */ - if (t2) + if (t2) env->npc = gen_opc_jump_pc[0]; else env->npc = gen_opc_jump_pc[1]; @@ -279,7 +279,7 @@ int cpu_restore_state(TranslationBlock *tb, case INDEX_op_ ## op ## _user:\ case INDEX_op_ ## op ## _kernel #endif - + CASE3(stfd): CASE3(stfs): CASE3(lfd): |