diff options
author | David Gibson <david@gibson.dropbear.id.au> | 2016-10-19 15:00:21 +1100 |
---|---|---|
committer | David Gibson <david@gibson.dropbear.id.au> | 2016-10-28 09:38:27 +1100 |
commit | f775f45ab866f8e2d26720de9cb3c8f0ba5684d3 (patch) | |
tree | 2bf82d643d259dc9c9c7ac14d75c2762d57bb678 /tests/libqos/pci-spapr.c | |
parent | 9c268f8ae84ae18679ba2c3b16394e1828e9a006 (diff) | |
download | qemu-f775f45ab866f8e2d26720de9cb3c8f0ba5684d3.tar.gz qemu-f775f45ab866f8e2d26720de9cb3c8f0ba5684d3.tar.bz2 qemu-f775f45ab866f8e2d26720de9cb3c8f0ba5684d3.zip |
libqos: Add 64-bit PCI IO accessors
Currently the libqos PCI layer includes accessor helpers for 8, 16 and 32
bit reads and writes. It's likely that we'll want 64-bit accesses in the
future (plenty of modern peripherals will have 64-bit reigsters). This
adds them.
For PIO (not MMIO) accesses on the PC backend, this is implemented as two
32-bit ins or outs. That's not ideal but AFAICT x86 doesn't have 64-bit
versions of in and out.
This patch also converts the single current user of 64-bit accesses -
virtio-pci.c to use the new mechanism, rather than a sequence of 8 byte
reads.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Laurent Vivier <lvivier@redhat.com>
Reviewed-by: Greg Kurz <groug@kaod.org>
Diffstat (limited to 'tests/libqos/pci-spapr.c')
-rw-r--r-- | tests/libqos/pci-spapr.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/tests/libqos/pci-spapr.c b/tests/libqos/pci-spapr.c index f26488ae5e..1e5d015bd4 100644 --- a/tests/libqos/pci-spapr.c +++ b/tests/libqos/pci-spapr.c @@ -78,6 +78,18 @@ static void qpci_spapr_pio_writel(QPCIBus *bus, uint32_t addr, uint32_t val) writel(s->pio_cpu_base + addr, bswap32(val)); } +static uint64_t qpci_spapr_pio_readq(QPCIBus *bus, uint32_t addr) +{ + QPCIBusSPAPR *s = container_of(bus, QPCIBusSPAPR, bus); + return bswap64(readq(s->pio_cpu_base + addr)); +} + +static void qpci_spapr_pio_writeq(QPCIBus *bus, uint32_t addr, uint64_t val) +{ + QPCIBusSPAPR *s = container_of(bus, QPCIBusSPAPR, bus); + writeq(s->pio_cpu_base + addr, bswap64(val)); +} + static void qpci_spapr_memread(QPCIBus *bus, uint32_t addr, void *buf, size_t len) { @@ -153,10 +165,12 @@ QPCIBus *qpci_init_spapr(QGuestAllocator *alloc) ret->bus.pio_readb = qpci_spapr_pio_readb; ret->bus.pio_readw = qpci_spapr_pio_readw; ret->bus.pio_readl = qpci_spapr_pio_readl; + ret->bus.pio_readq = qpci_spapr_pio_readq; ret->bus.pio_writeb = qpci_spapr_pio_writeb; ret->bus.pio_writew = qpci_spapr_pio_writew; ret->bus.pio_writel = qpci_spapr_pio_writel; + ret->bus.pio_writeq = qpci_spapr_pio_writeq; ret->bus.memread = qpci_spapr_memread; ret->bus.memwrite = qpci_spapr_memwrite; |