Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20160916' into staging

tcg queued patches

# gpg: Signature made Fri 16 Sep 2016 16:14:20 BST
# gpg:                using RSA key 0xAD1270CC4DD0279B
# gpg: Good signature from "Richard Henderson <rth7680@gmail.com>"
# gpg:                 aka "Richard Henderson <rth@redhat.com>"
# gpg:                 aka "Richard Henderson <rth@twiddle.net>"
# Primary key fingerprint: 9CB1 8DDA F8E8 49AD 2AFC  16A4 AD12 70CC 4DD0 279B

* remotes/rth/tags/pull-tcg-20160916:
  tcg: Optimize fence instructions
  target-i386: Generate fences for x86
  target-aarch64: Generate fences for aarch64
  target-arm: Generate fences in ARMv7 frontend
  target-alpha: Generate fence op
  tcg/tci: Add support for fence
  tcg/sparc: Add support for fence
  tcg/s390: Add support for fence
  tcg/ppc: Add support for fence
  tcg/mips: Add support for fence
  tcg/ia64: Add support for fence
  tcg/arm: Add support for fence
  tcg/aarch64: Add support for fence
  tcg/i386: Add support for fence
  Introduce TCGOpcode for memory barrier
  cpu-exec: Check -dfilter for -d cpu
  tcg: Merge GETPC and GETRA
  tcg: Support arbitrary size + alignment

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

1 files changed, 4 insertions, 0 deletions

diff --git a/tci.c b/tci.c
index b488c0d8e4..4bdc645f2a 100644
--- a/tci.c
+++ b/tci.c
@@ -1236,6 +1236,10 @@ uintptr_t tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr)
                 tcg_abort();
             }
             break;
+        case INDEX_op_mb:
+            /* Ensure ordering for all kinds */
+            smp_mb();
+            break;
         default:
             TODO();
             break;