diff options
author | Stefan Weil <sw@weilnetz.de> | 2012-09-18 22:52:14 +0200 |
---|---|---|
committer | Blue Swirl <blauwirbel@gmail.com> | 2012-11-18 20:40:08 +0000 |
commit | e24dc9feb0d68142d54dc3c097f57588836d1338 (patch) | |
tree | 8bbc148156b7a37cb5d33f3259d8fe671641148c /tci.c | |
parent | 13586813446054aeff71b359aa627e201094375c (diff) | |
download | qemu-e24dc9feb0d68142d54dc3c097f57588836d1338.tar.gz qemu-e24dc9feb0d68142d54dc3c097f57588836d1338.tar.bz2 qemu-e24dc9feb0d68142d54dc3c097f57588836d1338.zip |
tci: Support deposit operations
The operations for INDEX_op_deposit_i32 and INDEX_op_deposit_i64
are now supported and enabled by default.
Signed-off-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'tci.c')
-rw-r--r-- | tci.c | 22 |
1 files changed, 22 insertions, 0 deletions
@@ -689,6 +689,17 @@ tcg_target_ulong tcg_qemu_tb_exec(CPUArchState *cpustate, uint8_t *tb_ptr) tci_write_reg32(t0, (t1 >> t2) | (t1 << (32 - t2))); break; #endif +#if TCG_TARGET_HAS_deposit_i32 + case INDEX_op_deposit_i32: + t0 = *tb_ptr++; + t1 = tci_read_r32(&tb_ptr); + t2 = tci_read_r32(&tb_ptr); + tmp16 = *tb_ptr++; + tmp8 = *tb_ptr++; + tmp32 = (((1 << tmp8) - 1) << tmp16); + tci_write_reg32(t0, (t1 & ~tmp32) | ((t2 << tmp16) & tmp32)); + break; +#endif case INDEX_op_brcond_i32: t0 = tci_read_r32(&tb_ptr); t1 = tci_read_ri32(&tb_ptr); @@ -936,6 +947,17 @@ tcg_target_ulong tcg_qemu_tb_exec(CPUArchState *cpustate, uint8_t *tb_ptr) TODO(); break; #endif +#if TCG_TARGET_HAS_deposit_i64 + case INDEX_op_deposit_i64: + t0 = *tb_ptr++; + t1 = tci_read_r64(&tb_ptr); + t2 = tci_read_r64(&tb_ptr); + tmp16 = *tb_ptr++; + tmp8 = *tb_ptr++; + tmp64 = (((1ULL << tmp8) - 1) << tmp16); + tci_write_reg64(t0, (t1 & ~tmp64) | ((t2 << tmp16) & tmp64)); + break; +#endif case INDEX_op_brcond_i64: t0 = tci_read_r64(&tb_ptr); t1 = tci_read_ri64(&tb_ptr); |