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author | Richard Henderson <rth@twiddle.net> | 2013-05-02 12:18:38 +0100 |
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committer | Richard Henderson <rth@twiddle.net> | 2013-07-09 07:14:35 -0700 |
commit | 72e1ccfc0cf32005e23d308edfe2d06c7472154e (patch) | |
tree | 41589584b6613c10fbb317365d7c11a6197a19d3 /tcg/arm/tcg-target.h | |
parent | c1a61f6c85f63d379b4a03d399986174371f5c2e (diff) | |
download | qemu-72e1ccfc0cf32005e23d308edfe2d06c7472154e.tar.gz qemu-72e1ccfc0cf32005e23d308edfe2d06c7472154e.tar.bz2 qemu-72e1ccfc0cf32005e23d308edfe2d06c7472154e.zip |
tcg-arm: Make use of conditional availability of opcodes for divide
We can now detect and use divide instructions at runtime, rather than
having to restrict their availability to compile-time.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'tcg/arm/tcg-target.h')
-rw-r--r-- | tcg/arm/tcg-target.h | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h index 263ea03a02..5cd9d6a679 100644 --- a/tcg/arm/tcg-target.h +++ b/tcg/arm/tcg-target.h @@ -49,6 +49,13 @@ typedef enum { #define TCG_TARGET_NB_REGS 16 +#ifdef __ARM_ARCH_EXT_IDIV__ +#define use_idiv_instructions 1 +#else +extern bool use_idiv_instructions; +#endif + + /* used for function call generation */ #define TCG_REG_CALL_STACK TCG_REG_R13 #define TCG_TARGET_STACK_ALIGN 8 @@ -73,12 +80,7 @@ typedef enum { #define TCG_TARGET_HAS_deposit_i32 1 #define TCG_TARGET_HAS_movcond_i32 1 #define TCG_TARGET_HAS_muls2_i32 1 - -#ifdef __ARM_ARCH_EXT_IDIV__ -#define TCG_TARGET_HAS_div_i32 1 -#else -#define TCG_TARGET_HAS_div_i32 0 -#endif +#define TCG_TARGET_HAS_div_i32 use_idiv_instructions #define TCG_TARGET_HAS_rem_i32 0 extern bool tcg_target_deposit_valid(int ofs, int len); |