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| author | Richard Henderson <rth@twiddle.net> | 2015-08-21 11:03:37 -0700 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2015-09-15 07:45:33 -0700 |
| commit | e04e98bf277309c3964cfd773c0d4c0428f64399 (patch) | |
| tree | 2f0a137a5bbac7468f73377b80d68fc07c34ce65 /target-tilegx | |
| parent | c230a9944dc902e595852b9cd764e4b12d0dc541 (diff) | |
| download | qemu-e04e98bf277309c3964cfd773c0d4c0428f64399.tar.gz qemu-e04e98bf277309c3964cfd773c0d4c0428f64399.tar.bz2 qemu-e04e98bf277309c3964cfd773c0d4c0428f64399.zip | |
target-tilegx: Handle conditional branch instructions
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-tilegx')
| -rw-r--r-- | target-tilegx/translate.c | 51 |
1 files changed, 38 insertions, 13 deletions
diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c index c08a3a6371..9c95633fa0 100644 --- a/target-tilegx/translate.c +++ b/target-tilegx/translate.c @@ -1089,30 +1089,55 @@ static TileExcp gen_branch_opcode_x1(DisasContext *dc, unsigned ext, target_ulong tgt = dc->pc + off * TILEGX_BUNDLE_SIZE_IN_BYTES; const char *mnemonic; - switch (ext) { - case BEQZT_BRANCH_OPCODE_X1: + dc->jmp.dest = tcg_const_tl(tgt); + dc->jmp.val1 = tcg_temp_new(); + tcg_gen_mov_tl(dc->jmp.val1, load_gr(dc, srca)); + + /* Note that the "predict taken" opcodes have bit 0 clear. + Therefore, fold the two cases together by setting bit 0. */ + switch (ext | 1) { case BEQZ_BRANCH_OPCODE_X1: - case BNEZT_BRANCH_OPCODE_X1: + dc->jmp.cond = TCG_COND_EQ; + mnemonic = "beqz"; + break; case BNEZ_BRANCH_OPCODE_X1: - case BLBC_BRANCH_OPCODE_X1: - case BGEZT_BRANCH_OPCODE_X1: + dc->jmp.cond = TCG_COND_NE; + mnemonic = "bnez"; + break; case BGEZ_BRANCH_OPCODE_X1: - case BGTZT_BRANCH_OPCODE_X1: + dc->jmp.cond = TCG_COND_GE; + mnemonic = "bgez"; + break; case BGTZ_BRANCH_OPCODE_X1: - case BLBCT_BRANCH_OPCODE_X1: - case BLBST_BRANCH_OPCODE_X1: - case BLBS_BRANCH_OPCODE_X1: - case BLEZT_BRANCH_OPCODE_X1: + dc->jmp.cond = TCG_COND_GT; + mnemonic = "bgtz"; + break; case BLEZ_BRANCH_OPCODE_X1: - case BLTZT_BRANCH_OPCODE_X1: + dc->jmp.cond = TCG_COND_LE; + mnemonic = "blez"; + break; case BLTZ_BRANCH_OPCODE_X1: + dc->jmp.cond = TCG_COND_LT; + mnemonic = "bltz"; + break; + case BLBC_BRANCH_OPCODE_X1: + dc->jmp.cond = TCG_COND_EQ; + tcg_gen_andi_tl(dc->jmp.val1, dc->jmp.val1, 1); + mnemonic = "blbc"; + break; + case BLBS_BRANCH_OPCODE_X1: + dc->jmp.cond = TCG_COND_NE; + tcg_gen_andi_tl(dc->jmp.val1, dc->jmp.val1, 1); + mnemonic = "blbs"; + break; default: return TILEGX_EXCP_OPCODE_UNIMPLEMENTED; } if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) { - qemu_log("%s %s, " TARGET_FMT_lx " <%s>", - mnemonic, reg_names[srca], tgt, lookup_symbol(tgt)); + qemu_log("%s%s %s, " TARGET_FMT_lx " <%s>", + mnemonic, ext & 1 ? "" : "t", + reg_names[srca], tgt, lookup_symbol(tgt)); } return TILEGX_EXCP_NONE; } |