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| author | Chen Gang <gang.chen.5i5j@gmail.com> | 2015-09-22 06:26:54 +0800 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2015-10-07 20:03:14 +1100 |
| commit | 38c949ffe7497b1d833bca5f70b22c87df9bd567 (patch) | |
| tree | 55f32f691e9918eaa256903fa40a48af3354e122 /target-tilegx | |
| parent | c6876d7e1c3ff04a9b9f751f6260bf427ab8cf1a (diff) | |
| download | qemu-38c949ffe7497b1d833bca5f70b22c87df9bd567.tar.gz qemu-38c949ffe7497b1d833bca5f70b22c87df9bd567.tar.bz2 qemu-38c949ffe7497b1d833bca5f70b22c87df9bd567.zip | |
target-tilegx: Implement v1multu instruction
Signed-off-by: Chen Gang <gang.chen.5i5j@gmail.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-Id: <1442874414-3578-1-git-send-email-gang.chen.5i5j@gmail.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-tilegx')
| -rw-r--r-- | target-tilegx/helper.h | 1 | ||||
| -rw-r--r-- | target-tilegx/simd_helper.c | 13 | ||||
| -rw-r--r-- | target-tilegx/translate.c | 4 |
3 files changed, 18 insertions, 0 deletions
diff --git a/target-tilegx/helper.h b/target-tilegx/helper.h index b253722a72..d380d3ba59 100644 --- a/target-tilegx/helper.h +++ b/target-tilegx/helper.h @@ -5,6 +5,7 @@ DEF_HELPER_FLAGS_1(pcnt, TCG_CALL_NO_RWG_SE, i64, i64) DEF_HELPER_FLAGS_1(revbits, TCG_CALL_NO_RWG_SE, i64, i64) DEF_HELPER_FLAGS_3(shufflebytes, TCG_CALL_NO_RWG_SE, i64, i64, i64, i64) +DEF_HELPER_FLAGS_2(v1multu, TCG_CALL_NO_RWG_SE, i64, i64, i64) DEF_HELPER_FLAGS_2(v1shl, TCG_CALL_NO_RWG_SE, i64, i64, i64) DEF_HELPER_FLAGS_2(v1shru, TCG_CALL_NO_RWG_SE, i64, i64, i64) DEF_HELPER_FLAGS_2(v1shrs, TCG_CALL_NO_RWG_SE, i64, i64, i64) diff --git a/target-tilegx/simd_helper.c b/target-tilegx/simd_helper.c index 1c59a92216..2cff43c29c 100644 --- a/target-tilegx/simd_helper.c +++ b/target-tilegx/simd_helper.c @@ -28,6 +28,19 @@ #define V2(X) (((X) & 0xffff) * 0x0001000100010001ull) +uint64_t helper_v1multu(uint64_t a, uint64_t b) +{ + uint64_t r = 0; + int i; + + for (i = 0; i < 64; i += 8) { + unsigned ae = extract64(a, i, 8); + unsigned be = extract64(b, i, 8); + r = deposit64(r, i, 8, ae * be); + } + return r; +} + uint64_t helper_v1shl(uint64_t a, uint64_t b) { uint64_t m; diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c index 14ebd07515..6bfb1af2c8 100644 --- a/target-tilegx/translate.c +++ b/target-tilegx/translate.c @@ -1155,7 +1155,11 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext, case OE_RRR(V1MINU, 0, X1): case OE_RRR(V1MNZ, 0, X0): case OE_RRR(V1MNZ, 0, X1): + return TILEGX_EXCP_OPCODE_UNIMPLEMENTED; case OE_RRR(V1MULTU, 0, X0): + gen_helper_v1multu(tdest, tsrca, tsrcb); + mnemonic = "v1multu"; + break; case OE_RRR(V1MULUS, 0, X0): case OE_RRR(V1MULU, 0, X0): case OE_RRR(V1MZ, 0, X0): |