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author | Tsuneo Saito <tsnsaito@gmail.com> | 2011-07-22 00:16:30 +0900 |
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committer | Blue Swirl <blauwirbel@gmail.com> | 2011-07-21 19:59:56 +0000 |
commit | 096b67d41a22142e8bfd8f0aef4fcfb5670e1217 (patch) | |
tree | 95da8f5f01383bddd89f0db41fdfacee5f291451 /target-sparc | |
parent | 3c6722b9f568e9d01f0294034a67791cecd5323a (diff) | |
download | qemu-096b67d41a22142e8bfd8f0aef4fcfb5670e1217.tar.gz qemu-096b67d41a22142e8bfd8f0aef4fcfb5670e1217.tar.bz2 qemu-096b67d41a22142e8bfd8f0aef4fcfb5670e1217.zip |
SPARC64: split cpu_get_phys_page_debug() from cpu_get_phys_page_nofault()
This patch makes cpu_get_phys_page_debug() independent from
cpu_get_phys_page_nofault() in advance of implementing nonfaulting load.
This also modifies cpu_get_phys_page_nofault() to be compiled only on
TARGET_SPARC64 because it is not required on SPARC32.
Signed-off-by: Tsuneo Saito <tsnsaito@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'target-sparc')
-rw-r--r-- | target-sparc/cpu.h | 2 | ||||
-rw-r--r-- | target-sparc/helper.c | 15 |
2 files changed, 16 insertions, 1 deletions
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h index 348858e21b..f4eeff5b17 100644 --- a/target-sparc/cpu.h +++ b/target-sparc/cpu.h @@ -541,10 +541,12 @@ static inline int tlb_compare_context(const SparcTLBEntry *tlb, #if !defined(CONFIG_USER_ONLY) void cpu_unassigned_access(CPUState *env1, target_phys_addr_t addr, int is_write, int is_exec, int is_asi, int size); +#if defined(TARGET_SPARC64) target_phys_addr_t cpu_get_phys_page_nofault(CPUState *env, target_ulong addr, int mmu_idx); #endif +#endif int cpu_sparc_signal_handler(int host_signum, void *pinfo, void *puc); #define cpu_init cpu_sparc_init diff --git a/target-sparc/helper.c b/target-sparc/helper.c index 9acbcae8c6..cb8d706f78 100644 --- a/target-sparc/helper.c +++ b/target-sparc/helper.c @@ -746,6 +746,7 @@ static int cpu_sparc_get_phys_page(CPUState *env, target_phys_addr_t *phys, mmu_idx, &page_size); } +#if defined(TARGET_SPARC64) target_phys_addr_t cpu_get_phys_page_nofault(CPUState *env, target_ulong addr, int mmu_idx) { @@ -760,10 +761,22 @@ target_phys_addr_t cpu_get_phys_page_nofault(CPUState *env, target_ulong addr, return -1; return phys_addr; } +#endif target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr) { - return cpu_get_phys_page_nofault(env, addr, cpu_mmu_index(env)); + target_phys_addr_t phys_addr; + int mmu_idx = cpu_mmu_index(env); + + if (cpu_sparc_get_phys_page(env, &phys_addr, addr, 2, mmu_idx) != 0) { + if (cpu_sparc_get_phys_page(env, &phys_addr, addr, 0, mmu_idx) != 0) { + return -1; + } + } + if (cpu_get_physical_page_desc(phys_addr) == IO_MEM_UNASSIGNED) { + return -1; + } + return phys_addr; } #endif |