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author | Richard Henderson <rth@twiddle.net> | 2012-09-20 07:55:51 -0700 |
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committer | Richard Henderson <rth@twiddle.net> | 2013-01-05 12:18:45 -0800 |
commit | de379661d5c7cc1d219000d0741f5d96ced56553 (patch) | |
tree | d80804dc9accf33004d2e46c9bdbca0f7a4123a4 /target-s390x | |
parent | f24c49c24a4979fe50eff7afe18f371f5809177d (diff) | |
download | qemu-de379661d5c7cc1d219000d0741f5d96ced56553.tar.gz qemu-de379661d5c7cc1d219000d0741f5d96ced56553.tar.bz2 qemu-de379661d5c7cc1d219000d0741f5d96ced56553.zip |
target-s390: Tidy comparisons
After full conversion, we can audit the uses of LTGT cc ops
and see that none of the instructions can ever set CC=3.
Thus we can extend the table to treat that bit as ignored.
This fixes a regression wrt the pre-conversion translation
in which NE was used for both m=6 and m=7.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-s390x')
-rw-r--r-- | target-s390x/translate.c | 39 |
1 files changed, 17 insertions, 22 deletions
diff --git a/target-s390x/translate.c b/target-s390x/translate.c index cfe3766e81..2949bb1fc4 100644 --- a/target-s390x/translate.c +++ b/target-s390x/translate.c @@ -577,30 +577,29 @@ static void account_inline_branch(DisasContext *s, int cc_op) } /* Table of mask values to comparison codes, given a comparison as input. - For a true comparison CC=3 will never be set, but we treat this - conservatively for possible use when CC=3 indicates overflow. */ + For such, CC=3 should not be possible. */ static const TCGCond ltgt_cond[16] = { TCG_COND_NEVER, TCG_COND_NEVER, /* | | | x */ - TCG_COND_GT, TCG_COND_NEVER, /* | | GT | x */ - TCG_COND_LT, TCG_COND_NEVER, /* | LT | | x */ - TCG_COND_NE, TCG_COND_NEVER, /* | LT | GT | x */ - TCG_COND_EQ, TCG_COND_NEVER, /* EQ | | | x */ - TCG_COND_GE, TCG_COND_NEVER, /* EQ | | GT | x */ - TCG_COND_LE, TCG_COND_NEVER, /* EQ | LT | | x */ + TCG_COND_GT, TCG_COND_GT, /* | | GT | x */ + TCG_COND_LT, TCG_COND_LT, /* | LT | | x */ + TCG_COND_NE, TCG_COND_NE, /* | LT | GT | x */ + TCG_COND_EQ, TCG_COND_EQ, /* EQ | | | x */ + TCG_COND_GE, TCG_COND_GE, /* EQ | | GT | x */ + TCG_COND_LE, TCG_COND_LE, /* EQ | LT | | x */ TCG_COND_ALWAYS, TCG_COND_ALWAYS, /* EQ | LT | GT | x */ }; /* Table of mask values to comparison codes, given a logic op as input. For such, only CC=0 and CC=1 should be possible. */ static const TCGCond nz_cond[16] = { - /* | | x | x */ - TCG_COND_NEVER, TCG_COND_NEVER, TCG_COND_NEVER, TCG_COND_NEVER, - /* | NE | x | x */ - TCG_COND_NE, TCG_COND_NE, TCG_COND_NE, TCG_COND_NE, - /* EQ | | x | x */ - TCG_COND_EQ, TCG_COND_EQ, TCG_COND_EQ, TCG_COND_EQ, - /* EQ | NE | x | x */ - TCG_COND_ALWAYS, TCG_COND_ALWAYS, TCG_COND_ALWAYS, TCG_COND_ALWAYS, + TCG_COND_NEVER, TCG_COND_NEVER, /* | | x | x */ + TCG_COND_NEVER, TCG_COND_NEVER, + TCG_COND_NE, TCG_COND_NE, /* | NE | x | x */ + TCG_COND_NE, TCG_COND_NE, + TCG_COND_EQ, TCG_COND_EQ, /* EQ | | x | x */ + TCG_COND_EQ, TCG_COND_EQ, + TCG_COND_ALWAYS, TCG_COND_ALWAYS, /* EQ | NE | x | x */ + TCG_COND_ALWAYS, TCG_COND_ALWAYS, }; /* Interpret MASK in terms of S->CC_OP, and fill in C with all the @@ -1463,9 +1462,7 @@ static ExitStatus op_cj(DisasContext *s, DisasOps *o) bool is_imm; DisasCompare c; - /* Bit 3 of the m3 field is reserved and should be zero. - Choose to ignore it wrt the ltgt_cond table above. */ - c.cond = ltgt_cond[m3 & 14]; + c.cond = ltgt_cond[m3]; if (s->insn->data) { c.cond = tcg_unsigned_cond(c.cond); } @@ -1831,9 +1828,7 @@ static ExitStatus op_ct(DisasContext *s, DisasOps *o) TCGv_i32 t; TCGCond c; - /* Bit 3 of the m3 field is reserved and should be zero. - Choose to ignore it wrt the ltgt_cond table above. */ - c = tcg_invert_cond(ltgt_cond[m3 & 14]); + c = tcg_invert_cond(ltgt_cond[m3]); if (s->insn->data) { c = tcg_unsigned_cond(c); } |