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author | Alexander Graf <agraf@suse.de> | 2012-10-06 22:54:25 +0200 |
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committer | Alexander Graf <agraf@suse.de> | 2012-10-29 11:45:54 +0100 |
commit | e598a9c56badd00eaa732c4e0e69def4e5e6614b (patch) | |
tree | e6af97943f27892ad0b59aa509b1b3787d19f706 /target-ppc | |
parent | 5232fa59b17b45c04bd24e0d38224964816bf391 (diff) | |
download | qemu-e598a9c56badd00eaa732c4e0e69def4e5e6614b.tar.gz qemu-e598a9c56badd00eaa732c4e0e69def4e5e6614b.tar.bz2 qemu-e598a9c56badd00eaa732c4e0e69def4e5e6614b.zip |
PPC: 440: Emulate DCBR0
The DCBR0 register on 440 is used to implement system reset. The same
register is used on 405 as well, so just reuse the code.
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc')
-rw-r--r-- | target-ppc/translate_init.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index a972287035..ad54985059 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -1498,7 +1498,7 @@ static void gen_spr_BookE (CPUPPCState *env, uint64_t ivor_mask) /* XXX : not implemented */ spr_register(env, SPR_BOOKE_DBCR0, "DBCR0", SPR_NOACCESS, SPR_NOACCESS, - &spr_read_generic, &spr_write_generic, + &spr_read_generic, &spr_write_40x_dbcr0, 0x00000000); /* XXX : not implemented */ spr_register(env, SPR_BOOKE_DBCR1, "DBCR1", |