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author | Tom Musta <tommusta@gmail.com> | 2014-04-21 15:55:00 -0500 |
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committer | Alexander Graf <agraf@suse.de> | 2014-06-16 13:24:30 +0200 |
commit | 27722744e9fc81e437a5e55db8ec31ec99b31714 (patch) | |
tree | 7860504b32c6d132f0eb76cf400e2338360f46b4 /target-ppc | |
parent | 7b0c0d66e54868087b6db6a302aba030c0c5f2c3 (diff) | |
download | qemu-27722744e9fc81e437a5e55db8ec31ec99b31714.tar.gz qemu-27722744e9fc81e437a5e55db8ec31ec99b31714.tar.bz2 qemu-27722744e9fc81e437a5e55db8ec31ec99b31714.zip |
target-ppc: Introduce DFP Post Processor Utilities
Add post-processing utilities to the PowerPC Decimal Floating Point
(DFP) helper code. Post-processors are small routines that execute
after a preliminary DFP result is computed. They are used, among other
things, to compute status bits.
This change defines a function type for post processors as well as a
generic routine to run a list (array) of post-processors.
Actual post-processor implementations will be added as needed by specific
DFP helpers in subsequent changes.
Some routines are annotated with the GCC unused attribute in order to
preserve build bisection. The annotation will be removed in subsequent
patches.
Signed-off-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc')
-rw-r--r-- | target-ppc/dfp_helper.c | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/target-ppc/dfp_helper.c b/target-ppc/dfp_helper.c index b4f01395f7..9e9bc57ca4 100644 --- a/target-ppc/dfp_helper.c +++ b/target-ppc/dfp_helper.c @@ -130,3 +130,34 @@ static void dfp_prepare_decimal128(struct PPC_DFP *dfp, uint64_t *a, decNumberZero(&dfp->b); } } + +#define FP_FX (1ull << FPSCR_FX) +#define FP_FEX (1ull << FPSCR_FEX) +#define FP_OX (1ull << FPSCR_OX) +#define FP_OE (1ull << FPSCR_OE) +#define FP_UX (1ull << FPSCR_UX) +#define FP_UE (1ull << FPSCR_UE) +#define FP_XX (1ull << FPSCR_XX) +#define FP_XE (1ull << FPSCR_XE) +#define FP_ZX (1ull << FPSCR_ZX) +#define FP_ZE (1ull << FPSCR_ZE) +#define FP_VX (1ull << FPSCR_VX) +#define FP_VXSNAN (1ull << FPSCR_VXSNAN) +#define FP_VXISI (1ull << FPSCR_VXISI) +#define FP_VXIMZ (1ull << FPSCR_VXIMZ) +#define FP_VXZDZ (1ull << FPSCR_VXZDZ) +#define FP_VXIDI (1ull << FPSCR_VXIDI) +#define FP_VXVC (1ull << FPSCR_VXVC) +#define FP_VXCVI (1ull << FPSCR_VXCVI) +#define FP_VE (1ull << FPSCR_VE) +#define FP_FI (1ull << FPSCR_FI) + +__attribute__ ((unused)) +static void dfp_set_FPSCR_flag(struct PPC_DFP *dfp, uint64_t flag, + uint64_t enabled) +{ + dfp->env->fpscr |= (flag | FP_FX); + if (dfp->env->fpscr & enabled) { + dfp->env->fpscr |= FP_FEX; + } +} |